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Panel_AUO_T650HVN03-0_CELL_0_[DS]


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       Model Name: T650HVN03.0 SKD
                          Issue Date : 2013/5/28

                 ()Preliminary Specifications
                  
                     (   )Final Specifications



Customer Signature           Date   AUO                          Date

Approved By                         Approval By PM Director

                                    CP Wang

_________________________________


Note
                                    Reviewed By RD Director
                                    Eugene CC Chen




                                    Reviewed By Project Leader

                                    Bear Syong




                                    Prepared By PM

                                    Fanfan Lee
                        Contents
No
           CONTENTS

           RECORD OF REVISIONS

1          GENERAL DESCRIPTION

2          ABSOLUTE MAXIMUM RATINGS

3          ELECTRICAL SPECIFICATION

     3-1   ELECTRIACL CHARACTERISTICS

     3-2   INTERFACE CONNECTIONS

     3-3   SIGNAL TIMING SPECIFICATION

     3-4   SIGNAL TIMING WAVEFORM

     3-5   COLOR INPUT DATA REFERENCE

     3-6   POWER SEQUENCE

4          OPTICAL SPECIFICATION

5          OPEN CELL DRAWING

6          RELIABILITY TEST ITEMS

7          PACKING

     7-1   DEFINITION OF LABEL

     7-2   PACKING METHODS

     7-3   PALLET AND SHIPMENT INFORMATION

8          PRECAUTION

     8-1   MOUNTING PRECAUTIONS

     8-2   OPERATING PRECAUTIONS

     8-3   ELECTROSTATIC DISCHARGE CONTROL

     8-4   PRECAUTIONS FOR STRONG LIGHT EXPOSURE

     8-5   STORAGE

     8-6   HANDLING PRECAUTIONS FOR PROTECT FILM
Record of Revision
 Version     Date       Page                   Description
   0.0     2013/05/28          First release
1. General Description
   This specification applies to the 65.0 inch Color TFT-LCD Module T650HVN03.0 This LCD module has a TFT
active matrix type liquid crystal panel 1,920x1,080 pixels, and diagonal size of 65.0 inch. This module supports
1,920x1,080 mode. Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical
stripes. Gray scale or the brightness of the sub-pixel color is determined with a 8-bit gray scale signal for each dot.
   The T650HVN03.0 has been designed to apply the 8-bit 2 channel LVDS interface method. It is intended to
support displays where high brightness, wide viewing angle, high color saturation, and high color depth are very
important.




* General Information


               Items                          Specification                  Unit                  Note
Active Screen Size                                 65.00                     inch
Display Area                             1428.48 (H) x 803.52 (V)            mm
Outline Dimension                        1461.98 (H) x 839.24 (V)            mm
Driver Element                            a-Si TFT active matrix
Display Colors                                10 bit, 1073.7M               Colors
Number of Pixels                               1,920x1,080                   Pixel
Pixel Pitch                               0.744 (H) x 0.744 (W)              mm
Pixel Arrangement                           RGB vertical stripe
Display Operation Mode                        Normally Black
Surface Treatment                                   SC
Rotate Function                                Unachievable                          Note 1
 Note 1: Rotate Function refers to LCD display could be able to rotate.
2. Absolute Maximum Ratings
     The followings are maximum values which, if exceeded, may cause faulty operation or damage to the unit
                  Item                 Symbol            Min               Max   Unit             Conditions
 Logic/LCD Drive Voltage                 VDD             -0.3               14   [Volt]             Note 1
 Input Voltage of Signal                 Vin             -0.3               4    [Volt]             Note 1
                                                                                  o
 Operating Temperature                   TOP              0                +50    [ C]              Note 2
 Operating Humidity                     HOP              10                90    [%RH]              Note 2
                                                                                  o
 Storage Temperature                     TST             -20               +60    [ C]              Note 2
 Storage Humidity                        HST             10                90    [%RH]              Note 2
                                                                                  o
 Panel Surface Temperature               PST                               65     [ C]              Note 3



Note 1: Duration:50 msec.
Note 2 : Maximum Wet-Bulb should be 39         and No condensation.
The relative humidity must not exceed 90% non-condensing at temperatures of 40            or less. At temperatures
greater than 40    , the wet bulb temperature must not exceed 39       .
Note 3: Surface temperature is measured at 50       Dry condition
3. Electrical Specification
The T650HVN03.0 requires two power inputs. One is employed to power the LCD electronics and to drive the TFT
array and liquid crystal. The other is to power back light unit.


3.1 Electrical Characteristics

3.1.1: DC Characteristics
                                                                            Value
                       Parameter                           Symbol                               Unit     Note
                                                                     Min.   Typ.     Max
 LCD
 Power Supply Input Voltage                                   VDD    10.8   12       13.2       VDC
 Power Supply Input Current                                   IDD     --    0.61     0.75         A       1
 Inrush Current                                              IRUSH    --     --       7.5         A       2
 Permissible Ripple of Power Supply Input Voltage             VRP     --     --     VDD * 5%   mVpk-pk    3

             Input Differential Voltage                       VID    200    400       600       mVDC      4

 LVDS        Differential Input High Threshold Voltage        VTH    +100    --      +300       mVDC      4
 Interface
              Differential Input Low Threshold Voltage        VTL    -300    --      -100       mVDC      4

              Input Common Mode Voltage                      VICM    1.1    1.25      1.4       VDC       4
                                                              VIH
 CMOS         Input High Threshold Voltage                           2.7     --       3.3       VDC       5
                                                            (High)
 Interface                                                    VIL
              Input Low Threshold Voltage                             0      --       0.6       VDC       5
                                                            (Low)
LED lightbar and LED Backlight structure are designed by customers, AUO can not guarantee life time and
backlight power consumption.
3.1.2: AC Characteristics
                                                                                Value
                    Parameter                         Symbol                                            Unit    Note
                                                                        Min.    Typ.         Max

            Input Channel Pair Skew Margin            tSKEW (CP)        -500        --       +500        ps      6

            Receiver Clock : Spread Spectrum                             Fclk                Fclk
                                                      Fclk_ss                       --                  MHz      7
            Modulation range                                             -3%                 +3%
LVDS
Interface   Receiver Clock : Spread Spectrum
                                                        Fss              30         --       200        KHz      7
            Modulation frequency
            Receiver Data Input Margin
                     Fclk = 85 MHz                     tRMG              -0.4       --        0.4        ns      8
                     Fclk = 65 MHz                                       -0.5       --        0.5
            SCL clock frequency                         FSCL               0        --       400        KHZ
            I2C clock high level                        TSCHi             0.6       --         --        us
            I2C clock low level                         TSCLo             1.2       --         --        us
I2C
            I2C data setup time                         TSDS             100        --         --        ns
Interface
            I2C data hold time                          TSDH               0        --       900         ns
            SDA and SCL rise time                        TR                --       --       1000        ns
            SDA and SCL fall time                        TF                --       --       300         ns


3.1.3: Driver Characteristics
             Item                   Symbol      Min                Max          Unit                condition
  Driver Surface Temperature         DST                           100          [        ]            Note
Note : Any point on the driver surface must be less than 100        under any conditions.


3.1.4: TCON Characteristics
             Item                   Symbol      Min                Max          Unit                condition
  TCON Surface Temperature           TST                           85           [        ]            Note
Note : Any point on the TCON surface must be less than 85          under any conditions.
Note :
   1.    Test Condition:
               (1) VDD = 12.0V
               (2) Fv = 60Hz
               (3) Fclk= 82MHz
               (4) Temperature = 25  
               (5) Typ. Input current : White Pattern
                   Max. Input current: Heavy loading pattern defined by AUO

   2.    Measurement condition : Rising time = 400us
                                                                           VDD
                                                           90%



                                         10%
                              GND

                                                  400 



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