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TITLE:
HV460WUC-200 Preliminary Product Specification
BEIJING BOE DISPLAY TECHNOLOGY
SPEC. NUMBER PRODUCT GROUP REV. ISSUE DATE PAGE
S8XX-XXXX TFT LCD P0 2011.12. 07 1 of 28
B2010-8002-O (1/3) A4(210 X 297)
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PRODUCT GROUP REV ISSUE DATE
TFT LCD P0 2011.12.07
REVISION HISTORY
REV. ECN NO. DESCRIPTION OF CHANGES DATE PREPARED
P0 - Initial Release 2011.12.07 Hongming Zhan
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Contents
No ITEM Page
REVISIONS HISTORY 2
CONTENTS 3
1 GENERAL DESCRIPTION 4
1.1 Introduction
1.2 Features
1.3 Applications
1.4 General Specification
2 ABSOLUTE MAXIMUM RATINGS 6
3 ELECTRICAL SPECIFICATIONS 7
3.1 TFT LCD Module
3.2 LED Converter
4 INTERFACE CONNECTION 9
4.1 Module Input Signal & Power
4.2 LVDS Interface
4.3 LED Converter Input Signal & Power
5 SIGNAL TIMING SPECIFICATIONS 12
5.1 Timing Parameters
5.2 Signal Timing Waveform
5.3 Input Signals, Basic Display Colors & Cray Scale Of Colors
5.4 Power Sequence
6 OPTICAL SPECIFICATIONS 16
7 MECHANICAL CHARACTERISTICS 18
8 RELIABLITY 19
9 PRODUCT SERIAL NUMBER 20
10 PACKING INFORMATION 21
11 HANDING & CAUTIONS 23
12 APPENDIX 24
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1.0 GENERAL DESCRIPTION
1.1 Introduction
HV460WUC-200 is a color active matrix TFT LCD module using amorphous silicon TFT's
(Thin Film Transistors) as an active switching devices. This module has a 46.00 inch
diagonally measured active area with WUXGA resolutions (1920 horizontal by 1080
vertical pixel array). Each pixel is divided into RED, GREEN, BLUE dots which are
arranged in vertical stripe and this module can display 16.7M colors. The TFT-LCD panel
used for this module is adapted for a low reflection and higher color type.
RGB(Mini-LVDS)
VDD Source Driver Circuit
+12.0V
S1 S1920
G1
CN1
Gate Driver Circuit
LVDS
Timing Controller
2Ports
(51pin)
[LVDS Rx & Mini-LVDS
LVDS_SEL Tx integrated]
#7
TFT - LCD Panel
(1920 RGB 1080 pixels)
Power Circuit G1080
Block
CN2
VBL
Back light Assembly
+24.0V
(14pin) LED Converter
(132ea LED)
1.2 Features
z LVDS interface with 2 pixel / clock
z High-speed response
z Low color shift image quality
z 8-bit color depth, display 16.7M colors
z High luminance and contrast ratio, low reflection and wide viewing angle
z DE (Data Enable) only mode
z ADS technology is applied for high display quality
z RoHS compliant
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1.3 Application
z Home Alone Multimedia TFT-LCD TV
z Display Terminals for Control System
z Full High Definition TV(FHD TV)
z AV application Products
1.4 General Specification
< Table 1. General Specifications >
Parameter Specification Unit Remark
Active area 1018.08(H) 572.67(V) mm Array
Number of pixels 1920(H) 1080(V) pixels
Pixel pitch 176.75(H) RGB 530.25(V) Array
Pixel arrangement Pixels RGB Vertical stripe Array
Display colors 16.7M(8bits-true) colors
Display mode Transmission mode, Normally Black
Outline Dimension 1045.9(H) 602.1(V) 10.8(D) typ. mm Mech
Weight 11800 (Typ.) gram Mech
Power Consumption Total=93.0Watt (Typ.)
Watt
(Logic=9.0W, BL=84W )
Surface Treatment Haze 13%, 3H, Anti-glare treatment
(Front Polarizer)
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2.0 ABSOLUTE MAXIMUM RATINGS
The followings are maximum values which, if exceed, may cause faulty operation or
damage to the unit. The operational and non-operational maximum voltage and current
values are listed in Table 2.
< Table 2. LCD Module Electrical Specifications > [VSS=GND=0V]
Parameter Symbol Min. Max. Unit Remark
Power LCD
VDD VSS-0.3 13.5 V
Supply Module
Voltage Ta = 25
Converter VBL VSS-0.3 26.4 V
TOP 0 +50
Operating Temperature
TSUR 0 +60
Storage Temperature TST -20 +60
Note 1
Operating Ambient
Hop 10 80 %RH
Humidity
Storage Humidity Hst 10 80 %RH
Note 1 : Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39 max. and no condensation of water.
C
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3.0 ELECTRICAL SPECIFICATIONS
3.1 TFT LCD Module
< Table 3. LCD Module Electrical Specifications > [Ta =25 2 ]
Values
Parameter Symbol Unit Remark
Min Typ Max
Power Supply Input Voltage VDD 10.8 12 13.2 Vdc
Power Supply Ripple Voltage VRP 300 mV
Power Supply Current IDD - 750 850 mA
Note 1
Power Consumption PDD 9.0 10.2 Watt
Rush current IRUSH - - 3.0 A Note 2
Differential Input High
VLVTH +100 +300 mV
Threshold Voltage
LVDS
Interface Differential Input Low
VLVTL -300 -100 mV
Threshold Voltage
Common Input Voltage VLVC 1.0 1.2 1.4 V
Input High Threshold
VIH 2.7 - 3.3 V
CMOS Voltage
Interface Input Low Threshold
VIL 0 - 0.6 V
Voltage
Note 1 : The supply voltage is measured and specified at the interface connector of LCM.
The current draw and power consumption specified is for VDD=12.0V,
Frame rate fV=60Hz and Clock frequency = 75.4MHz.
Test Pattern of power supply current
a) Typ : Color Test (L0/L255) b) Max : Vertical Subline (L0/L255)
Note 2 : The duration of rush current is about 2ms and rising time of Power Input is 1ms(min)
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3.2 LED Converter
< Table 4. LED Converter Electrical Specifications > [Ta =25 2 ]
Values
Parameter Symbol Condition Unit Note
Min. Typ. Max.
Input Voltage VBL 22.8 24.0 25.2 V
Input Current IBL VDIM=3.3V - 3.5 A Note 1
Rush current IRUSH VBL= 24V - - 3 A
Power Typical
PBL - 84 Watt
Consumption Luminance
BL ON = High 2.8 3.3 5 V
B/L on/off control VON/OFF
BL OFF =Low 0 - 0.8 V
VDIM Voltage 0 3.3 V
Analog Dimming
LDIM Luminance 20 100 %
PWM Frequency FPWM 140 190 240 Hz
High Level 2.8 3.3 5 V
PWM Level
Low Level 0 - 0.5 V
PWM Duty DPWM 10 - 100 % Note 2
Life Time 30k - - Hrs Note 3
Note 1:The specified current and power consumption are under the typical supply Input
voltage, 24V. It is total power consumption.
Note 2 : High-duty = On/(On+Off) * 100
On Off
Note 3 : The life time of LED, 30,000Hrs, is determined as the time at which luminance of
the LED is 50% compared to that of initial value at the typical LED current on
condition of continuous operating at 25 r 2 C.
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4.0 INTERFACE CONNECTION
4.1 Module Input Signal & Power
- Connector : IS100-L30B-C23(Manufactured by UJU) or Equivalent.
< Table 5. LCM Module Input Connector Pin Configuration >
Pin No Symbol Description Pin No Symbol Description
1 NC No Connection 26 2D/3D 2D/3D Signal Select
2 SDA I2C Data 27 L/R Left Right Eye Frame Sync.
Second pixel negative LVDS
3 SCL I2C Clock 28 CH2[0]-
differential data input. Pair0
Second pixel positive LVDS
4 NC 29 CH2[0]+
differential data input. Pair0
5 NC 30 CH2[1]- "
6 NC 31 CH2[1]+ "
High or Openh: NS
7 SELLVDS 32 CH2[2]- "
Low: JEIDA
8 NC 33 CH2[2]+ "
9 NC 34 GND
10 NC 35 CH2CLK- First pixel negative LVDS clock
11 GND 36 CH2CLK+ First pixel positive LVDS clock
First pixel negative LVDS
12 CH1[0]- 37 GND
differential data input. Pair0
First pixel positive LVDS
13 CH1[0]+ 38 CH2[3]- "
differential data input. Pair0
14 CH1[1]- " 39 CH2[3]+ "
Second pixel negative LVDS
15 CH1[1]+ " 40 CH2[4]-/NC
differential data input. Pair0
Second pixel positive LVDS
16 CH1[2]- " 41 CH2[4]+/NC
differential data input. Pair0
17 CH1[2]+ " 42 NC
18 GND 43 NC
19 CH1CLK- First pixel negative LVDS clock 44 GND Ground
20 CH1CLK+ First pixel positive LVDS clock 45 GND "
21 GND 46 GND "
22 CH1[3]- 47 NC "
23 CH1[3]+ 48 VCC Input Voltage
First pixel negative LVDS
24 CH1[4]-/NC 49 VCC "
differential data input. Pair0
First pixel positive LVDS
25 CH1[4]+/NC 50 VCC "
differential data input. Pair0
51 VCC "
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4.0 INTERFACE CONNECTION
4.1 Module Input Signal & Power
Notes : 1. NC(Not Connected) : This pins are only used for BOE internal operations.
2. Input Level of LVDS signal is based on the IEA 664 Standard.
3. LVDS_SEL : This pin is used for selecting LVDS signal data format.
If this Pin : High (3.3V) or Open (NC)