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4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
Table of Contents
D Page. 1 COVER D
Page. 2 OPERATION BLOCK DIAGRAM
Page. 3 POWER DIAGRAM
Page. 4 POWER SEQUENCE DIAGRAM
Page. 5 POWER RAIL
Page. 6 CLOCK DISTRIBUTION
TORINO 2 Page. 7 BOARD INFORMATION
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Page. 8 CLOCK GENERATOR (CK-505)
PCB Thinckness:1mm Page. 9~10 MEROM
Page. 11 THERMAL MONITOR
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Page. 12~16 CRESTLINE (965GM)
CPU :INTEL MEROM Page. 17 DDR2 SODIMM (TOP)
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Page. 18 DDR2 SODIMM (BOTTOM)
Chip Set :INTEL 965GM & ICH8-M Page. 19 DDR2 TERMINATION
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C Page. 20~23 DISCRETE GFX (NB8M-SE & GDDR3) C
Remarks :w/o INTEL AMT Page. 24~27 ICH8-M
Page. 28 LCD(LVDS) CONN.
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2 SODIMMs Page. 29 CRT CONN.
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Page. 30 HDD & ODD CONNECTOR
Page. 31 MICOM
a id
Page. 32 LAN CONTROLLER (10/100M)
Model Name : TORINO 2 Page. 33 ROBSON
Page. 34 USB PORT, MDC CONN. & BLUETOOTH
S f
PBA Name : MAIN Page. 35 MINI CARD SOCKET (WLAN/HSDPA/WIBRO)
Page. 36 CARDBUS CONTROLLER(1) & 4IN1
PCB Code : BA41-00727A / 728A Page. 37 CARDBUS CONTROLLER(2) & 1394(4P)
Page. 38 PCMCIA SOCKET
Dev. Step : MP
n
Page. 39 AUDIO CODEC
B Page. 40 AUDIO AMP B
Revision : 1.1 Page. 41 AUDIO JACK
o
Page. 42 CHARGER
T.R. Date : 2007.04.10 Page. 43 P3.3V_AUX & P5V_AUX
C
Page. 44 DDR2 POWER
Page. 45 CPU VRM POWER
Page. 46 P1.25V & P1.05V POWER
Page. 47 GFX CORE & P1.5V POWER
DRAW CHECK APPROVAL Page. 48 SWITCHED POWER
Page. 49 POWER S/W, DMB, DEBUG & KEYBOARD CONN.
Page. 50 LEDS & TOUCHPAD
Page. 51 MOUNT HOLE
- - - Page. 52 TEST POINTS
Page. 53 REVISION HISTORY
A A
DRAW DATE TITLE
CHECK
ZHOU JUN
DEV. STEP
4/10/2007
TORINO 2 SAMSUNG
ELECTRONICS
GUO LEI MP COVER
APPROVAL REV PART NO.
CONTENTS
KEVIN LEE 1.1 BA41-00727/8A
MODULE CODE LAST EDIT
March 28, 2007 3:33:29 PM PAGE 1 OF 54
4 3 2 1
COM-22C-015(1996.6.5) REV. 3 D:/users/mentor/Torino2/MP/T2_MP1.1_0410
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
OPERATION BLOCK DIAGRAM
mPGA479M Socket-M FAN CONTROL
D
THERMAL D
CLOCK
GENERATOR CPU CPU2_THERMDA/DC
MONITOR Page 11
MEROM-4M MAX6695
CK-505 Page 11
Page 9,10
Page 8
TFT_LCD
12.1" WIDE 800MHz FSB (CeleronM:667MHz) SODIMM0 (TOP)
1280 X 800 MAX 2 GB
1299 uFCBGA Type
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CHANNEL A Page 17
Page 28 LVDS GMCH 667/533 MHz
VGA
n a
CRT 965GM/PM
Page 29 Discrete Gfx. CHANNEL B
nVidia G3-64 Family CRESTLINE SODIMM1 (BOTTOM)
667/533 MHz
u ti
GDDR3 128MB 64bit
MAX 2 GB
K4J52324QC-BC14 NB8M-SE Page 12~16
Page 27 PCI-E X16 Page 18
s n
C C
DMI X4 C-Link0
LOM
MDC
RJ11
10/100M AZALIA
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676 FCBGA Type
PCI-E Module
RJ45
Marvell PCI-E Lane2
LAN Transformer
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Page 34
88E8039 Page 35
Page 32,33 ICH
EXTERNAL MIC
PCI
a id
JACK
3722-001822 3301-001629
ICH8 - M AUDIO CODEC HEADPHONE
1394 IEEE1394
4pin 82801 HBM IDE
CardBus ALC262
S f
Page 38 Page 38 MS / SD / MMC / xD Controller SATA Page 40 Internal MIC
RICOH R5C847
USB2.0 Page 23~26
MultiMedia Crad PCMCIA
Audio AMP
SPEAKER
L
6in1 B'd Page 37,38
LPC SPI D-Class
Page 37
RTC MAX9715
n
2P
Batt.
R
Page 41
Page 18
B SPI EEPROM B
Intel ROBSON
o
PCMCIA
PCI-E Lane4 AT25080
Page 33
Page 39 Page 24
PCI-E Lane1 Page 30 Page 30
C
USB PORT 3 KBC On TOP B'D
H8S - 2110B HDD ODD MASTER
Power S/W Sub-B'D
Page 31 with MIO, LID S/W
PCI-E Lane3
GOLAN / Kerdon HSDPA
802.11abg/abgn /Wibro USB PORT 5 2.5inch
Page 36 Page 36 USB PORT 6 SATA only
Space bar
KEYBOARD
A A
DMB Module BLUETOOTH CAMERA PS/2 SYNAPTICS
PORT 7 TOUCHPAD DRAW DATE TITLE
PORT 0 PORT 1 PORT 2 PORT 4 ZHOU JUN 4/10/2007
TORINO 2 SAMSUNG
CHECK DEV. STEP
USB (Right) USB (Back) GUO LEI MP MAIN
ELECTRONICS
Page 35 Page 35 Page 48 Page 35 APPROVAL REV
BLOCK DIAGRAM
PART NO.
KEVIN LEE 1.1 BA41-00727/8A
MODULE CODE LAST EDIT
March 28, 2007 3:33:29 PM PAGE 2 OF 54
4 3 2 1
COM-22C-015(1996.6.5) REV. 3 D:/users/mentor/Torino2/MP/T2_MP1.1_0410
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. POWER DIAGRAM
D D
ALWAYS ON KBC3_SUSPWR KBC3_PWRON KBC3_VRON P3.3V Clock Gen.
P3.3V_AUX
P3.3V_AUX LOM
3.3V Core
LDO 3.3V CTRL_18
0.8V CPU IO FET
1.8V
CTRL12_25
FET
2.5V
P5.0V_AUX P5.0V CPU_CORE
DDR2 Power VRM ICH8-M USB CPU
ICH8-M CRT Touchpad P1.05V Vcc_CORE
MICOM FAN VCCP P5.0V HDD / ODD
PCMCIA HDD P1.5V VCCA 5V
AC Adapter P3.3V 3.3V
19V
VDC P3.3V_AUX P3.3V P1.05V Crestline GM/PM
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1.05V MCHCore P3.3V_AUX SPI
Battery DC ICH8M 965GM Thermal Sensor P1.25V 1.05V FSB, PEG 3.3V VCC
11.1V MDC ICH8-M R5C843 1.05V DDRHSIO, DDRDLL
MINICARD CK505 BlueTooth P1.5V 1.05V ME
LOM MICOM LEDs P3.3V_AUX
n a
0.7V~1.25V Vgfx Thermal Sensor
SODIMM LCD P1.8V_AUX 1.25V DPLL, DMI 3.3V VCC
HDD MINICARD 1.25V MLINK, HPLL
P12.0V_ALW SPI 1.5V VCCDTV/CRT
SWITCHED POWER 1.8V DDRIO P5.0V FAN
P3.3V
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1.8V LVDSIO 5V VCC
P2.5V 3.3V TV/CRT IO, PXPBG
G7xM
P3.3V P3.3V LCD
P5.0V_ALW
s n
DDR2 3.3V VDD
C MAX1999 P1.8V_AUX 3.3V SPD VDC 12V Inverter VDC
C
P1.5V 1.8V VDDQ
MEROM P0.9V 0.9V Vref, Vtt
965GM P5.0V CRT
www.kythuatvitinh.com
ICH8-M 5V VCC
P3.3V_MICOM GFX_CORE Discrete GFX
m e
MICOM 1.0V~1.1V VDD Core
P1.8V_AUX P0.9V P1.2V 1.2V PEX Core, IO, PLL P3.3V_MICOM MICOM
SODIMM (DDR II) DDR II-Termination 1.2V FBA PLL 3.3V VCC
RTC Battery 965GM P2.5V 1.2V Core Clock PLL Digital P5.0V 5V VccB
3V 2.5V Core Clock PLL Analog
a id
ICH8-M P1.8V 2.5V VID PLL
P1.8V 1.8V FBVDDQ P3.3V_AUX MDC
NB8M-SE P3.3V 1.8V LVDSIO 3.3V VCC
GDDR3 3.3V VDD3_3
3.3V DAC VDD P5.0V AUDIO
S f
3.3V MIO VDDQ 5V AVDD
P3.3V 3.3V DVDD
P1.25V
965GM P1.8V GDDR3
ICH8-M 1.8V VDDQ P3.3V Bluetooth
0.9V VREF 3.3V VCC
P1.2V
NB8M-SE
P5.0V USB (2 Ports)
PRTC
n
RTC 5V VCC
VccRTC
ICH8-M Base
P1.05V
B MEROM P3.3V LAN P5.0V DMB B
965GM VccLAN3_3 5V
1.05V AUX LDO LAN100_SLP
o
ICH8-M VccLAN1_05 P3.3V 3.3V
VccGLAN3_3
VccGLAN1_5 P3.3V
GFX_CORE P1.5V MINI CARD
NB8M-SE CL P1.5V 3.3V
VccCL3_3 1.5V
C
1.05V EP LDO P3.3V_AUX
VccCL1_05 3.3V AUX
VccCL1_5 1.5V EP LDO INTVRMEN
CPU_CORE
MEROM P5.0V_AUX Resume P3.3V CARDBUS
V5REF_Sus 3.3V
P3.3V_AUX VccSus3_3 1.8V (Internal VR)
1.05V Sus LDO
VccSus1_05
VccSus1_5 1.5V Sus LDO P3.3V
P3.3V
S5 / S4 S3 S0 P5.0V Core
DIAMOND
VDD P3.3V_AUX
LEDS
3.3V SCL, NUM, CAP
V5REF P1.5V AVDD 3.3V WLAN
P1.05V Vcc3_3 P3.3V_MICOM 3.3V POWERON
Vcc1_05 3.3V ACIN
P1.25V Vcc1_5 P3.3V NAND FLASH
VccDMI 1.8V VCC
Rail
State +V*Always +V*AUX +V SUSPWR PWRON VRON
Full On ON ON ON H H H
A S3 ON ON OFF H L L
A
S4 ON OFF OFF H L L DRAW DATE TITLE
S5 ON OFF OFF L L L CHECK
ZHOU JUN
DEV. STEP
4/10/2007
TORINO 2 SAMSUNG
ELECTRONICS
GUO LEI MP MAIN
APPROVAL REV PART NO.
POWER DIAGRAM
KEVIN LEE 1.1 BA41-00727/8A
MODULE CODE LAST EDIT
March 28, 2007 3:33:29 PM PAGE 3 OF 54
4 3 2 1
COM-22C-015(1996.6.5) REV. 3 D:/users/mentor/Torino2/MP/T2_MP1.1_0410
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
POWER SEQUENCE Rev. 0.1
D D
3) P12V_ALWS
2) VDC ALWAYS 3) P5V_ALWS PRTC
POWER 3) MICOM_P3V
7) P3.3V_AUX INTVRMEN
7) P1.05V_AUX
g l
PRTC
4) KBC3_RST*
RST Circuit RES# 7) P5V_AUX 7) P1.5V_AUX EN
5) KBC3_CHKPWRSW* 7) P1.5V_CL
POWER S/W LAN100_SLP
n a
ONTOP B'D
* KBC3_LANRST# assert 100ms after LAN Power stable 7) P1.05V_CL 1-1) PRTC_BAT
6) KBC3_SUSPWRON EN
RTC
7) P1.05V_LAN
1-2) CHP3_RTCRST* Battery
RTCRST#
8) SUSPWRGD 9) KBC3_RSMRST*
u ti
10ms Delay
RSMRST#
10-1) CHP3_SLPS4*/S5* SLP_M#
11) KBC3_PWRON SLP_S3# 18) CLK3_PWRGD* CLOCK 19) Clock Running
CK_PWRGD
10-2) CHP3_SLPS3* SLP_S4# CK505
s n
C S4_STATE# C
13) VCCP_PWRGD 99ms Delay 17) VRM3_CPU_PWRGD SLP_S5#
VRMPWRGD
CPUPWRGD 21) CPU1_PWRGDCPU
20) KBC3_PWRGD PWROK PWRGOOD
CLPWROK CL_RST#
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20) KBC3_PWRGDMCH SUS_STAT# PLTRST# 16) VCC_CORE CPU
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