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A B C D E
1 1
Compal Confidential
2 2
QAL30 Project
3
LA-8061P REV 0.4 Schematic 3
Intel Ivy Bridge/Panther Point
2012-01-13 Rev. 0.4
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 1 of 46
A B C D E
5 4 3 2 1
Compal Confidential
Model Name : QAL30 Mobile Ivy Bridge
File Name : LA-8061PR01 CPU Dual / Quad Core Memory BUS(DDRIII)
Dual Channel 204pin DDRIII-SO-DIMM X2
Socket-rPGA989 1.5V DDRIII 1333/1600 BANK 0, 1, 2, 3 page 10,11
37.5mm*37.5mm
D D
page 4,5,6,7,8,9
FDI x8 DMI x4
(UMA) 100MHz
100MHz 5GB/s
LVDS Conn. HDMI Conn. CRT Conn. 2.7GT/s
page 20 page 22 page 21
CRT USB
Intel Panther Point USB/B Right Int. Camera RTS5129 3IN1
5V 480Mbps USB port 4,9 USB port 10 USB port 11
HDMI
page 26 page 20 page 26
LVDS PCBGA989
25mm*25mm
PCI-Express (PCIE 2.5GT/s) 100MHz SATA port 0 SATA HDD
5V (6Gb/s) page 27
port 2 port 1
C C
PCIeMini Card RTL8111E 1G SATA port 2 SATA ODD
WLAN & BT 2.0 5V 1.5GHz(150MB/s) page 27
PCIe port 1
USB port 13 page 24
PCIe port 2 BIOS ROM
page 30
page 23
page 12,13,14,15,
RJ45 16,17,18,19 HD Audio 3.3V 24.576MHz/48Mhz
page 24
LPC BUS HDA Codec
33MHz ALC259
page 25
ENE KB9012
(Co-Lay KB930)
page 29
B B
Int.
MIC CONN MIC CONN HP CONN SPK CONN
page 25 page 25 page 26 page 26
Touch Pad Int.KBD
page 26 page 32
CPU XDP
page 5
USB/B RTC CKT.
page 26 page 12 PCH XDP
page 12
A Power/B DC/DC Interface CKT. A
page 31 page 34
Fan Control Power Circuit DC/DC
page 31 page 35~44
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Wednesday, December 21, 2011 Sheet 2 of 46
5 4 3 2 1
5 4 3 2 1
Board ID Table for AD channel
Vcc 3.3V +/- 5% BOARD ID Table USB PORT# DESTINATION
Ra 100K +/- 5%
Board ID Rb V AD_BID min V AD_BID typ V AD_BID max Board ID PCB Revision 0 USB2/3 (Left Hand dise front)
0 0 0 V 0 V 0 V 0 QAL30
1 8.2K +/- 5% 0.168V 0.250 V 0.362 V 1 1 USB2/3 (Left Hand dise back)
D D
2 18K +/- 5% 0.436 V 0.503 V 0.538 V 2
3 33K +/- 5% 0.712 V 0.819 V 0.875 V 3 2 None
4 56K +/- 5% 1.036 V 1.185 V 1.264 V 4
5 100K +/- 5% 1.453 V 1.650 V 1.759 V 5 3 None
6 200K +/- 5% 1.935 V 2.200 V 2.341 V 6
7 NC 2.500 V 3.300 V 3.300 V 7 4 USB2 (Right Hand side front)
5 None
6 None
SMBUS Control Table PCH 7 None
SOURCE MINI1 BATT SODIMM SODIMM
CLKOUT DESTINATION 8 None
PCH
0001 011x b 1001 000x b 1001 010x b
9 USB2 (Left Hand side back)
C
EC_SMB_CK1 KB930 X V X X X PCI0 PCH_LOOPBACK C
EC_SMB_DA1 KB9012
10 CAMERA
EC_SMB_CK2 KB930 X X X X V PCI1 EC
EC_SMB_DA2 KB9012
11 Card Reader
PCH_SMBCLK PCI2 TPM
PCH_SMBDATA PCH
V X V V 12 None
PCI3 None
PCH_SML1CLK
PCH_SML1DATA PCH
X X X X PCI4 None 13 BT Comb
OPTIMUS: XDP@/D@
DIFFERENTIAL DESTINATION FLEX CLOCKS DESTINATION SATA DESTINATION PCI EXPRESS DESTINATION
B B
CLKOUT_PCIE0 LAN CLKOUTFLEX0 None SATA0 HDD Lane 1 LAN
CLKOUT_PCIE1 WLAN CLKOUTFLEX1 None SATA1 None Lane 2 WLAN
CLKOUT_PCIE2 None CLKOUTFLEX2 None SATA2 ODD Lane 3 None
CLK CLKOUT_PCIE3 None CLKOUTFLEX3 None SATA3 None Lane 4 None
CLKOUT_PCIE4 None SATA4 None Lane 5 None
CLKOUT_PCIE5 None : etoN lobmyS SATA5 None Lane 6 None
CLKOUT_PCIE6 None dnuorG latigiD snaem : Lane 7 None
CLKOUT_PCIE7 None Lane 8 None
A
CLKOUT_PEG_A VGA
dnuorG golanA snaem : A
CLKOUT_PEG_B None
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Wednesday, December 21, 2011 Sheet 3 of 46
5 4 3 2 1
5 4 3 2 1
+V1.05S_VCCP
JCPU1I
RC1 PEG_ICOMPI and RCOMPO signals should be shorted and routed
24.9_0402_1% with - max length = 500 mils - typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with - max length = 500 mils
- typical impedance = 14.5 mohms T35 F22
JCPU1A VSS161 VSS234
T34 VSS162 VSS235 F19
D PEG_COMP D
PEG_ICOMPI J22 T33 VSS163 VSS236 E30
PEG_ICOMPO J21 T32 VSS164 VSS237 E27
14 DMI_CRX_PTX_N0 B27 DMI_RX#[0] PEG_RCOMPO H22 T31 VSS165 VSS238 E24
14 DMI_CRX_PTX_N1 B25 T30 E21
DMI_RX#[1] VSS166 VSS239
14 DMI_CRX_PTX_N2 A25 T29 E18
DMI_RX#[2] VSS167 VSS240
14 DMI_CRX_PTX_N3 B24 DMI_RX#[3] PEG_RX#[0] K33 T28 VSS168 VSS241 E15
M35 T27 E13
PEG_RX#[1] VSS169 VSS242
14 DMI_CRX_PTX_P0 B28 DMI_RX[0] PEG_RX#[2] L34 T26 VSS170 VSS243 E10
14 DMI_CRX_PTX_P1 B26 DMI_RX[1] PEG_RX#[3] J35 P9 VSS171 VSS244 E9
14 DMI_CRX_PTX_P2 A24 J32 P8 E8
DMI
DMI_RX[2] PEG_RX#[4] VSS172 VSS245
14 DMI_CRX_PTX_P3 B23 DMI_RX[3] PEG_RX#[5] H34 P6 VSS173 VSS246 E7
H31 P5 E6
PEG_RX#[6] VSS174 VSS247
14 DMI_CTX_PRX_N0 G21 DMI_TX#[0] PEG_RX#[7] G33 P3 VSS175 VSS248 E5
14 DMI_CTX_PRX_N1 E22 G30 P2 E4
DMI_TX#[1] PEG_RX#[8] VSS176 VSS249
14 DMI_CTX_PRX_N2 F21 F35 N35 E3
DMI_TX#[2] PEG_RX#[9] VSS177 VSS250
14 DMI_CTX_PRX_N3 D21 E34 N34 E2
DMI_TX#[3] PEG_RX#[10] VSS178 VSS251
PEG_RX#[11] E32 N33 VSS179 VSS252 E1
14 DMI_CTX_PRX_P0 G22 D33 N32 D35
DMI_TX[0] PEG_RX#[12] VSS180 VSS253
14 DMI_CTX_PRX_P1 D22 DMI_TX[1] PEG_RX#[13] D31 N31 VSS181 VSS254 D32
14 DMI_CTX_PRX_P2 F20 B33 N30 D29
DMI_TX[2] PEG_RX#[14] VSS182 VSS255
PCI EXPRESS* - GRAPHICS
14 DMI_CTX_PRX_P3 C21 C32 N29 D26
DMI_TX[3] PEG_RX#[15] VSS183 VSS256
N28 D20
VSS184 VSS257
PEG_RX[0] J33 N27 VSS185 VSS258 D17
PEG_RX[1] L35 N26 VSS186 VSS259 C34
K34 M34 C31
FDI_CTX_PRX_N0 PEG_RX[2] VSS187 VSS260
14 FDI_CTX_PRX_N0 A21 FDI0_TX#[0] PEG_RX[3] H35 L33 VSS188 VSS261 C28
FDI_CTX_PRX_N1 H19 H32 L30 C27
14 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI0_TX#[1] PEG_RX[4] VSS189 VSS262
14 FDI_CTX_PRX_N2 E19 G34 L27 C25
FDI_CTX_PRX_N3 FDI0_TX#[2] PEG_RX[5] VSS190 VSS263
14 FDI_CTX_PRX_N3 F18 FDI0_TX#[3] PEG_RX[6] G31 L9 VSS191 VSS264 C23
Intel(R) FDI
FDI_CTX_PRX_N4 B21 F33 L8 C10
14 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI1_TX#[0] PEG_RX[7] VSS192 VSS265
14 FDI_CTX_PRX_N5 C20 F30 L6 C1
FDI_CTX_PRX_N6 FDI1_TX#[1] PEG_RX[8] VSS193 VSS266
14 FDI_CTX_PRX_N6 D18 E35 L5 B22
C FDI_CTX_PRX_N7 FDI1_TX#[2] PEG_RX[9] VSS194 VSS267 C
E17 E33 L4 B19
14 FDI_CTX_PRX_N7 FDI1_TX#[3] PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
F32
D34
L3
L2
VSS195
VSS196
VSS197
VSS VSS268
VSS269
VSS270
B17
B15
FDI_CTX_PRX_P0 A22 E31 L1 B13
14 FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI0_TX[0] PEG_RX[13] VSS198 VSS271
14 FDI_CTX_PRX_P1 G19 FDI0_TX[1] PEG_RX[14] C33 K35 VSS199 VSS272 B11
FDI_CTX_PRX_P2 E20 B32 K32 B9
14 FDI_CTX_PRX_P2 FDI0_TX[2] PEG_RX[15] VSS200 VSS273
FDI_CTX_PRX_P3 G18 K29 B8
14 FDI_CTX_PRX_P3 FDI0_TX[3] VSS201 VSS274
FDI_CTX_PRX_P4 B20 M29 K26 B7
14 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI1_TX[0] PEG_TX#[0] VSS202 VSS275
14 FDI_CTX_PRX_P5 C19 FDI1_TX[1] PEG_TX#[1] M32 J34 VSS203 VSS276 B5
FDI_CTX_PRX_P6 D19 M31 J31 B3
14 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7 FDI1_TX[2] PEG_TX#[2] VSS204 VSS277
14 FDI_CTX_PRX_P7 F17 FDI1_TX[3] PEG_TX#[3] L32 H33 VSS205 VSS278 B2
L29 H30 A35
FDI_FSYNC0 PEG_TX#[4] VSS206 VSS279
14 FDI_FSYNC0 J18 FDI0_FSYNC PEG_TX#[5] K31 H27 VSS207 VSS280 A32
FDI_FSYNC1 J17 K28 H24 A29
14 FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] VSS208 VSS281
J30 H21 A26
FDI_INT PEG_TX#[7] VSS209 VSS282
14 FDI_INT H20 J28 H18 A23
FDI_INT PEG_TX#[8] VSS210 VSS283
H29 H15 A20
FDI_LSYNC0 PEG_TX#[9] VSS211 VSS284
14 FDI_LSYNC0 J19 G27 H13 A3
FDI_LSYNC1 FDI0_LSYNC PEG_TX#[10] VSS212 VSS285
14 FDI_LSYNC1 H17 E29 H10
FDI1_LSYNC PEG_TX#[11] VSS213
PEG_TX#[12] F27 H9 VSS214
D28 H8
PEG_TX#[13] VSS215
F26 H7
PEG_TX#[14] VSS216
E25 H6
PEG_TX#[15] VSS217
A18 H5
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