Service Manuals, User Guides, Schematic Diagrams or docs for : Microstar MS-6531
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8 7 6 5 4 3 2 1
Cover Sheet 1 Version 1.0
Block Diagram 2 MS-6531 06/22/2001 Update
GPIO Spec. 3 INTEL (R) Brookdale Chipset
D
Willamette/Northwood 478pin mPGA-B Processor Schematics D
Power Delivery Map 4
Clock CY28324 & ATA100 IDE CONNECTORS 5 CPU:
Willamette/Northwood mPGA-478B Processor
mPGA478-B INTEL CPU Sockets 6 -7
INTEL Brookdale MCH -- North Bridge 8-9 System Brookdale Chipset:
INTEL ICH2 -- South Bridge 10-11 INTEL MCH (North Bridge) +
INTEL ICH2 (South Bridge)
LPC I/O W83627HF 12
AC'97 Codec 13 On Board Chipset:
C
Audio Amp TL072 & GAME 14 BIOS -- FWH C
AC'97 Codec -- AD1881
FWH -- BIOS & CNR RISER 15
LPC Super I/O -- W83627HF
SDR DIMM-168 16 Clock Generation -- CY28323
AGP 4X SLOT (1.5V) 17 LAN -- INTEL 82562EM/ET
PCI SLOT 1 & 2 & 3 18
PCI SLOT 4 & 5 19
Front Panel & Connectors 20
B
USB & FAN Connectors 21 Expansion Slots: B
D_LED &4 CHANNEL AUDIO 22 AGP2.0 SLOT * 1
PCI2.2 SLOT * 5
Votlage Regulator 23
CNR SLOT * 1
Intersil HIP6301 PWM 24 ISA SLOT * 1 (Share PCI5)
IO Connectors 25
LAN INTEL 82562EM/ET 26
PCI TO ISA BRIDGE AND ISA SLOT 27,28
A
JUMPER SETTING 29 A
MANUAL 30 Title Rev
M i c ro-Star MS-6531 1.0
Design Guide 31,32 Document Number
Cover Sheet
Last Revision Date:
HISTORY 1 33 Thursday, June 21, 2001 Sheet 1 of 33
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
AGP
4X(1.5V)
AGP CONN
D D
(478PINS)
(100MHz)
Power
Supply VRM Willamette/Northwood CK408 Clock
CONN 9.2 Socket (mPGA478-B) (100MHz)
(400MHz) Scalable Bus Scalable Bus/2
4 X (66MHz) AGP
AGP 4X
(1.5V) MCH: Memory
Controller HUB
( 5 93PINS/FCBGA) (133MHz)
DIMM 1:3
VRM
AGP
CONN
( 66MHz X 4 ) HUB Interface
(14.318MHz)
C C
ICH2: I/O PCI (33MHz)
PCI Slots 1:5
( 3 60PINS/EBGA)
Controller HUB
IDE CONN 1&2
(48MHz)
PCI TO ISA BRIDGE ISA SLOT 1
(33MHz)
(33MHz)
LPC Bus AC Link
USB Port 0:3 CNR Riser
(Shared slot)
AC '97 Audio
Hardware FWH: Firmware HUB AMP
Monitor Codec
SIO
Line Out
Telephone In
MIC In
B
Audio In B
LAN
Line In
PS2 Mouse & Parallel (1) Floppy Disk Stuffing
DLED Options CD-ROM
Keyboard Serial (2) Drive CONN
Stuffing
Options
RJ45
A A
Title Rev
M i c ro-Star MS-6531 1.0
Document Number
Block Diagram
Last Revision Date:
Thursday, June 21, 2001 Sheet 2 of 33
8 7 6 5 4 3 2 1
5 4 3 2 1
General Purpose I/O Spec.
ICH2
D GPIO Pin Type Function D
GPIO 0 I PCI TO ISA REQA#
GPIO 1 I Non Connect (PREQ#5)
GPIO 2 I INTE#
GPIO 3 I INTF#
GPIO 4 I INTG#
DEVICE ICH INT Pin IDSEL
GPIO 5 I INTH#
GPIO 6 I CNR Detect
FWH PCI Slot 1 INTA# AD16
GPIO Pin Type Function INTB#
GPIO 7 I None
INTC#
GPI 0 I ATA IDE 1 Detect
GPIO 8 I LAN Wake Up INTD#
C
GPI 1 I ATA IDE 2 Detect C
GPIO 9 I AC'97 Serial Data In
PCI Slot 2 INTB# AD17
GPI 2 I Reserved
GPIO 10 I Non Connect INTC#
GPI 3 I Reserved INTD#
GPIO 11 I Non Connect
INTA#
GPIO 12 I External SMI
GPIO 13 I LPC PME DLED PCI Slot 3 INTC# AD18
INTD#
GPIO 14~15 I Not Implemented GPIO Pin Type Function INTA#
INTB#
GPIO 16 O PCI TO ISA GNTA# GP32 I/OD DLED1
GPIO 17 O Non Connect (PGNT#5) GP24 I/OD DLED2 PCI Slot 4 INTD#
AD19
INTA#
GPIO 18 O Not Implemented GP34 I/OD DLED3
INTB#
B
GPIO 19 O Non Connect GP33 I/OD DLED4 INTC# B
GPIO 20 O Non Connect
PCI Slot 5 INTB#
AD21
GPIO 21 O PCI TO ISA NOGO INTC#
INTD#
GPIO 22 OD Audio 4 channel control
INTA#
GPIO 23 O BIOS Locked/Unlocked
GPIO 24 O Non Connect
GPIO 25 O Lan Status Input
GPIO 26 O Non Connect
GPIO 27 I/O Non Connect
GPIO 28 I/O LAN ENABLE/DISABLE
A A
GPIO 29~31 I/O Not Implemented
Title Rev
M i c ro-Star MS-6531 1.0
Document Number
GPIO Spec.
Last Revision Date:
Thursday, June 21, 2001 Sheet 3 of 33
5 4 3 2 1
5 4 3 2 1
Power Delivery Map
A T X 12V POWER Supply
D D
3.3V 5V 5VSB 12V
1A
VRM9.2 P r ocessor Core
Processor Vtt
Power
Translator
1.5V VREG MCH Core 1.5V
ACPI IC
MCH Vtt
MCH AGP
OP 1.8V VREG M C H H UB Interface 1.8V
M C H Memory sdr 3.3V
C C
3.3V
DUAL
FET P C - 1 3 3 System Memory 3.3V
3.3V VREG
I C H2 Core 1.8V
ICH2 I/O 3.3V
I C H 2 Resume 1.8V
1.8V VREG I C H 2 Resume I/O 1.8V
5V TO 3.3V ICH2 RTC 3.3V
RESISTOR
ICH2 5V
FWH 3.3V
B B
L P C Super I/O 3.3V
C L OCK GEN 3.3V
H A R D WARE AUDIO 3.3V
P C I LAN 3.3V/2.5V
5 V D u a l For USB and K/B
A A
Title Rev
M i c ro-Star MS-6531 1.0
Document Number
Power Delivery Map
Last Revision Date:
Thursday, June 21, 2001 Sheet 4 of 33
5 4 3 2 1
8 7 6 5 4 3 2 1
CP5 *Trace less 0.5"
2 1
CLOCK GENERATOR BLOCK Shut Source Termination Resistors Pull-Down Capacitors
CPUCLK R230 49.9RST
X_601S/0805 U18 CPUCLK# R231 49.9RST CN14 X_10p
FB21 39 41 R243 33RST CPUCLK MCHCLK R232 49.9RST CPUCLK 8 7
VCC3 CPU_VDD CPU0 CPUCLK (6)
40 R238 33RST CPUCLK# MCHCLK# R233 49.9RST CPUCLK# 6 5
+
CPU0# CPUCLK# (6)
CB160 Rubycon CT33 CB159 CB168 MCHCLK 4 3
104P 105P/0805 104P 36 38 R239 33RST MCHCLK MCHCLK# 2 1
CPU_GND CPU1 37 R240 33RST MCHCLK# MCHCLK (8) C_STP C160 10P
for good filtering from 10K~1M CPU1# MCHCLK# (8) P_STP C161 10P
D D
46
ELS10/16-B MREF_VDD 45 C_STP
CB169 3VMREF/CPU_STP# 44 P_STP
Trace less 0.2"
104P 3VMREF#/PCI_STP# CN15 X_10p
43 49.9ohm for 50ohm M/B impedance
CP6 MREF_GND MCH_66 8 7
2 1 32 31 1 2 MCH_66
MCH_66 (8)
ICH_66 6 5
3V66_VDD 3V66_0 30 RN16 3 4 ICH_66 AGPCLK 4 3
3V66_1 ICH_66 (11)
CB171 28 8P4R-33 5 6 AGPCLK 2 1
104P 29
3V66_GND
3V66_2
3V66_3
27 C166 22P 7 8 AGPCLK (17) CLOCK STRAPPING RESISTORS
X_601S/0805
6 FS2 1 2 SIO_PCLK SIO_PCLK (12)
FS4 R315 10K VCC3V
FB27 VCC3V 9 FS2/PCI_F0 7 FS3 RN21 3 4 FWH_PCLK FS3 R318 10K VCC3V FWH_PCLK C268 X_10P
VCC3 PCI_VDD FS3/PCI_F1 8 FWH_PCLK (15)
MODE 8P4R-33 5 6 ICH_PCLK C269 X_10P
+
CB204 CT37 CB196 CB197 MODE/PCI_F2 FS2 7
Rubycon 8 ICH_PCLK ICH_PCLK (10)
FS1 R298 X_10K VCC3V PCICLK4 C270 X_10P
104P 105P/0805 104P 5 10 FS4 R304 33 ISAPCLK
ISAPCLK (27) R299 10K APIC_CLK C271 X_10P
PCI_GND FS4/PCI0 11 R305 33 PCICLK4 PCICLK0 CN17 2 1 X_10p
for good filtering from 10K~1M PCI1 APIC_CLK PCICLK4 (19) FS0 R303 10K VCC3V PCICLK1
18 12 4 3
ELS10/16-B PCI_VDD PCI2 14 RN22 7 8 PCICLK0 R308 X_10K PCICLK2 6 5
CB198 PCI3 15 5 6 PCICLK1 PCICLK0 (18) PCICLK3 8 7
104P PCI4 PCICLK2 PCICLK1 (18) SIO_PCLK C260 22P
13 16 3 4 PCICLK2 (18)
PCI_GND PCI5 17 8P4R-33 1 2 PCICLK3 R316 10K VCC3V ISAPCLK C261 22P
*Put GND copper under Clock Gen. PCI6 PCICLK3 (19) FS2 R317 X_10K
connect to every GND pin 24
48_VDD 22 FS0 R313 33 ICH_48 ICH_48 C193 10P
* 40 mils Trace on Layer 4 FS0/48MHz ICH_48 (11)
CB199 23 FS1 R307 33 SIO_48 MODE R314 10K SIO_48 C187 10P
with GND copper around it 104P 21 FS1/24_48MHz SIO_48 (12)
48_GND
* put close to every power pin 2
C C
REF_VDD 48 R249 33 ICH_14 MUL0 R273 10K VCC3V
* Trace Width 7mils. VCC3 CB194 MUL0/REF0
1 MUL0
MUL1 R289 33 OSC ICH_14 (11) R274 X_10K OSC C182 10P
MUL1/REF1 OSC (28)
104P 47 ICH_14 C167 10P
* Same Group spacing 15mils REF_GND MUL1 R300 X_10K VCC3V
34 3 C179 18P R301 10K VCC3
* Different Group spacing 30mils CORE_VDD X1 32pF
Trace less 0.2"
R312 CB170 X3 14M-32pf-HC49S-D
* Different mode spacing 7mils on itself 104P 33 4 C175 18P CRST# R246 10K VCC3V C272 X_104P
10K CORE_GND X2
SMBCLK 26 35 R226 475RST C273 103P
(11,12,15,16) SMBCLK SMBDATA 25 SCLK IREF SMBCLK R264 1K
(11,12,15,16) SMBDATA SDATA CRST# R248 0 CLK_RST# SMBDATA R263 1K VCC3 C274 X_104P
20 CLK_RST# (20) 6/2/2001
R311 0 19 RST# 42 R225 4.7K VCC3V
VTT_GD# PWR_DN# VCC3V C275 X_104P
VCCP R327 220 Q32 ICS 950208/CY28323/4 C_STP R224 X_1K VCC3V
2N3904S P_STP R219 X_1K
R324 X_1K For Cypress
28324 used only for EMI issue
PRIMARY IDE BLOCK SECONDARY IDE BLOCK
ATA100 IDE CONNECTORS
R176 4.7K IDE1 R210 4.7K IDE2
D2x20-1:21-BL-ZBT D2x20-1:21-WH-SBT
HD_RST# R157 33 1 2 HD_RST# R177 33 1 2
PDD7 3 4 PDD8 SDD7 3 4 SDD8
B (11) PDD[0..7] PDD6 PDD9 PDD[8..15] (11) (11) SDD[0..7] SDD6 SDD9 SDD[8..15] (11) B
5 6 5 6
PDD5 7 8 PDD10 SDD5 7 8 SDD10
PDD4 9 10 PDD11 SDD4 9 10 SDD11
PDD3 11 12 PDD12 SDD3 11 12 SDD12
PDD2 13 14 PDD13 SDD2 13 14 SDD13
PDD1 15 16 PDD14 SDD1 15 16 SDD14
PDD0 17 18 PDD15 SDD0 17 18 SDD15
19 C264 103P 19
21 22 VCC3 21 22
(11) PD_DREQ 23 24 (11) SD_DREQ 23 24
(11) PD_IOW# (11) SD_IOW#
(11) PD_IOR# 25 26 (11) SD_IOR# 25 26
27 28 R99 470 FOR EMI 27 28 R97 470
(11) PD_IORDY 29 30 (11) SD_IORDY 29 30
(11) PD_DACK# (11) SD_DACK#
(10) IRQ14 31 32 (10) IRQ15 31 32
(11) PD_A1 33 34 PD_DET (15) (11) SD_A1 33 34 SD_DET (15)
(11) PD_A0 35 36 PD_A2 (11) (11) SD_A0 35 36 SD_A2 (11)
(11) PD_CS#1 37 38 PD_CS#3 (11) (11) SD_CS#1 37 38 SD_CS#3 (11)
(20) PD_LED 39 40 (20) SD_LED 39 40
C87 R95 C84 C88 R94 C85 * Trace Width : 5mils
VCC5 R88 8.2K 220P 10K X_472P VCC5 R90 8.2K 220P 10K X_472P * Trace Spacing : 7mils
VCC3 VCC3 * Length(longest)-Length(shortest)<0.5"
* Trace Length less than 5"
VCC3 R330 X_1K VCC5
R329 1K
A RESET BLOCK VCC5_SB A
R356 HD_RST#
4.7K
R367 330 VCC3 R360 330 VCC3 R333 4.7K Q34 Title Rev
2N3904S
(10) PCIRST#
PCIRST# 1 2
PCIRST#1 (8)
PCIRST# 3 4
PCIRST#2 (12,17,18,19)
M i c ro-Star MS-6531 1.0
PCIRST# R355 4.7K Q39
U24A U24B 2N3904S Document Number
DM7407-SOIC14 C230 DM7407-SOIC14
Clock CY28323/4 & ATA100 IDE
(VCC5_STR) (VCC5_STR) R354
X_10P Last Revision Date:
10K Sheet of
Tuesday, July 17, 2001 5 33
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CPU SIGNAL BLOCK
VCCPS+ (24)
(8) HA#[3..31] VCCPS- (24)
VID[0..4] (12,24)
HA#28
HA#18
1
0
9
7
6
5
4
3
2
1
0
9
7
6
5
4
3
2
1
0
HA#3
HA#3
HA#2
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