Service Manuals, User Guides, Schematic Diagrams or docs for : Microstar MS-6568
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5 4 3 2 1
MS-6568 VER:0A
CPU: AMD Socket-462 Processor
Chipset: SiS 740 SIS 961A SOUTH BRIDGE
CONTENT PAGE
D Cover Page 1 D
LPC I/O: W83697HF Block Diagram
Clock Gen.& Clock Buffer
2
3
AC'97 CODEC:Realtek ALC201A AMD Socket A 4,5,6
Expansion: PCI Slot * 3
SiS 740 Host / AGP 7
SiS 740 Memory 8
CNR Slot * 1 SIS 740Mutiol/POWER 9
SIS 961A SOUTH BRIDGE 10,11
GPIO Table on SIS961
GPIO_0 I/O MAIN Pull-Up DDR SLOT 1,2 12
GPIO_1 I/O MAIN Pull-Up
GPIO_2 I/O MAIN THERM#
DDR TERMINATOR 13
C C
GPIO_3 I/O MAIN EXTSMI# PCI Slot 1,2 14
GPIO_4 I/O MAIN Pull-Up
GPIO_5 I/O MAIN PREQ#5(Pull-Up)
PCI Slot 3,SiS 301DH 15
GPIO_6 I/O MAIN PGNT#5(Pull-Up) LAN 8100BL 16
GPI_7 I/O RESUME LPCPME#
GPI_8 I RESUME RING
IDE Connector 17
GPI_9 I RESUME RESERVED USB Connector 18
GPI_10 I RESUME RESERVED
GPIO_11 I/O RESUME RESERVED Pull-Up
KB/MS/R45 Connector 19
GPIO_12 I/O RESUME Pull-Up AC'97 CODEC 20
GPIO_13 I/O RESUME Flash Rom protection H: Disable, L: Enable
GPIO_14 I/O RESUME Pull-Up
Audio Connector 21
GPIO_15 I/O RESUME KBDAT CNR Slot 22
GPIO_16 I/O RESUME KBCLK
B
GPIO_17 I/O RESUME MSDAT
LPC I/O W83697HF 23 B
GPIO_18 I/O RESUME MSCLK Flash & FAN & H/WMonitor 24
GPIO_19 I/O RESUME SMBCLK
GPIO_20 I/O RESUME SMBDAT
Parallel Port 25
Serial Port 26
Model option table PWM ST6911D 27
Model type Function BOM Config ERP BOM No. ACPI Contorller 28
Front Panel&ATX power CONN. 29
MS6568 Option:STD(W/TV) Cfg6568-00A-STD 501/601-6568-A10
Decoupling Capacitor 30
MS6568 Option:A(w/o TV) Cfg6568-00A-A
A A
Micro Star Restricted Secret
Title Rev
Cover Sheet
Document Number 0A
MS-6568
MICRO-STAR INT'L Last Revision Date:
CO.,LTD. Thursday, November 29, 2001
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 1 of 30
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5 4 3 2 1
MS-6568 Block Diagram
D
K7 462-Pin Socket Processor Clock D
VRM 9.0
FWDCLK_DDR from SiS740
CPUCLK
CPUCLK#
ADDR(In-Out)
PWR-MNG
DATA
INT & PWR-MNG
APICCLK0
DDRCLK-[0..5]
DDRCLK[0..5]
VGA CONN
SIS740
TV-OUT 301HD
2 DDR
740CCLK
C 740DCLK C
Modules
Hyper Zip
301REFCLK
VOSCIN ZCLK0 PC-266
ZCLK1
PCI 2.2
UltraDMA
IDE Primary 33/66/100
IDE Secondary
PCI Conn 1
PCI Conn 2
PCI Conn 3
PCI CNTRL
PCI 8100BL PCICLK[1..4]
USB Port 1 LAN
SIS961 PCI ADDR/DATA
USB Port 2 USB
APICCLK1
B B
USB Port 3
961PCLK
USB Port 4
OSCI
LPC
Onboard
AC'97 Link
WINBOND
AC'97 Codec
W83697HF
CNR Floopy Parallel
SIOPCLK
SIO24M
A A
I/O set to 48MHz Serial
Micro Star Restricted Secret
Title Rev
Block Diagram
Document Number 0A
MS-6568
MICRO-STAR INT'L Last Revision Date:
CO.,LTD. Thursday, November 15, 2001
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 2 of 30
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By-Pass Capacitors Place near to the Clock Buffer
VCC3_3 L51 U13A 740CCLK C327 X_10p
1 2 CLK3_3V 17 CPUCLK C325 X_10p
VDDPCI R202 10 CPUCLK
10 VDDAGP CPU_T0/CPU_0 54 CPUCLK 4
27 53 R203 10 CPUCLK# CPUCLK# C326 X_10p
AVDD48 CPU_C0 CPUCLK# 4
C461 X_120S_0805 C378 C386 C401 C397 52 R204 0 740CCLK
0.1u CPUCLKT1/CPU1 740CCLK 6
X_4.7U_0805 0.1u 0.1u 0.1u CP11 X_COPPER 50 740DCLK C329 X_10p
CP12 AVDDcore
CP16 X_COPPER CLKCORE2_5V 56 7 R261 10 APICCLK0
AVDDCore 1/IOAPIC APICCLK0 4
R262 10 APICCLK1
APICCLK1 10
APICCLK0 C422 10p
D X_COPPER C328 C359 49 R211 22 740DCLK D
SDRAM_OUT 740DCLK 7
0.1u 0.1u 5 APICCLK1 C423 10p
GND
6 GND
13 11 R263 22 ZCLK0
GND AGPCLK0 ZCLK0 8
18 12 R264 22 ZCLK1
CP10 GND AGPCLK1 ZCLK1 9
24 GND
30 SIOPCLK C429 X_10p
GND FS2 R280 10 961PCLK
37 GND 1/FS2/PCICLK_F 14 961PCLK 9
FS3 R267 10 SIOPCLK CN13
48 GND 1/FS3/PCICLK0 15 SIOPCLK 23
X_COPPER 55 16 FS4 PCICLK1 7 8
VCC2_5 GND FS4/PCICLK1 RN95 10_8P4R PCICLK2
L47 19 5 6
PCICLK2 PCICLK1 PCICLK3
PCICLK3 20 7 8 PCICLK1 14 3 4
1 2 CLK2_5V 8 21 5 6 PCICLK2 PCICLK4 1 2
VDDLAPIC PCICLK4 PCICLK2 14
29 22 3 4 PCICLK3
2.5VDDL/3.3VDD PCICLK5 PCICLK3 15
38 1 2 PCICLK4 X_8P4C-10P
2.5VDDL/3.3VDD PCICLK4 16
C271 X_120S_0805 C355 C342 C396 C362 46
0.1u 0.1u 0.1u 0.1u 0.1u 2.5VDDL/3.3VDD FS0 R265 33 VOSCIN
51 2.5VDDL/3.3VDD 1/FS0/REF0 1 VOSCIN 6
2 FS1 R281 33 OSCI
1/FS1/REF1 OSCI 10
R266 33 UCLK48M C433 10p
301REFCLK 15
26 K7SEL R275 22 UCLK48M SIO24M C432 10p
C399 1*/CPUSEL/48M UCLK48M 11
25 DDRSEL R272 22 SIO24M
*DDRSEL/24_48M SIO24M 23
3 961PCLK C437 X_10p
Xin
10p pin 25 set to 48MHz ZCLK1 C426 X_10p
Y2 9
RESET# ZCLK0 C425 X_10p
C400 14.318MHz
4 OSCI C438 10p
C Xout C
10p VOSCIN C427 10p
ICS950003AF(MAIN CLOCK)
1:These pins have 2X driver strength. 301REFCLK C428 10p
*:These input have 120K internal pull-up resistor to VDD
This pin has 120K pull up to Vdd. --> K7SEL R282 X_10K
VCC3_3
This pin has 120K pull up to Vdd. --> DDRSEL R274 X_10K
VCC3_3
This pin has 120K pull up to Vdd. --> FS3 R258 X_10K
VCC3_3
RN94
This pin has 120K pull down --> FS4 1 2
This pin has 120K pull down --> FS1 3 4
This pin has 120K pull down --> FS2 5 6
This pin has 120K pull down --> FS0 7 8
X_10K_8P4R
B B
U13B
44 R_DCLK4 R212 10 DDRCLK4 By-Pass Capacitors Place near to the Clock Buffer
DDRT1 -R_DCLK4 R213 10 DDRCLK-4
DDRC1 43
42 R_DCLK1 R205 10 DDRCLK1 DDRCLK2 C322 1 2 X_10p
DDRT2 -R_DCLK1 R206 10 DDRCLK-1
DDRC2 41
40 R_DCLK0 R207 10 DDRCLK0 DDRCLK1 C318 1 2 X_10p
DDRT3 -R_DCLK0 R208 10 DDRCLK-0
DDRC3 39
36 R_DCLK2 R209 10 DDRCLK2 DDRCLK0 C320 1 2 X_10p
DDRT4 -R_DCLK2 R210 10 DDRCLK-2
DDRC4 35
34 R_DCLK3 R194 10 DDRCLK3 DDRCLK3 C336 1 2 X_10p
DDRT5 -R_DCLK3 R201 10 DDRCLK-3
DDRC5 33
32 R_DCLK5 R215 10 DDRCLK5 DDRCLK5 C346 1 2 X_10p
SDATA DDRT6 -R_DCLK5 R225 10 DDRCLK-5
10,12,22,28 SDATA 23 SDATA DDRC6 31
SCLK 28 DDRCLK4 C330 1 2 X_10p
10,12,22,28 SCLK SCLK
FWDCLK_DDR 47 45
7 FWDCLK_DDR BUF_IN DDRT0
DDRCLK[0..5] DDRCLK-2 C323 1 2 X_10p
DDRCLK[0..5] 12
DDRCLK-[0..5] DDRCLK-1 C319 1 2 X_10p
DDRCLK-[0..5] 12
ICS950003AF(MAIN CLOCK) DDRCLK-0 C321 1 2 X_10p
A A
DDRCLK-3 C340 1 2 X_10p
DDRCLK-5 C354 1 2 X_10p
DDRCLK-4 C331 1
Micro Star Restricted Secret
2 X_10p
Title Rev
Clock Generator
Document Number 0A
MS-6568
MICRO-STAR INT'L Last Revision Date:
CO.,LTD. Thursday, November 29, 2001
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 3 of 30
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CPU FERR BLOCK
AMD 462PGA Socket - Signals SADDINCLK#
SADDINCLK# 6
VCC3_3
SDATAINCLK#0
SDATAINCLK#[0..3] 6
CPU1A SDATAINCLK#1
SDATA#0 AA35 AE1 A20M# SDATAINCLK#2 V_CORE R28
6 SDATA#[0..63] SDATA0 A20M A20M# 5,10 4.7K
SDATA#1 W37 AG1 FERR SDATAINCLK#3
SDATA#2 SDATA1 FERR HINIT#
W35 SDATA2 INIT AJ3 HINIT# 5,10
SDATA#3 Y35 AL1 INTR
SDATA3 INTR INTR 5,10
SDATA#4 U35 AJ1 IGNNE# R39
SDATA4 IGNNE IGNNE# 5,10 4.7K FERR# 10
SDATA#5 U33 AN3 NMI
SDATA5 NMI NMI 5,10
SDATA#6 S37 AG3 CPURST#
SDATA6 RESET CPURST# 5,6
D SDATA#7 S33 AN5 SMI# C D
SDATA7 SMI SMI# 5,10
SDATA#8 AA33 AC1 STPCLK# FERR B Q7
SDATA8 STPCLK STPCLK# 5,10
SDATA#9 AE37 E 2N3904
SDATA#10 SDATA9 CPU_PWOK C6
AC33 SDATA10 PWROK AE3 CPU_PWOK 28
SDATA#11 AC37
SDATA#12 SDATA11 33p
Y37 SDATA12
SDATA#13 AA37 N1 APICCLK0
SDATA13 PICCLK APICCLK0 3
SDATA#14 AC35 N3 APICD0
SDATA14 PICD0/BYPASSCLK APICD0 10
SDATA#15 S35 N5 APICD1 CPU_PWOK
SDATA#16 Q37
SDATA15 PICD1/BYPASSCLK APICD1 10 CPU SYSCLK BLOCK
SDATA#17 SDATA16 COREFB- C65
Q35 SDATA17 COREFB- AG13 COREFB- 27
SDATA#18 N37 AG11 COREFB+ 0.1u
SDATA18 COREFB+ COREFB+ 27
SDATA#19 J33 V_CORE
SDATA19 3 CPUCLK
SDATA#20 G33 AN17 SYSCLK
SDATA#21 SDATA20 CLKIN SYSCLK#
G37 SDATA21 CLKIN AL17
SDATA#22 E37 SYSCLK C67 680p R62 60.4_1%
SDATA#23 SDATA22
G35 SDATA23 RSTCLK AN19
SDATA#24 Q33 AL19 V_CORE
SDATA#25 SDATA24 RSTCLK R61
N33 SDATA25
SDATA#26 K7CLKOUT RN34 301_1%
L33 SDATA26 K7CLKOUT AL21
SDATA#27 N35 AN21 K7CLKOUT# SADI#0 7 8
SDATA#28 SDATA27 K7CLKOUT SFILLVAL#
L37 SDATA28 5 6
SDATA#29 J37 SADI#1 3 4 SYSCLK# C72 680p R71 60.4_1%
SDATA#30 SDATA29 SDOVAL#
A37 SDATA30 ANALOG AJ13 1 2
SDATA#31 E35
SDATA#32 SDATA31 VREFMODE
E31 SDATA32 SYSVREFMODE AA5 3 CPUCLK#
SDATA#33 E29 W5 VREF_SYS 270_8P4R
SDATA#34 SDATA33 VREF_SYS
A27 SDATA34
SDATA#35 A25 AC5 ZN
SDATA#36 SDATA35 ZN ZP
C
SDATA#37
E21 SDATA36 ZP AE5
VREFMODE R6 270
Near socket-A C
C23 SDATA37
SDATA#38 C27 AJ25 PLLBP#
SDATA#39 A23
SDATA38 PLLBYPASS
AN15 PLLBYCLK
PLLBP# 5 CPU SYSCLK REFERNCE BLOCK
SDATA39 PLLBYPASSCLK PLLBYCLK 5
SDATA#40 A35 AL15 PLLBYCLK#
SDATA40 PLLBYPASSCLK PLLBYCLK# 5
SDATA#41 C35
SDATA#42 SDATA41 PLLMON1
C33 SDATA42 PLLMON1 AN13 PLLMON1 5
SDATA#43 C31 AL13 PLLMON2 V_CORE
SDATA43 PLLMON2 PLLMON2 5
SDATA#44 A29 AC3 PLLTEST#
SDATA#45 C29
SDATA44 PLLTEST PLLTEST# 5 CPU APIC BLOCK
SDATA#46 SDATA45
E23 SDATA46
SDATA#47 C25 S1 SCANCLK1 VCC2_5 R58
SDATA47 SCANCLK1 SCANCLK1 5
SDATA#48 E17 S5 SCANCLK2 100_1%
SDATA48 SCANCLK2 SCANCLK2 5
SDATA#49 E13 S3 SINTVAL 0.5 * VCORE
SDATA49 SCANINTEVAL SINTVAL 5
SDATA#50 E11 Q5 SSHIFTEN 10 APICD0 APICD0 R38 330
SDATA50 SCANSHIFTEN SSHIFTEN 5
SDATA#51 C15 ◦ Jabse Service Manual Search 2024 ◦ Jabse Pravopis ◦ onTap.bg ◦ Other service manual resources online : Fixya ◦ eServiceinfo