Service Manuals, User Guides, Schematic Diagrams or docs for : Microstar MS-6785
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5 4 3 2 1
CPU:
MSI
MS-6785 Ver:101 Pentium4 socket-478 Processor
System Chipset:
SIS648FX(NB) + SIS963(SB)
D
On Board Function Chip: D
LPC I/O-W83697HF
VRM 9.x INTEL CPU Clock
Socket 478 IEEE1394 AGERE-FW803
LAN-VIA VT6103
Audio Codec-CMEDIA 9739A
Command
Address BUS
Data BUS
DDR DIMM
Terminator
Expansion Slot:
AGP3.0 Slot*1
PCI2.2 Slot*3
MINIPCI Slot*1
NB Clock
Data BUS
C NB Clock66 CONTENT C
2 DDR 01-Block drigrame & Cover sheet
SIS648FX Address BUS Modules 02-Power Div & Specification
03-Intel socket 478 CPU part 1
AGP 4X/8X AGP BUS Command 04-Intel socket 478 CPU part 2
05-Main Clock Gen & Clock buffer.
06-SIS648FX-1 Host & AGP
07-SIS648FX-2 Memory
HyperZip
USB Clock 08-SIS648FX-3/4 Power & HyperZip
09-SIS963-1 PCI & IDE & HyperZip
USB Port 2 10-SIS963-2 MISC.
DDR DIMM 11-SIS963-3/4 USB & Power
USB Port 4 12-AGP slot & Pull-UP/DN resistor
PCI Clock Buffer
USB Port 0 13-DIMM 1 & 2
SB 14MHz 14-DDR Terminator
FRONT USB Port 1 15-PCI slot 1 & 2 & 3
B USB USB 2.0 BUS SIS963 SB Clock66 B
USB Port 3 VER:B1 15-MINI PCI slot
PCI BUS 16-W83697HF I/O & BIOS
USB Port 5 17-AC97 Codec
MII Clock Gen 18-Audio connector
IEEE1394 CPU Clock 19-USB port & BIOS
PHY CPU Clock 20-IEEE1394/FW803
LPC Interface
NB Clock 21-VIA VT6103(MII PHY)
NB Clock
PCI Clock Broadcom 22-MS5 ACPI Controller-CRB
AC97 Codec MII NB Clock66
AC97 Link BUS NB Clock66 23-VRM 10
6 CHANNEL 10/100M
PCI Conn 1
PCI Conn 2
PCI Conn 3
+ SPDIF PHY SB Clock66 24-ATX & F-Panel & Game port
SB Clock66
I/O Clock 25-IDE1/2 & PS2
UltraDMA AGP Clock66
MINIPCI SLOT
33/66/100/133 AGP Clock66 26-Com/Parallel port
Keyboard PCI Clock
PCI Clock
Mouse
W83697HF USB Clock
Floopy IDE connector 1 USB Clock
LPC I/O
A Parallel I/O Clock A
IDE connector 2 I/O Clock
Serial
SB 14MHz
SB 14MHz
MICRO-STAR INT'L LO.,LTD.
Title
ISA Flash ROM Cover Sheet & Block Diagram
Size Document Number Rev
MS-6785 101
Custom
Date: Thursday, August 28, 2003 Sheet 1 of 28
5 4 3 2 1
5 4 3 2 1
ATX 12V POWER Supply
3.3V 5V 5VSB 12V Power Delivery Map
1A
D D
VRM10 Center Processer Unit
5VDU VREG
NB-SIS648
3VSB VREG
Core Power
1.8V VREG Z-Link BUS
Memory Interface
VDIMM VREG
AGP Interface
C C
VDDQ VREG
2.5V VREG DDR Memory
SB-SIS963
Core Power
Z-Link BUS
Clock Generator
B B
Clock Buffer
AGP slot
PCI slot
VIA PHY(LAN)
A A
MICRO-STAR INT'L LO.,LTD.
Title
Power Delivery
Size Document Number Rev
MS-6785 101
Custom
Date: Thursday, August 28, 2003 Sheet 2 of 28
5 4 3 2 1
5 4 3 2 1
CPU GTL REFERNCE VOLTAGE BLOCK
VCCP
VID5 24
VID4 24
VID3 24 Length < 1.5inch.
HA#[3..31] R105
6 HA#[3..31] VID2 24 2/3*Vccp 49.9RST
VID1 24 GTLREF1
VID0 24
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3
C53 C63 R106
VID3
VID1
VID0
VID5
VID4
VID2
D 220P 105P/0805 100RST D
Open-D
AD26
AC26
AE25
AD3
AB1
AE1
AE2
AE3
AE4
AE5
W2
W1
M1
M4
M3
M6
U4
R6
U3
U1
R3
R2
N5
N4
N2
N1
U5A
Y1
V3
V2
P6
P4
P3
K1
K4
K2
A5
A4
T5
T4
T2
T1
L2
L3
L6
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
A16#
A15#
A14#
A13#
A12#
A11#
A10#
A9#
A8#
A7#
A6#
A5#
A4#
A3#
VSS_SENSE
ITP_CLK1
ITP_CLK0
VID5#
VID4#
VID3#
VID2#
VID1#
VID0#
DBR
VCC_SENSE
HDBI#0 E21 Every pin put one 220pF cap near it.
6 HDBI#[0..3] DBI0#
HDBI#1 G25 AA21 GTLREF1
HDBI#2 DBI1# GTLREF3
HDBI#3
P26 DBI2# GTLREF2 AA6 Trace Width 15mils, Space 15mils.
V21 DBI3# GTLREF1 F20
GTLREF0 F6 Keep the voltage dividers within 1.5 inches of the
AC3 IERR#
V6 AB4 BPM#5 first GTLREF Pin
FERR# MCERR# BPM5# BPM#4
10 FERR# B6 FERR# BPM4# AA5
STPCLK# Y4 Y6
10 STPCLK# STPCLK# BPM3#
AA3 BINIT# BPM2# AC4
INIT# W5 AB5 BPM#1
10 INIT# INIT# BPM1#
AB2 AC6 BPM#0
RSP# BPM0#
HDBSY# H5 H3 HREQ#4
6 HDBSY# DBSY# REQ4# HREQ#4 6
HDRDY# H2 J3 HREQ#3
6 HDRDY# DRDY# REQ3# HREQ#3 6
HTRDY# J6 J4 HREQ#2
6 HTRDY# TRDY# REQ2# HREQ#2 6
K5 HREQ#1
REQ1# HREQ#1 6
HADS# G1 J1 HREQ#0
6 HADS# ADS# REQ0# HREQ#0 6
HLOCK# G4 AD25
6 HLOCK# LOCK# TESTHI12
HBNR# G2 A6 R104 56
6 HBNR# BNR# TESTHI11
HIT# F3 Y3
6 HIT# HIT# TESTHI10
HITM# E3 W4 R38 56
6 HITM# HITM# TESTHI9
HBPRI# D2 U6
6 HBPRI# BPRI# TESTHI8
HDEFER# E2 AB22
C
6 HDEFER# DEFER# TESTHI7 C
TESTHI6 AA20
TDI_CPU C1 AC23 R103 56
TDI TESTHI5
TESTHI4 AC24
AC20
CPU STRAPPING RESISTORS
TESTHI3
TDO_CPU D5 TDO TESTHI2 AC21 CLOSED TO SOCKET478
AA2 R102 56
TESTHI1 VCCP
AD24
TMS_CPU
TRST#_CPU
F7
E6
TMS
TRST#
Socket478-1 TESTHI0
BCLK1#
BCLK0#
AF23
AF22
CPUCLK-0
CPUCLK0
5
5
VCCP
TCK_CPU D4 F4 HRS#2 THERMTRIP# R70 62
TCK RS2# HRS#2 6
G5 HRS#1 FERR# R39 X_62
RS1# HRS#1 6
CPU_TMPA B3 F1 HRS#0 PROCHOT# R22 62
17 CPU_TMPA THERMDA RS0# HRS#0 6
VTIN_GND C4 BREQ#0 R62 49.9RST
17 VTIN_GND THERMDC
THERMTRIP# A2 V5 CPURST# R114 49.9RST
10 THERMTRIP# THERMTRIP# AP1#
AC1 PWRGD_CPU R113 49.9RST
SKTOCC# AP0# BREQ#0 STPCLK# R21 X_56
5 SKTOCC# AF26 SKTOCC# BR0# H6 BREQ#0 6
PROCHOT# C3 INIT# R23 X_56
10 PROCHOT# PROCHOT#
IGNNE# B2 P1 R45 49.9RST SMI# R25 X_56
10 IGNNE# IGNNE# COMP1
SMI# B5 L24 R118 49.9RST * Short trace CPUSLP# R24 X_56
10 SMI# SMI# COMP0
A20M# C6
10 A20M# A20M
CPUSLP# AB26 L25 FERR#, STPCLK#, SMI#, RN2
10 CPUSLP# SLP# DP3#
A22 K26 A20M# 7 8
RESERVED DP2# CPUSLP#, A20M#, INTR, NMI, INTR
A7 RESERVED DP1# K25 5 6
CPU_VIDPWRGD AD2 J26 IGNNE#, INIT# NMI 3 4
24 CPU_VIDPWRGD CPU_VIDPWRGD DP0#
-----REGISTER CONTROLLER IGNNE# 1 2
AE21 R5 HADSTB#1
RESERVED ADSTB1# HADSTB#1 6 NEED SETTING
AF24 L5 HADSTB#0 X_8P4R-56
RESERVED ADSTB0# HADSTB#0 6
AF25 W23 HDSTB3
RESERVED DSTBP3# HDSTB3 6
PWRGD_CPU AB23 P23 HDSTB2
B 6 PWRGD_CPU PWRGOOD DSTBP2# HDSTB2 6 B
CPURST# AB25 J23 HDSTB1 BPM#0 R34 49.9RST
6 CPURST# RESET# DSTBP1# HDSTB1 6
HD#63 AA24 F21 HDSTB0 BPM#1 R35 49.9RST
D63# DSTBP0# HDSTB0 6
HD#62 AA22 W22 HDSTB#3 BPM#4 R37 49.9RST
D62# DSTBN3# HDSTB#3 6
HD#61 AA25 R22 HDSTB#2 BPM#5 R36 49.9RST
D61# DSTBN2# HDSTB#2 6
HD#60 Y21 K22 HDSTB#1
D60# DSTBN1# HDSTB#1 6
HD#59 Y24 E22 HDSTB#0
D59# DSTBN0# HDSTB#0 6
HD#58 Y23 E5 NMI
D58# LINT1 NMI 10
HD#57 W25 D1 INTR
D57# LINT0 INTR 10
HD#56 Y26
BSEL0
BSEL1
HD#55 D56# PWRGD_CPU C66 X_150P
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
D39#
D38#
D37#
D36#
D35#
D34#
D33#
D32#
D31#
D30#
D29#
D28#
D27#
D26#
D25#
D24#
D23#
D22#
D21#
D20#
D19#
D18#
D17#
D16#
D15#
D14#
D13#
D12#
D11#
D10#
W26 D55#
D9#
D8#
D7#
D6#
D5#
D4#
D3#
D2#
D1#
D0#
HD#54 V24 CPURST# C67 X_150P
D54# CPUSLP# C11 X_150P
M26
M24
M23
M21
AD6
AD5
G26
G23
G22
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