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1 2 3 4 5 6
customer_specified_if
maxi
IRDA_APE(2:0)
IRDA_APE(2:0)
MC_IF_S1_APE(8:0)
MC_IF_S1_APE(8:0)
MC_IF_S2_APE(8:0)
MC_IF_S2_APE(8:0)
MESSI0_CONN(21:0)
MESSI0_CONN(21:0)
MESSI1_CONN(21:0)
MESSI1_CONN(21:0)
LOSSI_CONN(4:0)
LOSSI_CONN(4:0)
A CDP_CONN(8:0) BETTYIO(3:0)
A
CDP_CONN(8:0) BETTYIO(3:0)
USB_CONN_APE(4:0) H_BRIDGE(3:0)
USB_CONN_APE(4:0) H_BRIDGE(3:0)
SPI1_APE(6:0) AUDIOCTRL(5:0)
SPI1_APE(6:0) AUDIOCTRL(5:0)
I2C1_APE(1:0) USB_ACI(7:0)
I2C1_APE(1:0) USB_ACI(7:0)
I2C2_APE(1:0) XAUDIO(7:0)
I2C2_APE(1:0) XAUDIO(7:0)
APE HIRES_I2C(1:0)
HIRES_I2C(1:0) CHARGER
CHARGER
schematic HIRES_CCP(3:0)
HIRES_CCP(3:0)
IRDA_APE(2:0) LOWRES_CCP(3:0) SIM(6:0)
LOWRES_CCP(3:0) SIM(6:0)
MC_IF_S1_APE(8:0) CAM_ACC_CTRL(13:0) SLOWAD(6:0)
CAM_ACC_CTRL(13:0) SLOWAD(6:0)
MC_IF_S2_APE(8:0) JTAG_APE(8:0) PWRONX
JTAG_APE(8:0) PWRONX
MESSI1_CONN(21:0) DISP_ACC_GPIO(7:0) FCI_CMT(3:0)
DISP_ACC_GPIO(7:0) FCI_CMT(3:0)
MESSI0_CONN(21:0) GEN_CTRL_CMT(20:0)
ALT_GPIO_APE(125:0) GEN_CTRL_CMT(20:0)
LOSSI_CONN(4:0) ALT_GPIO_APE(125:0)
SYS_APE(15:0) AUDIO(8:0)
CDP_CONN(8:0) SYS_APE(15:0) AUDIO(8:0)
GPIO_APE(125:0) FM_ANT
USB_CONN_APE(4:0) GPIO_APE(125:0) FM_ANT
SPI1_APE(6:0)
B I2C1_APE(1:0) B
I2C2_APE(1:0)
HIRES_I2C(1:0)
HIRES_CCP(3:0)
LOWRES_CCP(3:0)
CAM_ACC_CTRL(13:0) BB54X
JTAG_APE(8:0) BETTYIO(3:0) schematic
DISP_ACC_GPIO(7:0) H_BRIDGE(3:0)
ALT_GPIO_APE(125:0) AUDIOCTRL(5:0)
SYS_APE(15:0)
USB_ACI(7:0)
XAUDIO(7:0)
CHARGER
SIM(6:0)
SLOWAD(6:0)
PWRONX
GPIO_APE(125:0) GPIO_APE(125:0)
C FCI_CMT(3:0) C
ncw
schematic FCI_CMT(3:0) I2C(1:0)
GEN_CTRL_CMT(20:0) GEN_CTRL_CMT(20:0)
GPIO_APE(125:0)
AUDIO(8:0) AUDIO(8:0)
SYS_APE(15:0)
SPI2_APE(4:0) FM_ANT FM_ANT
SPI2_APE(4:0) SPI2_APE(4:0) LPRFCLK_I
LPRF_APE(6:0) LPRFCLK_I LPRFCLK_I
LPRF_APE(6:0) LPRF_APE(6:0) PCM(3:0)
MCBSP2_APE(3:0) PCM(3:0) PCM(3:0)
MCBSP2_APE(3:0) SPI_DVBH(3:0) CBUS(3:0)
CBUS(3:0) CBUS(3:0)
PUSL(7:0)
PUSL(7:0)
PUSL(7:0) PUSL(7:0)
MESSI_CMT(25:0)
MESSI_CMT(25:0) MESSI_CMT(25:0)
INTUSB(8:0)
INTUSB(8:0) INTUSB(8:0)
CVBS_VIDEO
CVBS_VIDEO COMP_VIDEO
D D
Name Appr
TOP LEVEL dd-mmm-yy
Copyright (C) Nokia Corporation. All rights reserved.
RELEASE3.1 Des.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK. aaheinon 20-Sep-05
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED. Dr. HUHTAMAA 01-Nov-06
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION. File
/nokia/sa_nmp/groups/maxi/ra-6/1nr/testr17_hw Sheet 1 of 100 0 (01)
This document is property of Nokia Corporation
Proj Drw. Print Yes V. Edit
SPP HW 0.0 100
1 2 3 4 5 6
1 2 3 4 5 6
ape_usb_if
betty REFERENCE AREA FOR APE 4100-5999
GPMC_CTRL_APE(17:0)
GPMC_DA_APE(15:0)
USB_CONN_APE(4:0) USB_CONN_APE(4:0)
ape_cpu
schematic ape_memory
INTUSB(8:0) INTUSB(8:0) USB_APE(8:0) USB_APE(8:0) GPMC_CTRL_APE(17:0) 1G_2G
GPMC_CTRL_APE(17:0) GPMC_CTRL_APE(17:0)
GPIO_APE(125:0) GPMC_DA_APE(15:0)
GPMC_DA_APE(15:0) GPMC_DA_APE(15:0)
I2C_APE(1:0) GPMC_AD_APE(10:0)
A GPMC_AD_APE(10:0) GPMC_AD_APE(10:0) A
SYS_APE(15:0) RAM_CTRL_APE(19:0)
RAM_CTRL_APE(19:0) RAM_CTRL_APE(19:0)
RAM_AD_APE(14:0)
RAM_AD_APE(14:0) RAM_AD_APE(14:0)
RAM_DA_APE(31:0)
RAM_DA_APE(31:0) RAM_DA_APE(31:0)
GPIO_APE(125:0)
Components: 5000-5099
JTAG_APE(8:0) JTAG_APE(8:0)
GPIO_APE(125:0)
SPI2_APE(4:0) SPI2_APE(4:0)
ape_ui
maxi
B SPI1_APE(6:0) SPI1_APE(6:0) B
CDP_CONN(8:0) CDP_CONN(8:0)
DISPLAY_APE(23:0) DISPLAY_APE(23:0)
VISSI_CONN
I2C1_APE(1:0) TVOUT_APE(2:0) TVOUT_APE(2:0)
MESSI1_CONN(21:0) MESSI1_CONN(21:0)
MESSI0_CONN(21:0) MESSI0_CONN(21:0)
LOSSI_CONN(4:0) LOSSI_CONN(4:0)
GPIO_APE(125:0)
DISP_ACC_GPIO(7:0) DISP_ACC_GPIO(7:0)
SYS_APE(15:0)
TVOUT_CONN_APE CVBS_VIDEO
ape_power
aalto
I2C_APE(1:0) I2C1_APE(1:0) I2C1_APE(1:0)
IRDA_APE(2:0) IRDA_APE(2:0)
SYS_APE(15:0) SYS_APE(15:0) SYS_APE(15:0)
ape_mc GPIO_APE(125:0)
MCBSP2_APE(3:0) MCBSP2_APE(3:0)
GPIO_APE(125:0) schematic GPIO_APE(125:0) GPIO_APE(125:0)
LPRF_APE(6:0) LPRF_APE(6:0)
MC_IF_S1_APE(8:0) MC_IF_S1_APE(8:0) MC_S1_APE(8:0) MC_S1_APE(8:0) MC_APE(11:0) MC_APE(11:0) MC_APE(11:0)
ALT_GPIO_APE(125:0) ALT_GPIO_APE(125:0)
MC_IF_S2_APE(8:0) MC_IF_S2_APE(8:0) MC_S2_APE(8:0) MC_S2_APE(8:0)
Components: 5200-5299
SPI1_APE(6:0)
I2C2_APE(1:0)
Components: 4200-4399
C
ape_camera C
I2C2_APE(1:0) schematic LOWRES_CCP(3:0)
I2C2_APE(1:0) LOWRES_CCP(3:0)
GPIO_APE(125:0) GPIO_APE(125:0) SPI1_APE(6:0) HIRES_CCP(3:0) HIRES_CCP(3:0)
ape_cmt_if CCP_APE(3:0) CCP_APE(3:0) HIRES_I2C(1:0) HIRES_I2C(1:0)
sleepclk_clkreq_buf GPIO_APE(125:0)CAM_ACC_CTRL(13:0) CAM_ACC_CTRL(13:0)
PUSL(7:0) PUSL(7:0) SYS_APE(15:0)
SYS_APE(15:0) JTAG_GEYE(7:0)
MESSI_CMT(25:0) MESSI_CMT(25:0) SSI1_APE(8:0) SSI1_APE(8:0) Components: 4800-4899
SYS_APE(15:0)
GPIO_APE(125:0)
D D
Name Appr
APE TOP LEVEL, MAXI dd-mmm-yy
Copyright (C) Nokia Corporation. All rights reserved.
Assoc Des.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK. RELEASE3.1 aaheinon 25-Mar-04
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED. Dr. HUHTAMAA 01-Nov-06
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION. File
/nokia/sa_nmp/groups/maxi/ra-6/1nr/testr17_hw/ape/ape Sheet 2 of 100 1 (42)
This document is property of Nokia Corporation
Proj Drw. Print Yes V. Edit
SPP HW 0.0 187
1 2 3 4 5 6
1 2 3 4 5 6
VCORE_APE
REFERENCE AREA FOR THIS SHEET: 4800-4899
RAM_CTRL_APE(19:0) C4814 C4825 C4826 C4800 C4816 C4817 C4818 C4819 C4820 C4821 C4822
Last used references:
D4800 1u5 1u5 1u5 100n 100n 100n 100n 100n 100n 100n 100n R4806
OMAP2420POP_PS2.2_N1 2351039 2351039 2351039 2351017 2351017 2351017 2351017 2351017 2351017 2351017 2351017 C4838, frees:C4805,C4809,C4811,C4812,C4813,C4815,C4829,C4831,C4837
RAM_AD_APE(14:0)
J4800 SDRAM
0 H25 0 sdrc_ncs0 Y26 J4801 14 J4849
1 M25 Y25 15 GND
1 sdrc_ncs1 L4800 ALT_GPIO_APE(125:0)
2 L25 2 sdrc_cke0 AF24J4802 0
3 L26 3 sdrc_cke1 AE25 1 1 ALT_GPIO38
4 P25 4 SDRC_A sdrc_clk A15 J4804 3
flashing from SSI1/UART3(GPIO36 up by N4200 H7)
5 N25 5 sdrc_nclk B16 2
6 R26 AA25J4805 4 GPIO_APE(125:0)
6 sdrc_ncas
7 R25 AC26J4806 5 N4801 should be placed close to D4800
7 sdrc_nras VCORE_APE VAUX_APE VIO_APEVIO_APE I2C1_APE(1:0)
A 8 T25 8 sdrc_nwe AE23J4807 7 D4800 and D5000 for monitoring temperature 0 GPIO0 APE_CMT DSP INTERRUPT (A_SYNC) VIO_APE A
9 M26 OMAP2420POP_PS2.2_N1 1
R4805
9 GPIO1 Camera door switch (Aalto), COP8 reset (Maxi) VIO_APE
1430762 2k2
1430762 2k2
600R/100MHz
10 H26 C2 J4808 16 A13 C15
R4801
R4802
10 sdrc_dqs0 vss vdd
1430762 2k2
VIO_APE
I2C1_APE(1:0)
boot device selection, memory sheet
11 T26 B10 17 A18 C16 3
3203755
L4800
11 sdrc_dqs1 vss vdd GPIO3
1430762 2k2
100k 1430804
12 W26 B19 18 A22 D15 N4801 4 D4800
R4806
12 sdrc_dqs2 vss vdd GPIO4
GPIO1 13 13 W25 A24 19 A5 D16 TMP105YZCR_REV.B 5 OMAP2420POP_PS2.2_N1
R4804
13 sdrc_dqs3 vss vdd GPIO5 I2C2_APE(1:0)
GPIO0 14 14 AA26 14 sdrc_dm0 C1 J4809 10 A9 vss vdd E26 C2 A0 SDA A1 0 ALT_GPIO6 6 6 GPIO6 TV-buffer enable ALT_GPIO6 D6 gpio_6 i2c1_scl P24 1
RAM_DA_APE(31:0) NCV3 tq sdrc_dm1 A8 11 B13 vss vdd F3 SCL B1 1 ALT_GPIO7 7 7 GPIO7 Blizzard PD GPIO36 J4825 Y18 gpio_36 i2c1_sda R19 0
J4836 GPIO125
BOOT configuration,
LPRF_APE(6:0)
8 J4803 AF23 sdrc_ba0 sdrc_dm2 A17 12 B18 vss vdd F4 B2 ALERT ALT_GPIO8 8 8 GPIO8 GPIO62 AD18 gpio_62 i2c2_scl L19 1
9 AC25 sdrc_ba1 sdrc_dm3 A23 13 B22 vss vdd G14 ALT_GPIO9 9 9 GPIO9 CCP switch i2c2_sda K19 0
B5 vss vdd G15 C1 V+ GND A2 ALT_GPIO10 10 10 GPIO10 GPIO119 AF6 gpio_119
0 J4810 F1 B9 vss vdd G3 ALT_GPIO11 11 11 GPIO11 GPIO120 AF4 gpio_120 uart1_tx H12 BT_TX 2 2 ALT_GPIO9
SDRC_D C13 H14 4605989
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