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A HIGH PERFORMANCE
DISC CONTROLLER
INTRODUCTION All recoverable errors can be handled by the disc control-
TheAm2901A Four-Bit Bipolar Microprocessor Slice, a sig- ler without the intervention of the host computer. In addi-
nificant advance in the state-of-the-art technology in Low- tion to supplying logic processing power, the micro-
Power Schottky Integrated Circuits, enables the Design En- processor also provides seventeen high-speed, 8-bit tem-
gineer to implement new systems with higher logic density, porary storage registers. Most of these registers are
better cost-effectiveness, and improved product versatility. assigned specific functions. In this application, twelve reg-
The higher logic density and better cost-effectiveness of isters were used to build six 16-bit registers. These regis-
microprocessor-based designs is well-known and will not be ters contain the disc address, memory address, transfer
discussed here. This application note, describing a Pertec word count, control and status information, error informa-
D3441 Disc Controller for the Digital Equipment Corporation tion, and the checksum. Of the remaining five registers,
(DEC) PDP-11, will demonstrate how improved product ver- four are utility registers that are employed as needed, and
satility can be achieved by employing the Am2901A in the the fifth is the Q register which can be used to store and
design of a peripheral controller. retrieve 8-bit values.
This disc controller design is not intended to be an example Figure 2, depicting the two Am2901A's, shows that the
of a minimal logic, cost-effective controller only one step microprocessor interface to the other sub-sections is very
away from the marketplace. Instead, think of it as the grand- simple. The 8-bit bidirectional M bus (microprocessor bus)
father.lts large, writeable microprogram control store and its enables the microprocessor to input/output data from/to the
generalized disc and UNIBUS interface make it suitable to other subsections of the disc controller. Four condition lines
(ZERO, MINUS, OVRFL, and CARRY) communicate the re-
be the prototype for a family of disc controllers. Individual
sults of logic and arithmetic operations to the sequencer,
controllers would use ROM's of the appropriate size for
which may select one ofthese lines to determine the address
the control store, and the disc interface would be tailored
to a particular disc drive. of the next microinstruction. Notice that since the condition
lines are latched, the sequencer is always looking at the
conditions of the previous microinstruction. On each clock
THE DISC CONTROLLER
cycle, theAm2901A's are presented with a 19-bit instruction
A major advantage of designing with microprocessors is that from the microprogram register. This 19-bit instruction con-
the designs tend to be highly structured and therefore much sists of a 9-bit microinstruction decode, an 8-bit register
easier to comprehend. Referring to Figure 1, notice that the select, the carry-in, and the output enable (see Figure 3). By
disc controller is composed of a small number of well- the end of the clock cycle, the specified arithmetic or logic
defined sub-sections. Each sub-section will be discussed in operation has been performed, the result has been stored,
detail and then the interaction between sub-sections will be and the condition codes have been latched. The micro-
described. The reader will find that the individual sub- processor is now ready to perform the next instruction.
sections are easy to understand because each one has a
limited but well-defined role in the disc controller. THE SEQUENCER
A microinstruction usually has two primary parts. These are:
THE MICROPROCESSOR (1) the definition and control of all elemental micro-
The microprocessor, 8 bits wide using two Am2901A's, operations to be performed, and (2) the definition of the
provides the disc controller with an arithmetic and logic address of the next microinstruction to be executed. Refer-
capability. In this application, the arithmetic capabilities of ring back to the consideration of the disc controller as a state
the Am2901A are not taxed. Mainly, they are used to gen- machine, it is evident that the controller's ability to perform
erate checksums on disc reads. The principal role of the any useful function is dependent on its ability to progress
microprocessor in this design is that of a logic processor. from state to state in a controller manner. It is the task ofthe
As the reader will discover further on, both the DEC UN- sequencer to provide control over the transitions from state
IBUS interface and the disc interface are very general to state.
purpose. It is the logic processing power of the Am2901A, In order to provide this control, some feedback from various
coupled with the control information of the micropro- system components is necessary. For example, when read-
gram, that enables the disc controller to completely emu- ing a word from PDP-11 main memory, the controller must
late the RK11 disc controller (SSI TTL controller from first request the UNIBUS by asserting NPR (non-processor
DEC). If the disc controller is considered as a state request). The controller then enters a waiting state and the
machine, at any given instance, the current state of the sequencer will keep the controller in this state until the signal
machine is to a large degree defined by the contents of NPR RDY informs the sequencer that the UNIBUS is now
the microprogram register. When an unexpected state is available for the transfer. At this time, the sequencer will
encountered, the logic processing power of the micro- transition the controller into the next state which would start
processor enables it to exercise more control over the driving the address onto the UNIBUS and assert MSYN (mas-
selection of the next state to enter. In the disc controller, ter sync). The sequencer designed for this controller (see
this is evidenced more through error recovery procedures. Figure 2) provides for up to sixteen different input condi-
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