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34675C_lxdb800_spec_update


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AMD GeodeTM LX DB800
Development Board
Specification Update

1.0       Scope
This document discusses known issues of the AMD               Note:   This is revision C of this document. The changes
GeodeTM LX DB800 development board. The table below                   between revision B (dated January 2006) are in
provides a summary of the issues. A detailed description of           issue #3 and are non-technical. Minor rewording of
each issue, its impact and a recommended resolution/fix               the Description and Resolution. In the Resolution,
follow.                                                               the application note that is referenced changed
                                                                      names. Now called "AMD GeodeTM CS5536 Com-
                                                                      panion Device USB 2.0 Device Linux Workaround"
                                                                      with publication ID remaining the same (40471).


                                            Table 1-1. Issues Summary
    Issue
  #(Note 1)    Description

      1        Limited High speed USB 2.0 functionality
      2        Suspend-to-RAM non-functional
      3        USB 2.0 high speed (HS) device defaults to full speed (FS) after wake from APM Suspend (S3)
Note 1. Issue numbers may not be sequential since issues are omitted once they are resolved.




34675C - March 2006 - Confidential                                                                                    1
                                                                                                          Specification Update

                                                                                             34675C - March 2006 - Confidential




2.0       Issues

1)    Limited high speed USB 2.0 functionality                           that when the system is put in the Suspend-to-RAM
                                                                         state it will not power off the ATX supply.
      Description: USB high speed data transfers may not
      complete.                                                          Resolution: The CS5536 signal WORK_AUX needs
                                                                         to be connected to the inverter at R67 that controls
      Implications: A signal integrity issue has been iden-
                                                                         the ATX power supply main rails. This change will
      tified with the USB 2.0 interface that affects all four
                                                                         cause the system to power up instantly when the ATX
      USB ports routed through the ETX connector X1.
                                                                         power supply is connected for the first time. Power
      There is coupling between the PCI AD bus and the
                                                                         management firmware should configure GPIO24 to
      USB data signal lines. This causes unwanted noise
                                                                         be WORK_AUX resulting in correct system behavior
      on the USB signal pairs that manifest themselves as
                                                                         for the S5 and S3 states. The power button will then
      spikes in the amplitude of the differential signaling.
                                                                         be required to turn on the system.
      The USB 2.0 specification states that high speed
      signaling is to be 400 mVpp, and the EHCI controller               This has been corrected in the production version of
      must tolerate signaling with differential amplitudes               the board.
      <525 mV. Signals with differential amplitudes >625
      mV must reliably activate the Disconnection Enve-             3    USB 2.0 high speed (HS) device defaults to full
      lope Detector. On the LX DB800 spikes caused by                    speed (FS) after wake from APM Suspend (S3)
      the coupling of the PCI bus to the USB signal pairs
      exceed the EHCI controller's signal amplitude limit for            Description: In APM Suspend (S3), both the EHC
      high speed operation causing the disconnection of                  and OHC controllers are switched off on the CS5536
      the USB device. The OS typically will show the                     companion device. The EHC spec implies that the
      device as being disconnected and immediately                       CONFIGFLAG and the PORTSC[4:1] registers be
      reconnects the device in Full speed mode. If an appli-             auxiliary powered in S3. This is not implemented in
      cation is in the middle of a High Speed data transfer              our controllers, so the BIOS restores the contents of
      when this occurs, the transfer will be incomplete.                 these registers before the BIOS gives ownership to
                                                                         the operating system during resume from S3.
      Resolution: Testing and evaluation has shown that
      the addition of 18 pF to 22 pF capacitors on the USB               Implications: The Windows EHCI driver does a full
      data signals reduces the amplitude of the unwanted                 initialization and enumeration after resuming from
      spikes to within the EHCI tolerable level (<625 mVpp)              S3, so no impact was seen.
      with a margin of approximately 0-25 mV on USB
                                                                         The Linux EHC driver does not do a full initialization
      ports 2 and 3. USB ports 0 and 1 signaling is not
                                                                         sequence. Therefore, the ConfigFlag is not set and
      significantly affected by the addition of capacitance
                                                                         PORTSC.PortPower is cleared. A connected device
      on the data signals. Testing has shown that USB
                                                                         is then always routed to the OHC.
      ports 0 and 1 may work at high speed, but could fail
      with large data transfers. On the LX DB800 ETX                     Resolution: The workaround is to unload/load the
      SOM, 0402 18 pF to 22 pF ceramic capacitors can                    driver around the sleep cycle. See the application
      be added on the bottom of the PCB directly beneath                 note titled AMD GeodeTM CS5536 Companion
      the AMD GeodeTM CS5536 companion device on the                     Device USB 2.0 Device Linux Workaround (publica-
      resistor pads: R317 



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