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Keysight Technologies
Properly Powering On and Off Multiple
Power Inputs in Embedded Designs


                                 Application Note




    This is the irst in a
    series of application
    notes that addresses
    power optimization,
    characterization, and
    simulation challenges
    in embedded designs.
Introduction                                                                    this is a costly measure that still has limitations in timing accuracy. The
                                                                                other option is to employ hardware-timed switching. This comes with
If you are designing embedded systems, you face various power                   a high time overhead and extra cost, since you need to either create
optimization and power characterization hurdles throughout the                  custom hardware or configure a DIO card to accurately time switch
design process. You know what you want to output, simulate and                  closures. These sequencing configurations often need to be reconfig-
measure--but you need a whole "toolbox" of instruments and                      ured each time the design changes or a new design is started.
hardware to do the job. Properly configuring the various tools into an          Setting up various slew rates on power inputs when you are using
accurate, dependable solution can be difficult and time consuming.              fixed regulator circuits requires some type of RC network at the output.
When you need to rerun a test later, you may have to repeat the whole           Once again, this is an inflexible solution since it cannot be easily
time-intensive process of configuring your test setup.                          adjusted. Controlling slew rate on programmable power supplies may
The challenges you face can be divided into three categories: properly          be possible through programming if you are working with a high-
powering on and off multiple power inputs, characterizing power                 performance supply. Otherwise, you will need to use some type of RC
needs under dynamic load conditions and simulating real-world power             network on the output of the supplies.
conditions. This application note will focus on properly powering on
and off multiple power inputs in an embedded design. We will discuss            Product Features
a simple way to overcome power sequencing challenges without the
need for a costly toolbox of hardware.                                          Solution
                                                                                The power input challenges embedded design engineers face can
Properly Powering On and Off                                                    be solved with the Keysight Technologies, Inc. N6705A DC Power
Multiple Power Inputs                                                           Analyzer. The N6705A provides four programmable power supply
                                                                                outputs each with dynamic measurement capability. Each of the
Embedded systems can be made up of any combination of microcon-                 four output's characteristics are determined by which plug-in power
trollers, FPGAs, ASICs and memory chips. These individual integrated            module is used for that output. There are 21 different power modules
circuits often have multiple power input requirements that must be              available for the N6705A. Table 1 on page 7 shows a list of suggested
properly sequenced on and off to prevent latch-up. Precise slew rates           modules for the N6705A and their key specifications that make them a
on each input at power on or power off may be required as well.                 good fit for embedded design development.

Latch-up may cause a wasteful initial surge of current at turn on,              The N6705A's power outputs have built-in sequencing capabilities.
or it may be severe enough to inflict permanent damage to the                   Sequencing time delays can range between 0 and 1 s in 1-ms steps or
semiconductor device. Even without the fear of latch-up, powering on            0 and 1000 s in 1-s steps. The sequence timing is all done in the
your design can become complicated if the embedded system consists              hardware of the instrument, which guarantees a high level of accuracy
of multiple integrated circuits where some become active instantly              and repeatability. Precision slew rate control on each channel, as
and others require some time to configure or execute a start-up                 fast as 20 s per volt, allows you to set voltage ramp up times on
routine that must be retrieved from a memory device. In this situation,         a per-channel basis. Other N6705A features that are applicable to
there may be power optimization advantages to establishing precise              embedded design:
sequencing across the integrated circuits.
                                                                                

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