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DesignCon 2014 Mechanism of Jitter Amplification in Clock Channels Fangyi Rao, Agilent Technologies, Inc. [email protected] 408-553-4373 Sammy Hindi, Juniper Networks [email protected] 408-936-1280 Abstract Jitter amplification in clock channels is analyzed analytically in terms of signal transfer function or channel S-parameters. The periodicity of the clock pattern eliminates the inter-symbol-interference jitter so jitter at the channel output is entirely induced by input jitter. A phase modulation (PM) approach is employed to derive the jitter transfer function and amplification factors for sinusoidal jitter (SJ), duty-cycle-distortion (DCD) and random jitter (RJ). Results demonstrate that jitter amplification is the consequence of smaller attenuation at the jitter lower sideband (LSB) than at the fundamental, which is at a higher frequency than the LSB. Scaling equations of DCD and RJ amplifications with channel loss is obtained by employing an exponential loss model. It is shown that jitter is amplified by lossy channels at any frequency below Nyquist and the effect grows exponentially with jitter frequency and data rate. Amplification factors of SJ, DCD and RJ are also derived within the square wave representation of clock signals, and the results are shown to recover those using the PM approach when high order harmonics are neglected. The theory is verified by simulations. Author(s) Biography Fangyi Rao is a master engineer at Agilent Technologies. He received his Ph.D. degree in theoretical physics from Northwestern University. He joined Agilent EEsof in 2006 and works on Analog/RF and SI simulation technologies in ADS and RFDE. From 2003 to 2006 he was with Cadence Design Systems, where he developed the company's Harmonic Balance technology and perturbation analysis of nonlinear circuits. Prior to 2003 he worked in the areas of EM simulation, nonlinear device modeling, and medical imaging. Sammy Hindi is a senior electrical engineer at Juniper Networks. Prior to Juniper he was a technical leader at Cisco System for more than 11 years and a principal engineer at Rambus Inc. for six years. Prior to Rambus he was a design engineer at different firms including Tandem Computer and Philips. He received his BS degree in Electrical Engineering from University of Baghdad. 1. Introduction High speed interconnect performance is increasingly influenced by jitter as data rate advances. The amount of jitter is modulated by channel dispersion as signals propagate in the system. It is observed in both measurements and simulations that jitter can be amplified by a lossy channel even when the channel is linear, passive and noiseless [1]- [5]. The effect happens to different jitter types including sinusoidal jitter (SJ), duty-cycle- distortion (DCD) and random jitter (RJ). In particular, DCD and RJ amplifications in clock signals are found to scale uniquely with channel loss [2], indicating that loss is responsible for the effect. The mechanism of jitter amplification in clock channels is explained theoretically in [5]. It is demonstrated that jitter amplification is the consequence of smaller attenuation at the jitter lower sideband (LSB) than at the signal carrier, which is at a higher frequency compared to the jitter LSB. Such attenuation difference amplifies the phase modulation (PM), which is equivalent to jitter, in the channel output signal, leading to jitter amplification. The scaling of DCD and RJ amplifications with channel loss is derived using an exponential loss model. Jitter is found to be amplified by lossy channels at any frequency below Nyquist, and the effect grows exponentially with jitter frequency and data rate. In this paper jitter amplification in clock channels is analyzed analytically using the techniques developed in [5]. The advantage of using clock signals is that the periodicity of the 1010 clock pattern eliminates the inter-symbol-interference (ISI) jitter so jitter at the channel output is entirely induced by input jitter. Two approaches are employed in the study. In the first approach, the repeated 1010 clock pattern is approximated by a sinusoidal wave with frequency at half of the clock data rate and with phase modulation that represents jitter. Jitter transfer functions and amplification factors of SJ, DCD and RJ are derived in terms of signal transfer function or channel S-parameters. Scaling equations of DCD and RJ amplifications with channel loss are obtained. In the second approach, a more realistic square wave representation is used to model the clock signal with rise and fall edges being shifted by jitter. It is shown that the square wave formulation yields the same results as the sinusoidal formulation does when high order harmonics are ignored. Theoretical predictions are confirmed by numerical Monte Carlo channel simulations running one million bits. 2. Jitter Transfer Function and Amplification 2.1 Sinusoidal Jitter In lossy channels high order harmonics are heavily attenuated and the 1010 clock pattern can be approximated by a sinusoidal wave with frequency at one half of the data rate. Jitter in the input clock signal, vin, can be represented by phase modulation as vin (t ) A cos[0 t 0 (t )] (1) where 0 is the fundamental frequency of the clock signal, 0 a constant phase offset, and the phase modulation that represents jitter. When is small, Eq. 1 can be linearized as A vin (t ) [exp( j 0 t j 0 ) j (t ) exp( j 0 t j 0 ) 2 (2) exp( j 0 t j 0 ) j (t ) exp( j 0 t j 0 )] Consider a sinusoidal jitter at frequency . (t ) ( ) exp( j t ) ( )* exp( j t ) (3) Substitution of Eq. 3 into Eq. 2 yields A vin {exp( j 0 t j 0 ) 2 j ( ) exp[ j ( 0 )t j 0 ] j ( ) * exp[ j ( 0 )t j 0 ] (4) exp( j 0 t j 0 ) j ( ) exp[ j ( 0 )t j 0 ] j ( ) * exp[ j ( 0 )t j 0 ]} Eq. 4 shows that the PM spectrum is shifted by the carrier and split into the lower sideband at 0-, the upper sideband at 0+, and their complex conjugates. Assume the signal transfer function of the channel is H(). The output signal, vout, is given by A vout (t ) {H ( 0 ) exp( j 0 t j 0 ) 2 jH ( 0 ) ( ) exp[ j ( 0 )t j 0 ] jH ( 0 ) ( ) * exp[ j ( 0 )t j 0 ] H ( 0 ) exp( j 0 t j 0 ) jH ( 0 ) ( ) exp[ j ( 0 )t j 0 ] (5) jH ( 0 ) ( ) * exp[ j ( 0 )t j 0 ]} A H ( 0 ) exp( j 0 t j 0 )[1 j (t )] 2 A H ( 0 ) exp( j 0 t j 0 )[1 j (t )] 2 where + and - are defined as H ( 0 ) j t H ( 0 ) j t (t ) ( )e ( ) * e H ( 0 ) H ( 0 ) (6) H ( 0 ) j t H ( 0 ) j t (t ) ( )e ( ) * e H ( 0 ) H ( 0 ) Notice that +=-*. For small Eq. 5 can be rewritten as vout (t ) A | H ( 0 ) | exp[ Im (t )] (7) cos 0 t j 0 jH (0 ) j Re (t ) where Re+ and Im+ denote real and imaginary parts of +, respectively. The phase modulation in the output signal is given by the Re+ term in Eq. 7 as out (t ) Re (t ) H ( 0 ) H ( 0 ) (8) | ( ) | cos[t ( ) ] H ( 0 ) H ( 0 ) where is the phase of [H(+0)/H(0)+H(-0)/H(-0)]. Equation 8 shows that a SJ is induced in the output by the input SJ. The jitter transfer function, defined as the amplitude ratio between output and input SJ, is obtained as 1 H ( 0 ) H ( 0 ) FSJ ( ) (9) 2 H ( 0 ) H ( 0 ) Equation 9 describes the relation between jitter amplification and channel dispersion. In a lossy channel, as illustrated in Fig. 1, H() decays with frequency exponentially. The lower sideband of PM at 0- is attenuated less than the carrier is, producing a gain in the output PM that leads to jitter amplification. Equation 9 demonstrates that the amplification, dominated by the -0 term, arises primarily from the attenuation difference between the LSB and the fundamental. Equalizations that compensate high frequency loss reduce the amplification effect. |H()| (dB) 0 Frequency LSB Carrier USB 0 0 Figure 1. Mechanism of jitter amplification in lossy channels. It should be pointed out that the input SJ also induces an amplitude modulation in the output signal, which is given by the Im+ term in Eq. 7 as Aout (t ) A | H ( 0 ) | exp[ Im (t )] A | H ( 0 ) | A | H ( 0 ) | Im (t ) (10) H ( 0 ) H ( 0 ) | ( ) | sin[t ( ) ] H ( 0 ) H ( 0 ) where is the phase of [H(+0)/H(0)-H(-0)/H(-0)]. This amplitude modulation is a sinusoidal at frequency and causes eye height impairment at the channel output. 2.2 Duty-cycle-distortion When input jitter is absent, the ideal input transition time of the n-th bit is determined by zero-crossing of vin expressed in Eq. 1 with =0 as cos( 0 t n 0 ) 0 in (11) sin( 0 t n 0 ) (1) n 1 in in which the second equation ensures that even bits are logic 1. With input DCD the transition time is shifted from by n (1) n1 sin(0 t n 0 ) in in (12) where is half the peak-to-peak DCD. As a result, all even bits are longer (when > 0) than all odd bits. Equation 12 indicates that DCD is equivalent to a SJ at frequency 0, and the equivalent PM is (t ) 0 in (t ) 0 cos(0 t 0 ) (13) 2 or 0 (0 ) j exp( j 0 ) (14) 2 The jitter amplification factor for DCD is thus given by Eq. 9 at =0 as 1 H (2 0 ) H (0) FDCD (15) 2 H ( 0 ) H ( 0 ) The mechanism of DCD amplification can be understood intuitively in terms of the DC shift introduced by input DCD [1]. Note that at =0 the LSB becomes a DC component. Substituting Eq. 13 into Eq. 2 yields 0 0 vin (t ) A cos(0 t 0 ) A A cos(20 t 2 0 ) (16) 2 2 The input DC shift produced by DCD is A0 /2. The output signal is 0 vout (t ) | H ( 0 ) | A cos[ 0 t 0 H ( 0 )] H (0) A 2 (17) 0 | H (2 0 ) | A cos[2 0 t 2 0 H (2 0 )] 2 The output DC shift is H(0)A0 /2. Eq. 17 shows that the output signal is composed of fundamental and DC components if the second harmonic is ignored in lossy channels. As illustrated in Fig. 2, the DC shift causes all logic 1 bits in the 1010 pattern to be longer (when > 0) than all logic 0 bits at vout=0, leading to DCD in the output. The zero- crossing time shift from the ideal crossing time given by ( ) ( ) can be calculated from the DC term and the fundamental slew rate at , which is ( ) ( ) , as H (0) A 0 / 2 1 H (0) n (1) n1 out (1) n1 (18) H ( 0 ) A 0 2 H (0 ) Equation 18 gives the same DCD amplification factor as Eq. 15 does when the H(20) term is ignored. Note that in most channels H(0) is around 0dB. Equation 18 and Fig. 2 show that the higher the loss at the fundamental, the larger the output DCD. Figure 2. Mechanism of DCD amplification. 2.3 Random Jitter RJ in the input signal is assumed to be white noise, and its averaged power is given by the integration of the power spectral density (PSD) within the jitter Nyquist frequency, which equals 0. 0 (t ) 2 dC 2C0 (19) 0 where C is the constant input RJ PSD. The output RJ power is given by the jitter transfer function and C as 0 out (t ) 2 2C dFSJ ( ) 2 (20) 0 The RJ amplification factor, defined as the RMS ratio between output and input RJ, is out (t ) 2 FRJ (t ) 2 2 (21) 1 0 H ( 0 ) H ( 0 ) 4 0 0 d H ( 0 ) H ( 0 ) When impedance mismatch in the channel is negligible, H() in Eqs. 9, 15 and 21 can be replaced by channel forward S-parameters. 3. Equivalence between Sinusoidal and Square Wave Representations While all discussions so far are based on the sinusoidal wave representation of the clock signal, it can be shown that same results can be obtained using the square wave representation. 3.1 Sinusoidal Jitter In Fig.3 the input clock signal is represented by a 1010 square wave whose n-th transition time is at , where T is the unit interval and the input jitter at the n-th bit. Note that 0T= since 0 is half of the data rate. As discussed in [3], [4] and [5], the output signal of a linear channel can be calculated by linear superposition as vout (t ) R(t lT l even in l ) R(t mT m odd in m ) (22) where R(t) is the channel step response. nT vin 1 0 1 0 1 t Figure 3. Square wave representation of clock signal When the input jitter is zero, there is no jitter in the output due to the periodicity of the clock pattern. For a given delay td, vout crosses the same value at t = nT+td for any integer n. With the presence of input jitter, jitter induced in vout can be measured by the crossing time shift, which is determined by v out (nT t d n ) out R(nT t l even d n lT lin ) out R(nT t m odd d n mT m ) out in (23) R(nT t l even d lT ) R(nT t m odd d mT ) where outn is the shift of the n-th crossing. For small jitter, linearization of Eq. 23 yields (1) h(nT t mT ) m d in m n out m (24) (1) h(nT t mT ) m m d where h(t) = dR(t)/dt is the channel impulse response, and its Fourier transform (FT) is the transfer function H() used in previous sections. Consider a sinusoidal input jitter at frequency , m cos(mT ) in (25) Substitution of Eq. 25 into Eq. 24 yields h(nT t d mT ){exp[ j ( 0 )mT ] exp[ j ( 0 )mT ]} out m h(nT t mT ) exp( j 0 mT ) n 2 d m (26) ~ ~ H nT td ( 0 ) H nT td ( 0 ) ~ 2 H nT td ( 0 ) ~ in which identity (-1)m = exp(-j0mT) is used. H ( ) is the discrete-time Fourier transform (DTFT) of series h(mT+) defined as ~ H ( ) h(mT ) exp( jmT ) (27) m The relation between DTFT and FT is [6] ~ H ( ) H ( 2k0 ) exp[ j ( 2k0 ) ] (28) k By utilizing Eq. 28, Eq. 26 can be written in terms of H() as H ( k ) exp[ j ( k 0 0 )t d ] out k odd exp( jnT ) H (k ) exp( jk t ) n 2 0 0 d k odd (29) H ( k ) exp[ j ( k 0 0 )t d ] k odd exp( jnT ) 2 H (k ) exp( jk t ) k odd 0 0 d Here identity exp(jk0nT) = (-1)n for odd integer k is used. Notice that the first term in Eq. 29 is the complex conjugate of the second. Thus, H ( k ) exp[ j ( k 0 0 )t d ] out k odd H (k ) exp( jk t ) n 0 0 d k odd (30) H ( k0 ) exp[ j ( k0 )t d ] cos nT k odd H (k0 ) exp( jk0 t d ) k odd Equation 30 shows that a SJ is induced at the channel output by the input SJ and the jitter transfer function is H ( k0 ) exp[ j ( k0 )t d ] FSJ ( ) k odd (31) H (k0 ) exp( jk0 t d ) k odd In lossy channels, high order harmonics can be neglected, and Eq. 31 can be approximated as H ( 0 ) exp[ j ( 0 )t d ] H ( 0 ) exp[ j ( 0 )t d ] FSJ ( ) (32) H ( 0 ) exp( j 0 t d ) H ( 0 ) exp( j 0 t d ) By choosing td to be the phase delay of H at 0, the phase of H(0) is cancelled by exp(j0td). As a result, ( ) ( ) and ( ) ( ) are both real and equal to each other. Eq. 32 then becomes 1 H ( 0 ) exp[ j ( 0 )t d ] H ( 0 ) exp[ j ( 0 )t d ] FSJ ( ) 2 H ( 0 ) exp( j 0 t d ) H ( 0 ) exp( j 0 t d ) (33) 1 H ( 0 ) H ( 0 ) 2 H ( 0 ) H ( 0 ) Equation 33 is identical to Eq. 9. As expected, the square wave formulation converges to the sinusoidal wave formulation when high order harmonics are ignored. Equation 33 also establishes the equivalence of DCD and RJ amplification results between sinusoidal and square wave representations. Nevertheless, derivations for DCD and RJ directly from the square wave formulation are provided in the following two sections. 3.2 Duty-cycle-distortion Substituting Eq. 12 into Eq. 24 yields h(nT t d mT ) out m (1) h(nT t d mT ) n m m ~ H nT td (0) ~ (34) H nT td ( 0 ) n 1 H (l 0 ) exp( jl 0 t d ) (1) l even H (k k odd 0 ) exp( jk 0 t d ) where td is the phase delay of H at 0 as in the SJ discussion above. The DCD amplification factor is given by Eq. 34 as H (l ) exp( jl t ) 0 0 d FDCD l even (35) H (k ) exp( jk t ) k odd 0 0 d After neglecting high order harmonics, both Eq. 35 and Eq. 15, which is derived from the sinusoidal wave representation, converge to 1 H (0) FDCD (36) 2 H (0 ) 3.3 Random Jitter As pointed out in section 2.3, RJ is uncorrelated white noise, and n m ( RJ ) 2 nm in in in (37) where is the input RJ RMS. Substituting Eq. 37 into Eq. 24 leads to h(nT t d mT ) 2 ( n ) 2 ( RJ ) 2 out in m 2 (1) h(nT t d mT ) m m 0 ~ 2 1 0 d H nT td ( ) ( RJ ) 2 in ~ (38) 20 H nT td (0 ) 2 2 0 1 d H ( 2l ) exp[ j ( 2l )t 0 0 d ] ( ) 0 in 2 l 20 RJ 2 H (k0 ) exp( jk0 t d ) k odd where the Parseval's theorem [6] is applied to the numerator. Note that the integration range in Eq. 38 can be shifted from [-0, 0] to [0, 20] due to the periodicity of DTFT. As a result, the RJ amplification factor can be expressed, after a variable change from to -0, as ( n ) 2 out FRJ ( RJ ) 2 in H ( k ) exp[ j ( k (39) 2 0 0 )t d ] 1 0 d k odd 2 0 0 H (k ) exp( jk t ) k odd 0 0 d where td is the phase delay of H at 0 as in previous discussions. After neglecting high order harmonics, Eq. 39 recovers Eq. 21 as shown below. 2 1 H ( 0 ) exp[ j ( 0 )t d ] H ( 0 ) exp[ j ( 0 )t d ] 0 FRJ 20 0 d H (0 ) exp( j0 t d ) H (0 ) exp( j0 t d ) (40) 2 1 0 H ( 0 ) H ( 0 ) 40 0 d H (0 ) H (0 ) 4. Scaling of DCD and RJ Amplifications with Channel Loss The scaling of DCD and RJ amplifications with channel loss observed in [2] can be derived using an approximate loss model described by H ( ) exp( k | | j t d ) (41) where k is the loss constant and td the channel delay. Substitution of Eq. 41 into Eq. 9 yields the amplification factor for SJ below the jitter Nyquist frequency 0 as exp( k ) exp( k ) FSJ ( ) (42) 2 It can be easily shown that ( ) and jitter is amplified by lossy channels at any frequency below 0. Equation 42 also indicates that FSJ grows exponentially with jitter frequency. DCD and RJ amplifications within the loss model are given by substituting Eq. 41 into Eq. 15 and Eq. 21, respectively. exp( k0 ) exp( k0 ) FDCD (43) 2 exp( 2k 0 ) exp( 2k 0 ) 1 FRJ (44) 8k 0 2 FDCD and FRJ are shown to increase exponentially with data rate. Scaling of FDCD and FRJ is obtained by rewriting Eq. 43 and Eq. 44 as FDCD coshln 10 | D(0 ) | / 20 (45) 5 ln 10 1 FRJ sinh | D(0 ) | (46) ln 10 | D( 0 ) | 10 2 where D(0) = 20log10|H(0)| denotes the channel loss in dB at the fundamental frequency. 5. Comparison between Theory and Simulation A set of four single-ended channels terminated with 50 Ohm are used in the study. Their S-parameters are generated from EM simulations. The Svensson-Dermer model [7] is employed to model the substrate loss. Simulated insertion loss and return loss are plotted in Fig. 4 and listed in Table 1. The clock signal transmitted into the channel is represented by the 1010 square wave as shown in Fig. 3. SJ, DCD and white noise Gaussian RJ are applied at the transitions. The channel output signal is calculated with Eq. 22 using step responses characterized by SPICE transient simulations. One million bits are run in each simulation. S(2,1) 5GHz 10GHz channel 1 -14.89 dB -29.96 dB channel 2 -18.71 dB -37.74 dB channel 3 -22.57 dB -45.64 dB channel 4 -26.47 dB -53.67 dB Table 1. Channel insertion loss at 5 and 10 GHz. Figure 4. Channel insertion loss and return loss. 5.1 Sinusoidal Jitter A SJ with 5 ps amplitude is added to the input clock signal. Output eye diagrams of channel 2 at 10 Gbps data rate with SJ frequencies of 0.5, 2 and 3 GHz are shown in Fig. 5. Output jitter probability density functions measured at 0 V are plotted in Fig. 6. They exhibit the characteristic shape of the SJ distribution described by 1 p ( x) (47) 2 x 2 where is the SJ amplitude. The output SJ amplitude can be measured from locations of the two peaks in the PDF. As shown in Fig. 6, the output SJ amplitude at 0.5 GHz is the same as the input. At 2 and 3 GHz, output amplitudes are about 1.4 and 2 times larger than the input, respectively. As predicted by Eq. 42, the output SJ amplification grows with SJ frequency. In Fig. 5, amplitude noise is found to be induced by the input SJ as predicted by Eq. 10. Figure 5. Output eye diagrams of channel 2 at 10Gbps data rate. Input SJ amplitude is 5ps. SJ frequency is (a) 0.5GHz, (b) 2GHz, and (c) 3GHz. Figure 6. Output jitter distributions of channel 2 at 10Gbps data rate. Input SJ amplitude is 5ps. SJ frequencies are 0.5GHz, 2GHz, and 3GHz. Simulated SJ amplification factors as functions of SJ frequency in channels 1 and 2 at 10 and 20 Gbps data rates are plotted in Fig. 7. Two sets of theoretical results, calculated using Eq. 9 based on S(2,1) and using Eq. 42 based on the approximate loss model described in Eq. 41, are also shown in the plot. Loss constants in the loss models are extracted from slopes of insertion loss. Figure 7 shows that simulation results are in good agreement with theoretical predictions. The discrepancy between results given by Eq. 9 and Eq. 42 is found to be minor, indicating that the loss model is a reasonable approximation in these channels. Comparison of results in channel 2 between 10 and 20 Gbps suggests that FSJ is insensitive to data rate in lossy channels, as predicted by Eq. 42. The amplification factor is found to be greater than or equal to one at any SJ frequency and grow exponentially with it. Figure 7. SJ amplification factors obtained from simulations and theoretical calculations with Eq. 9 and Eq. 42. 5.2 Duty-cycle-distortion Output eye diagrams of channels 1, 2 and 3 at 10 Gbps data rate with 5% UI input peak- to-peak DCD are plotted in Fig. 8. The eye center is shifted upward by DCD as predicted by Eq. 17. Figure 8 shows that as the loss increases from channel 1 to channel 3, the fundamental amplitude decreases, and the output DCD increases. Simulated DCD amplification factors as functions of data rate in channels 1 and 2 are plotted in Fig. 9. The results are in agreement with both sets of theoretical values calculated using Eq. 15 and Eq. 43 respectively. Amplification factors are found to be greater than or equal to one at all data rates and grow exponentially with data rate, as predicted by Eq. 43 in lossy channels. The output DC term in Eq. 17 can be rewritten in terms of input peak-to-peak DCD in UI as A0 VDC | H (0) | | H (0) | A DCD in ,UI | H (0) | V0 DCD in ,UI pp pp (48) 2 4 where V0=A/4 is the input square wave amplitude and equals 5V in this case. H(0) is 0 dB for all channels. In Fig.10, simulated DC shifts in channel 1 at 10 and 20 Gbps data rates as functions of input peak-to-peak DCD are found to agree with Eq. 48. Figure 8. Output eye diagrams of channels 1, 2 and 3 at 10Gbps data rate with 5% UI input peak-to-peak DCD. Figure 9. DCD amplification factors obtained from simulations and theoretical calculations with Eq. 15 and Eq. 43. Figure 10. DCD induced DC shift in channel 1 output signal obtained from simulations and theoretical calculations with Eq. 48. 5.3 Random Jitter Figure 11 shows output eye diagrams of channel 1 at 8, 12 and 16 Gbps data rates with 1ps input Gaussian RJ. Output jitter probability density functions measured at 0 V, plotted in Fig. 12, manifest Gaussian characteristics. The output RJ RMS increases with data rate. Simulated RJ amplification factors as functions of data rate in channels 1 and 2 are plotted in Fig. 13. Results are consistent with both sets of theoretical values given by Eq. 21 and Eq. 44 respectively. Figure 11. Output eye diagrams of channel 1 with 1ps input RJ at data rates of (a) 8G, (b) 12G, and (c) 16G. Figure 12. Output jitter distributions of channel 1with 1ps input RJ at data rates of 8, 12 and 16 Gbps. Figure 13. RJ amplification factors obtained from simulations and theoretical calculations with Eq. 21 and Eq. 44. 5.4 Scaling of DCD and RJ Amplifications with Channel Loss Figure 14 shows the scaling of FDCD and FRJ with channel insertion loss at the fundamental frequency in all channels at different data rates. The theoretical scaling is given by Eq. 45 for DCD and Eq. 46 for RJ. Agreement is found between simulation and theory in all cases. The scaling curves are also consistent with simulation results reported in [2]. Figure 14. DCD and RJ amplification scaling with insertion loss obtained from simulations and theoretical calculations with Eq. 45 and Eq. 46. The insertion loss is measured at the fundamental frequency. 6. Summary In this paper clock channel jitter amplification factors in terms of transfer function or S- parameters are derived. Amplification is shown to result from the smaller loss at the jitter LSB than at the fundamental. The amplification scaling with channel loss is obtained by using an approximate loss model. In this model the amplification is found to occur at any jitter frequency. The theory is confirmed by simulation data. References [1] S. Chaudhuri, W. Anderson, J. McCall, and S. Dabrai, "Jitter amplification characterization of passive clock channels at 6.4 and 9.6 Gb/s," Proc. IEEE 15th Topical Meeting on Electric Performance of Electronic Packaging, Scottsdale, AZ, Oct. 2006, pp. 21-24. [2] C. Madden, S. Chang, D. Oh and C. Yuan, "Jitter Amplification Considerations for PCB Clock Channel Design," IEEE 16th Topical Meeting on Electr. Performance Electron. Packag., Atlanta, GA, pp. 135-138, Oct. 2007. [3] S. Chang, D. Oh and C. Madden, "Jitter modeling in statistical link simulation," Proc. IEEE Electromagn. Compat. Symp., Detroit, MI, Aug. 18-22, 2008. [4] F. Rao, V. Borich, H. Abebe and M. Yan, "Rigorous modeling of transmit jitter for accurate and efficient statistical eye simulation," IEC DesignCon, Feb. 2010. [5] F. Rao and S. Hindi, "Frequency domain analysis of jitter amplification in clock channels," Proc. IEEE 21th Topical Meeting on Electric Performance of Electronic Packaging, Tempe, AZ, Oct. 2012, pp. 51-54. [6] A. Oppenheim and R. Schafer, Discrete-time Signal Processing, Prentice-Hall, New Jersey, 1989. [7] C. Svensson and G. Dermer, "Time domain modeling of lossy interconnects," IEEE Trans. Adv. Packaging, vol. 24, no. 2, pp. 191-196, May 2001. www.agilent.com
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