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Keysight Technologies
Capture Highest DDR3/4 and LPDDR3/4
Data Rates Using Advanced Probe Settings
on Logic Analyzers


                             Technical Overview
02 | Keysight | Capture Highest DDR3/4 and LPDDR3/4 Data Rates Using Advanced Probe Settings on Logic Analyzers - Technical Overview



Purpose of Advanced Probe Settings Mode
Keysight Technologies, Inc. logic analyzer module inputs are optimized to
provide a flat input bandwidth from DC to the specified limit when used with                                          Advantage of Advanced
Keysight probes designed with specific tip resistor capacitor networks.                                               Probe Settings Mode
Occasionally, probing techniques involve additional tip isolation resistors to                                        Advanced Probe Settings (APS)
interface to the system under test. System interfaces using additional tip                                            mode on Keysight logic analyz-
isolation resistors, such as DDR BGA (Ball Grid Array) interposers, can provide                                       ers enables significantly higher
additional high-frequency attenuation on the sampled signals to the logic                                             DDR3/4 and LPDDR3/4 data rate
analyzer. This additional attenuation can result in smaller data valid windows                                        captures from BGA probing.
observed on the logic analyzer at DDR/LPDDR data rates over 1333 Mb/s.
To compensate for this additional attenuation, Keysight has included a mode                                           Example: Using W3633A (x4
referred to as APS (Advanced Probe Settings) that peaks the edges of the input                                        and x8) or W3631A (x16) DDR3
signals to the logic analyzer. This peaking can improve the capture window of                                         BGA probes and with either the
signals to the logic analyzer.                                                                                        U4154A or 16962A logic
                                                                                                                      analyzers, APS mode enables
As an example: Evaluation has shown larger data valid windows to the logic                                            data rate captures up to the
analyzer when using the APS mode with DDR BGA interposers at speeds of                                                rates shown below.
DDR3-1333 Mb/s and higher. The eye openings presented to the user from the
sample positions window are enlarged (compared to eye openings without APS
enabled). Larger eye openings allow the user to set sample positions for State
mode capture for data rates up to DDR3 2400 Mb/s 1.                                                                   DDR3 data rate with APS
                                                                                                                      enabled
Depending on probing methods, APS mode may apply for DDR3/4 or LPDDR3/4
                                                                                                                        

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