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5992-0084EN N2114A and N2115A DDR BGA Interposers for Infiniium Oscilloscopes - Data Sheet c20140929 [10]


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Keysight Technologies
N2114A and N2115A DDR4 BGA Interposers
for Infiniium Oscilloscopes
Superior probing for DDR4 compliance test and debug

Data Sheet
Introduction

     The DDR4 BGA interposers provide signal access to clock, strobe, data, address and command sig-
     nals of the DDR4 BGA package for making electrical, timing and eye diagram measurements with an
     Infiniium oscilloscope. The DDR4 JEDEC1 specification is defined at the DRAM ballout, and the ballout
     is difficult to access. The BGA interposer provides direct signal access to the BGA package for true
     compliance testing.

     The DDR4 BGA interposers are soldered between the DRAM and PC board or DIMM raw card where
     the DRAM would normally be soldered. They are designed with the PCB or DIMM footprint on the
     bottom side and the DRAM footprint on the top side. The BGA interposer passes the signals from the
     memory controller chip and DRAM directly to the top side of the BGA interposer where they can be
     accessed with oscilloscope probes.

     Buried resistors placed at the signals inside the BGA interposer connect the probed signals to solder
     pads designed to work with InfiniiMax differential or single-ended solder-in probe heads. These resis-
     tors isolate the DDR4 signal and the probe loading effect. This design minimizes capacitive loading of
     the probe heads and allows high-speed operation without impact on signal integrity.

     Probing at the right location is also an important consideration for DDR4 measurement. Many designs
     have vias or designed-in probe points, but they do not always produce good signal integrity. Probing
     at the wrong location could cause signal reflection, resulting in non-monotonic edges. This will cause
     error in your tests such as slew rate, setup and hold time measurements.

     When used with N6462A/B DDR4 compliance test application, the BGA interposers provide a fast
     and easy way to test, debug and characterize your DDR4 designs. The tests covered by the N6462A/B
     software are based on the JEDEC DDR4 SDRAM specification. The test application offers a user-
     friendly setup wizard and a comprehensive report that includes margin analysis.




     1.   The JEDEC (Joint Electronic Device Engineering Council) Solid State Technology Association is a semiconductor
          engineering standardization body of the Electronic Industries Alliance (EIA), a trade association that represents all
          areas of the electronic industry.
03 | Keysight | N2114A and N2115A DDR BGA Interposers for Infiniium Oscilloscopes - Data Sheet



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