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Agilent AN 1293
Sequential Shunt Regulation
Application Note
SAS Satellite
+
GPIB
SAS #1 Control
- Battery Control Load
Bus CKT
Cap
+
Control
SAS #2 Control Signals
-
I
Isc
Imp Pmp
+
Control RL
SAS #N
-
Figure 1
Vmp Voc V
Regulating Satellite Bus Voltage assume operation at the maximum Figure 2
The sequential shunt regulator is power point. When the shunt is open, Isc= short circuit current
widely used for regulating the satellite the current to the load will be Imp Imp= current at the maximum power
bus voltage. A simplified sequential (current at the maximum power Vmp= voltage at the maximum power
shunt concept is shown in Figure 1. point). When the shunt is closed, the Voc= open circuit voltage
current in the shunt is Isc (short cir- Pmp= maximum power point
The Agilent Technologies E4350B/ cuit current). Figure 3 shows the out- RL= load line
E4351B Solar Array Simulators (SAS) put waveforms across one SAS. The
are ideal for this type of application. output current of the SAS is basically
Operating in this mode, the current constant because the difference
either flows into the load or into the between Imp and Isc is usually small
shunt control FETs. The shunt control but the voltage changes from a short
FET will be referred to as the shunt (switch on) to Vmp (switch off).
or the switch for the remainder of the
paper. Figure 2 shows a typical solar
array I-V curve. As an example, let's
Sensitivity Position Probe Coupling Impedance
Channel 1 20.0V/div 60.0000V 10:1 dc 1M ohm
Channel 4 2.00V/div 0.00000V 100:1 dc 50 ohm
IOUT 2A/DIV
VOUT 20/DIV
0
0
-29.700 US -4.700 US 20.300 US
#AVG 5.00 US/DIV Repetitive
Figure 3
If bus voltage = Vmp, then Output output capacitance (<50 nF) allows The wire inductance in the test cir-
power delivered to the bus = (1-D) (N) this fast rise time and also limits the cuit is very small. As the inductance
(Pmp) where: D = On duty cycle of the turn on switching losses in the shunt increases, the voltage overshoot on
shunt FET, N = Number of SAS sup- switch. The E4350B/E4351B can the output voltage will increase, but
plies, Pmp = Maximum power point. handle switching frequencies up to will be limited by fast acting internal
To satisfy the power demands of the 50 KHz. Figure 3 shows the output clamp circuits. The overshoot and
power system of the satellite, the voltage and current of the E4351B undershoot in the current (Figure 3)
output voltage of the SAS has to rise when the shunt switches at 50 KHz are due to the internal output snub-
within 2 to 10 usec when the shunt with shunt FET rise and fall times of ber, as part of the output capacitance,
is opened and the operating point 2 usec. For this test, the E4351B is in charging and discharging. Note that
changes from the short circuit point Simulator mode (refer to data sheet) in Figure 1, the bus capacitor across
to the operating load point on the and the I-V curve defined by these the battery is required to smooth the
curve. The E4350B/E4351B low four parameters: Isc = 4.00A, Imp = bus current and lower the ripple.
3.75A, Vmp = 120V and Voc =130V.
2
SAS Satellite
Bus
SAS #1
Control
SAS #2
Load
SAS #n
Control
Control
SAS #n +1
Figure 4
Figure 1 shows diodes in series with The heatsink design for the switch will FET by reducing the switching losses
each output of the SAS (after the depend on the switching frequency because the voltage across the FET is
shunt). These diodes isolate the sup- and the duty cycle and the output half. It may also make the selection of
plies so that when one shunt is on, current. Higher switching frequency the FET easier since a lower voltage
the output of the other SAS's is not and higher duty cycle (ON time) will part can be used. Sometimes a linear
pulled low. The diodes should have increase the power dissipation in the device is used instead of a switch in
very fast recovery time, otherwise the shunt FET. order to have better control on the
power dissipation in the diode and voltage, but this results in higher
the shunt FET will be high. Higher A different sequential shunt that power dissipation in the linear
levels of noise will also occur if slow some customers use is shown in device.
diodes are used, or if the FET rise Figure 4. In this configuration, the
and fall times are too fast. The latter bus voltage cannot be lower than the In the sequential shunt configuration,
can be controlled by adjusting the output voltage of the upper SAS. the number of strings is limited by
FET gate resistor. Snubber (RC) Since only one half of the string is the total power required. When using
across the diodes may help reduce shunted, the bus voltage will always the E4350B/E4351B, strings may be
the switching noise and voltage over- have a minimum voltage that is at added or subtracted as necessary
shoots. A heatsink may be needed to least half of the string. The major for the particular application. Each
keep the diode cool and within the advantage of this technique is that it string is programmable over the
temperature ratings. reduces the power dissipation in the IEEE-488.2 bus using SCPI (standard
commands for programmable instru-
Voltage and current ratings of the ments) commands.
shunt switch are determinedby the
Voc and Isc parameters.
3
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