Service Manuals, User Guides, Schematic Diagrams or docs for : Compal COMPAL_LA-3271P_(IAL30,_ANRIAL3000)_2006-08-18,_rev_0.4
<< Back | HomeMost service manuals and schematics are PDF files, so You will need Adobre Acrobat Reader to view : Acrobat Download Some of the files are DjVu format. Readers and resources available here : DjVu Resources
For the compressed files, most common are zip and rar. Please, extract files with Your favorite compression software ( WinZip, WinRAR ... ) before viewing. If a document has multiple parts, You should download all, before extracting.
Good luck. Repair on Your own risk. Make sure You know what You are doing.
Image preview - the first page of the document
>> Download COMPAL_LA-3271P_(IAL30,_ANRIAL3000)_2006-08-18,_rev_0.4 documenatation <<
Text preview - extract from the document
A B C D E
1 1
2
Compal Confidential 2
Schematics Document
945GM+ICH7
2006 / 08 / 18 Rev:0.4
3 3
4 4
Security Classification Compal Secret Data
Issued Date 2005/12/1 Deciphered Date 2006/12/01 Title
Cover Sheet
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-3271P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, August 21, 2006 Sheet 1 of 42
A B C D E
A B C D E
Compal confidential
Project Code: ANRIAL3000(IAL30) Thermal Sensor Clock Generator YONAH CPU
File Name : LA-3271P ADM1032ARM ICS9LPR310
page 4,5,6
page 4 page 13
1 1
533/667MHZ
CRT
page 14 Calistoga GMCH DDR-2 DDR2-SO-DIMM X2
page 7,8
LCD CONN PCBGA1466
page 14 page 9,10,11,12 Daul Channel DDR-2
Bandwidth 500MB
2.5GHz(1.2V)
DMI
2 PCI EXPRESS
USB 2.0 USB conn x 4 2
page 29
ICH7-M USB 2.0 Finger print
page 28
Broadcom Mini Card BGA652
BCM5787
page 22 page 23 Audio CKT
HD-Interface AMP & Audio Jack
ALC262 page 25
PCI BUS page 24
page 15,16,17,18
RJ45 CONN MDC Conn. RJ11 Conn
page 24
page 23
CradBus Controller SATA SATA HDD Conn.
R5C811 page 19
page 20,21 LPC BUS
PATA
3 CDROM Conn. 3
page 19
Slot 0
page 21
ENE KB910L
page 26
Power On/Off CKT. Int. KBD
page 30 page 27
Touch Pad
DC/DC Interface CKT. RTC CKT. CONN.page 27 BIOS TPM Conn
page 32 page 16 page 27 page 26
4 4
Power Circuit DC/DC Power OK CKT. FINGERPRINT Conn
page 33~41 page 30 page 28
Security Classification Compal Secret Data
Issued Date 2005/12/1 Deciphered Date 2006/12/01 Title
Block Diagrams
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-3271P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, August 21, 2006 Sheet 2 of 42
A B C D E
A B C D E
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Voltage Rails
Full ON HIGH HIGH HIGH HIGH ON ON ON ON
Power Plane Description S1 S3 S4/ S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
VIN Adapter power supply (19V) ON ON ON S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
B+ AC or battery power rail for power circuit. ON ON ON
1
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF 1
+5VALW 5V always on power rail ON ON ON
+3VALW 3.3V always on power rail ON ON ON S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+RTCVCC RTC power ON ON ON
+5V 5V power rail ON ON OFF
+3V 3.3V power rail ON ON OFF Board ID Table for AD channel
+1.8V 1.8V power rail for DDR ON ON OFF Vcc 3.3V +/- 5%
+5VS 5V switched power rail ON OFF OFF Ra / Rc 100K +/- 5%
+3VS 3.3V switched power rail ON OFF OFF Board ID Rb / Rd V AD_BID min V AD_BID typ V AD_BID max
+2.5VS 2.5V switched power rail ON OFF OFF 0 0 0 V 0 V 0 V
+1.5VS 1.5V switched power rail ON OFF OFF 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+0.9VS 0.9V switched power rail for DDR terminator ON OFF OFF 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+CPU_CORE Core voltage for CPU ON OFF OFF 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+VCCP 1.05V power rail ON OFF OFF 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
5 100K +/- 5% 1.453 V 1.650 V 1.759 V
6 200K +/- 5% 1.935 V 2.200 V 2.341 V
7 NC 2.500 V 3.300 V 3.300 V
2 2
BOARD ID Table BTO Option Table
External PCI Devices Board ID PCB Revision BTO Item BOM Structure
Device IDSEL# REQ#/GNT# Interrupts 0 0.1
CardBus AD21 0 PIRQE/PIRQF/PIRQG 1 0.2
Mini-PCI AD22 1 PIRQF/PIRQG 2
3
4
5
6
7
EC SM Bus1 address EC SM Bus2 address
3 3
Device Address Device Address
Smart Battery 0001 011X b? ADM1032 1001 110X b?
EEPROM(24C16/02) 1010 000X b?
(24C04) 1011 000Xb?
ICH7 SM Bus address
Device Address
Clock Generator 1101 001Xb?
(ICS ICS9LPR310)
DDRII DIMM0 1001 000Xb?
DDRII DIMM2 1001 010Xb?
4 4
Security Classification Compal Secret Data
Issued Date 2005/12/1 Deciphered Date 2006/12/01 Title
Notes
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-3271P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, August 21, 2006 Sheet 3 of 42
A B C D E
5 4 3 2 1
+VCCP
9 H_A#[3..31] H_D#[0..63] 9
JP2A ITP_DBRESET# R91 2 @ 200_0402_5% This shall place near CPU
1 PAD T11
ITP_TDI R138 1 2 56_0402_5%
H_A#3 J4 E22 H_D#0 ITP_BPM#0 T12
H_A#4
H_A#5
L4
A3#
A4#
YONAH D0#
D1# F24 H_D#1
H_D#2
ITP_BPM#1
ITP_BPM#2
PAD
PAD T14
T15
ITP_TMS R137 1 2 56_0402_1%
M3 A5# D2# E26 PAD
H_A#6 K5 H22 H_D#3 ITP_BPM#3 PAD T13 ITP_TDO R142 1 2 56_0402_5%
H_A#7 A6# D3# H_D#4 ITP_BPM#4 T16
M1 A7# D4# F23 PAD
H_A#8 N2 G25 H_D#5 ITP_BPM#5 R141 1 2 56_0402_5%
H_A#9 A8# D5# H_D#6
J1 A9# D6# E25
H_A#10 N3 E23 H_D#7 ITP_TRST# R135 1 2 56_0402_5%
H_A#11 A10# D7# H_D#8
P5 A11# D8# K24
H_A#12 P2 G24 H_D#9 ITP_TCK R134 1 2 56_0402_5%
D H_A#13 A12# D9# H_D#10 D
L1 A13# D10# J24
H_A#14 P4 J23 H_D#11
H_A#15 A14# D11# H_D#12
P1 A15# D12# H26
H_A#16 R1 F26 H_D#13 +3VS
H_A#17
H_A#18
Y2
U5
A16#
A17#
D13#
D14# K22
H25
H_D#14
H_D#15
Thermal Sensor
H_A#19 A18# D15# H_D#16
H_A#20
H_A#21
R3
W6
U4
A19#
A20#
D16#
D17#
N22
K25
P26
H_D#17
H_D#18
from EFL50
1
ADM1032
A21# D18#
1
H_A#22 Y5 R23 H_D#19
H_A#23 A22# D19# H_D#20 C383 R348
U2 A23# D20# L25
H_A#24 R4 L22 H_D#21 0.1U_0402_16V4Z @ 10K_0402_5%
H_A#25 A24# D21# H_D#22 H_THERMDA 2
T5 A25# ADDR GROUP DATA GROUP D22# L23
H_A#26 T3 M23 H_D#23 1
2
H_A#27 A26# D23# H_D#24 C388 U25
W3 A27# D24# P25
H_A#28 W5 P22 H_D#25 2 1
H_A#29 A28# D25# H_D#26 2200P_0402_50V7K D+ VDD1
Y4 A29# D26# P23
H_A#30 W2 T24 H_D#27 H_THERMDC 2 3 6
H_A#31 A30# D27# H_D#28 D- ALERT#
9 H_REQ#[0..4] Y1 A31# D28# R24
L26 H_D#29 EC_SMB_CK2 8 4 THERM#
D29# 10,26 EC_SMB_CK2 SCLK THERM#
H_REQ#0 K3 T25 H_D#30
H_REQ#1 REQ0# D30# H_D#31 EC_SMB_DA2
H2 REQ1# D31# N24 10,26 EC_SMB_DA2 7 SDATA GND 5
H_REQ#2 K2 AA23 H_D#32
H_REQ#3 REQ2# D32# H_D#33
J3 REQ3# D33# AB24
H_REQ#4 L5 V24 H_D#34 ADM1032ARMZ MSOP 8P
REQ4# D34# H_D#35
D35# V26
H_ADSTB#0 L2 W25 H_D#36 SMBus Address: 1001110X (b)
9 H_ADSTB#0 ADSTB0# D36#
H_ADSTB#1 V4 U23 H_D#37
9 H_ADSTB#1 ADSTB1# D37#
U25 H_D#38
D38# H_D#39
D39# U22
AB25 H_D#40
C
D40#
D41# W22
Y23
H_D#41
H_D#42
KH3-ORG. B+_BIAS
+5VS C
13 CLK_CPU_BCLK
CLK_CPU_BCLK A22 BCLK0
D42#
D43# AA26 H_D#43 FAN1 Control and Tachometer
CLK_CPU_BCLK# A21 HOST CLK Y26 H_D#44
13 CLK_CPU_BCLK# BCLK1 D44#
2
1U_0805_10V4Z
Y22 H_D#45
D45# H_D#46 R350
D46# AC26 1
C379
AA24 H_D#47 0_1206_5%
H_ADS# D47# H_D#48 +3VS
9 H_ADS# H1 ADS# D48# AC22
H_BNR# E2 AC23 H_D#49
9 H_BNR#
1
H_BPRI# BNR# D49# H_D#50 2
9 H_BPRI# G5 BPRI# D50# AB22
1
H_BR0# F1 AA21 H_D#51
9 H_BR0# BR0# D51#
H_DEFER# H5 AB21 H_D#52 R70
9 H_DEFER# DEFER# D52#
H_DRDY# F21 AC25 H_D#53 10K_0402_5%
9 H_DRDY# DRDY# D53#
1
2
5
6
R87 H_HIT# G6 AD20 H_D#54 R78
9 H_HIT# HIT# D54#
8
56_0402_5% H_HITM# E4 CONTROL AE22 H_D#55 100K_0402_5% U24A D Q32
9 H_HITM#
2
H_IERR# HITM# D55# H_D#56 FAN1VREF 3 G
1 2 D20 AF23 1 2
P
+VCCP IERR# D56# 26 EN_DFAN1 +IN
H_LOCK# H4 AD24 H_D#57 1 FAN1_ON 3
9 H_LOCK# LOCK# D57# OUT FAN_SPEED1 26
1U_0603_10V4Z
H_RESET# B1 AE21 H_D#58 2 S SI3456DV-T1_TSOP6
9 H_RESET# RESET# D58# -IN
G
AD21 H_D#59 1 FAN1_VFB 2
4
D59#
C137
9 H_RS#[0..2] AE25 H_D#60
4
H_RS#0 D60# H_D#61 LM358DR2G_SO8~N C133
F3 RS0# D61# AF25
H_RS#1 F4 AF22 H_D#62 0.01U_0402_16V7K
H_RS#2 RS1# D62# H_D#63 2 1
G3 RS2# D63# AF26
H_TRDY# G2 C389
9 H_TRDY# TRDY# 2200P_0402_50V7K
J26 H_DINV#0 1 2
DINV0# H_DINV#0 9
M26 H_DINV#1
DINV1# H_DINV#1 9
ITP_BPM#0 AD4 V23 H_DINV#2 R351
BPM0# DINV2# H_DINV#2 9
ITP_BPM#1 AD3 AC20 H_DINV#3 100K_0402_5% JFAN1
◦ Jabse Service Manual Search 2024 ◦ Jabse Pravopis ◦ onTap.bg ◦ Other service manual resources online : Fixya ◦ eServiceinfo