Service Manuals, User Guides, Schematic Diagrams or docs for : Compal COMPAL_LA-3221P_(HAL50,_ANRHAL5000)_2005-12-30,_rev_0.1
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A B C D E
1 1
2
Compal Confidential 2
Schematics Document
AMD/S1/ATI RS485M(C)/SB460
2005 / 12 / 30 Rev:0.1
3 3
4 4
Security Classification Compal Secret Data
Issued Date 2005/12/1 Deciphered Date 2006/12/01 Title
Cover Sheet
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-3221P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, January 06, 2006 Sheet 1 of 43
A B C D E
A B C D E
Compal confidential
Project Code: ANRHAL5000(HAL50)
File Name : LA-3221P Thermal Sensor Clock Generator AMD S1 CPU DDR-2 DDR2-SO-DIMM X2
ADM1032ARM ICS951462 page 8,9
1 1
page 4,5,6,7
page 4 page 13 Daul Channel DDR-2
HT 16x16 800MHZ
CRT
page 14 ATI-RS485M(C)
LCD CONN BGA465
page 14 page 10,11,12
PCI EXPRESS A-Link Express
2 x PCIE
2
Realtek Mini Card
USB 2.0 USB conn x 4 2
RTL8111B page 29
page 23 page 26
ATI-SB460 USB 2.0 Felica Conn
page 28
RJ45 CONN BGA549
page 23 Audio CKT
HD-Interface AMP & Audio Jack
ALC262 page 25
page 24
PCI BUS page 15,16,17,18
MDC Conn. RJ11 CONN
page 24 page 27
Mini PCI CradBus Controller SATA SATA HDD Conn.
Socket R5C841 or R5C811 page 20
page 26
page 21,22 LPC BUS
PATA HDD Conn.
3 CDROM Conn. 3
page 20
Slot 0 Meadia Card 1394
page 22 Conn.
page 22 page 21
Power On/Off CKT.
page 31
ENE KB910L
page 27
DC/DC Interface CKT. RTC CKT.
page 33 page 15
Int. KBD
Power Circuit DC/DC Power OK CKT. page 28
page 33~41 page 30 Touch Pad
CONN.page 28 BIOS
page 28
4 4
Security Classification Compal Secret Data
Issued Date 2005/12/1 Deciphered Date 2006/12/01 Title
Block Diagrams
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-3221P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, January 06, 2006 Sheet 2 of 43
A B C D E
A B C D E
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Voltage Rails
Full ON HIGH HIGH HIGH HIGH ON ON ON ON
Power Plane Description S1 S3 S4/ S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
VIN Adapter power supply (19V) ON ON ON S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
B+ AC or battery power rail for power circuit. ON ON ON
1
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF 1
+CPU_CORE Core voltage for CPU ON OFF OFF
+1.2V_HT 1.2V switched power rail ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+0.9V 0.9V switched power rail for DDR terminator ON ON OFF
+1.8VALW 1.8V always on power rail ON ON ON
+1.5VS 1.5V switched power rail ON OFF OFF Board ID Table for AD channel
+1.8VS 1.8V switched power rail ON OFF OFF Vcc 3.3V +/- 5%
+1.8V 1.8V power rail for DDR ON ON OFF Ra / Rc 100K +/- 5%
+3VALW 3.3V always on power rail ON ON ON Board ID Rb / Rd V AD_BID min V AD_BID typ V AD_BID max
+3V 3.3V power rail ON ON OFF 0 0 0 V 0 V 0 V
+3VS 3.3V switched power rail ON OFF OFF 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+5VALW 5V always on power rail ON ON ON 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+5VS 5V switched power rail ON OFF OFF 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+RTCVCC RTC power ON ON ON 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
5 100K +/- 5% 1.453 V 1.650 V 1.759 V
6 200K +/- 5% 1.935 V 2.200 V 2.341 V
7 NC 2.500 V 3.300 V 3.300 V
2 2
BOARD ID Table BTO Option Table
External PCI Devices Board ID PCB Revision BTO Item BOM Structure
Device IDSEL# REQ#/GNT# Interrupts 0 0.1
CardBus AD21 0 PIRQE/PIRQF/PIRQG 1
Mini-PCI AD22 1 PIRQF/PIRQG 2
3
4
5
6
7
EC SM Bus1 address EC SM Bus2 address
3 3
Device Address Device Address
Smart Battery 0001 011X b? ADM1032 1001 110X b?
EEPROM(24C16/02) 1010 000X b?
(24C04) 1011 000Xb?
SB460 SM Bus address
Device Address
Clock Generator 1101 001Xb?
(ICS 951462AGT)
DDRII DIMM0 1001 000Xb?
DDRII DIMM2 1001 010Xb?
4 4
Security Classification Compal Secret Data
Issued Date 2005/12/1 Deciphered Date 2006/12/01 Title
Notes
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-3221P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, January 06, 2006 Sheet 3 of 43
A B C D E
5 4 3 2 1
H_CADIP[0..15] H_CADOP[0..15]
10 H_CADIP[0..15] H_CADOP[0..15] 10
H_CADIN[0..15] H_CADON[0..15]
10 H_CADIN[0..15] H_CADON[0..15] 10
PROCESSOR HYPERTRANSPORT INTERFACE
VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER
D D
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
+1.2V_HT B+_BIAS
CPU1A +5VS
D4 AE5 1 2
D3
VLDT_A3
VLDT_A2
VLDT_B3
VLDT_B2 AE4 C341 4.7U_0805_6.3V6K FAN1 Control and Tachometer
1
1U_0603_10V4Z
D2 VLDT_A1 VLDT_B1 AE3
D1 AE2 1 R230
VLDT_A0 VLDT_B0
C104
0_0805_5% +3VS
H_CADIP15 N5 T4 H_CADOP15
2
H_CADIN15 L0_CADIN_H15 L0_CADOUT_H15 H_CADON15 2
P5 L0_CADIN_L15 L0_CADOUT_L15 T3
1
H_CADIP14 M3 V5 H_CADOP14
H_CADIN14 L0_CADIN_H14 L0_CADOUT_H14 H_CADON14 R231
M4 L0_CADIN_L14 L0_CADOUT_L14 U5
H_CADIP13 L5 V4 H_CADOP13 10K_0402_5%
L0_CADIN_H13 L0_CADOUT_H13
1
2
5
6
H_CADIN13 M5 V3 H_CADON13 R28
L0_CADIN_L13 L0_CADOUT_L13
8
H_CADIP12 K3 Y5 H_CADOP12 100K_0402_5% U4A D Q31
2
H_CADIN12 L0_CADIN_H12 L0_CADOUT_H12 H_CADON12 FAN1VREF G
K4 W5 1 2 3
P
L0_CADIN_L12 L0_CADOUT_L12 27 EN_DFAN1 +IN
H_CADIP11 H3 AB5 H_CADOP11 1 FAN1_ON 3
L0_CADIN_H11 L0_CADOUT_H11 OUT FAN_SPEED1 27
1U_0603_10V4Z
H_CADIN11 H4 AA5 H_CADON11 2 S SI3456DV-T1_TSOP6
L0_CADIN_L11 L0_CADOUT_L11 -IN
G
H_CADIP10 G5 AB4 H_CADOP10 1 FAN1_VFB 2
4
L0_CADIN_H10 L0_CADOUT_H10
C94
H_CADIN10 H5 AB3 H_CADON10
4
H_CADIP9 L0_CADIN_L10 L0_CADOUT_L10 H_CADOP9 LM358DR2G_SO8~N C607
F3 L0_CADIN_H9 L0_CADOUT_H9 AD5
H_CADIN9 F4 AC5 H_CADON9 0.01U_0402_16V7K
H_CADIP8 L0_CADIN_L9 L0_CADOUT_L9 H_CADOP8 2 1
E5 L0_CADIN_H8 L0_CADOUT_H8 AD4
H_CADIN8 F5 AD3 H_CADON8 C99
H_CADIP7 L0_CADIN_L8 L0_CADOUT_L8 H_CADOP7 2200P_0402_50V7K
N3 L0_CADIN_H7 L0_CADOUT_H7 T1
H_CADIN7 N2 R1 H_CADON7 1 2
L0_CADIN_L7 L0_CADOUT_L7
HTT Interface
H_CADIP6 L1 U2 H_CADOP6
C H_CADIN6 L0_CADIN_H6 L0_CADOUT_H6 H_CADON6 R29 C
M1 L0_CADIN_L6 L0_CADOUT_L6 U3
H_CADIP5 L3 V1 H_CADOP5 100K_0402_5% JFAN1
H_CADIN5 L0_CADIN_H5 L0_CADOUT_H5 H_CADON5 FAN1_POWER
L2 L0_CADIN_L5 L0_CADOUT_L5 U1 2 1 1
H_CADIP4 J1 W2 H_CADOP4 1
L0_CADIN_H4 L0_CADOUT_H4 2
1
1000P_0402_50V7K~N
H_CADIN4 K1 W3 H_CADON4 1
L0_CADIN_L4 L0_CADOUT_L4 3
150K_0402_5%
H_CADIP3 G1 AA2 H_CADOP3 4
L0_CADIN_H3 L0_CADOUT_H3 G
2
22U_1206_10V4Z
C100
H_CADIN3 H1 AA3 H_CADON3 D7 5
H_CADIP2 L0_CADIN_L3 L0_CADOUT_L3 H_CADOP2 2 G
G3 L0_CADIN_H2 L0_CADOUT_H2 AB1 RB751V_SOD323 2
R31
C96
H_CADIN2 G2 AA1 H_CADON2 MOLEX_53398-0371~N
2
H_CADIP1 L0_CADIN_L2 L0_CADOUT_L2 H_CADOP1
H_CADIN1
E1 L0_CADIN_H1 L0_CADOUT_H1 AC2
H_CADON1
FAN1
F1 AC3
1
H_CADIP0 L0_CADIN_L1 L0_CADOUT_L1 H_CADOP0
E3 L0_CADIN_H0 L0_CADOUT_H0 AD1
H_CADIN0 E2 AC1 H_CADON0
L0_CADIN_L0 L0_CADOUT_L0
H_CLKIP1 J5 Y4 H_CLKOP1
10 H_CLKIP1 L0_CLKIN_H1 L0_CLKOUT_H1 H_CLKOP1 10
H_CLKIN1 K5 Y3 H_CLKON1
10 H_CLKIN1 L0_CLKIN_L1 L0_CLKOUT_L1 H_CLKON1 10
H_CLKIP0 J3 Y1 H_CLKOP0
10 H_CLKIP0 L0_CLKIN_H0 L0_CLKOUT_H0 H_CLKOP0 10
H_CLKIN0 J2 W1 H_CLKON0
10 H_CLKIN0 L0_CLKIN_L0 L0_CLKOUT_L0 H_CLKON0 10
+1.2V_HT
R226
1 2 49.9_0402_1% P3 T5
R225 L0_CTLIN_H1 L0_CTLOUT_H1
1 2 49.9_0402_1% P4 L0_CTLIN_L1 L0_CTLOUT_L1 R5
H_CTLIP0 N1 R2 H_CTLOP0
10 H_CTLIP0 L0_CTLIN_H0 L0_CTLOUT_H0 H_CTLOP0 10
H_CTLIN0 P1 R3 H_CTLON0
10 H_CTLIN0 L0_CTLIN_L0 L0_CTLOUT_L0 H_CTLON0 10
Athlon 64 S1
Processor Socket
AMD : 49.9 1%
B
ATI : 51 1% B
+1.2V_HT
180P_0402_50V8J~N
180P_0402_50V8J~N
C377
C373
0.22U_0603_10V7K C376
0.22U_0603_10V7K C372
1 1 1 1 1 1
C374
C375
4.7U_0805_6.3V6K
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