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A B C D E
1 1
2
Compal confidential 2
Schematics Document
Mobile Yonah uFCPGA with Intel
3
Calistoga_GM/PM+ICH7-M core logic 3
2005-12-15
REV:1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/03/10 Deciphered Date 2006/03/10 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
www.laptopfix.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-2841 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, December 15, 2005 Sheet 1 of 60
A B C D E
A B C D E
Compal confidential
File Name : LA-2841
ZZZ
1
PCB Thermal Sensor Mobile Yonah 1
VRAM ADM1032 uFCBGA-479/uFCPGA-478 CPU
128/256MB page 4
page 4, 5, 6
page 22,23,24,25
Clock Generator
Fan Control H_A#(3..31)
FSB ICS 954306
page 4
H_D#(0..63) 533/667MHz
Nvidia page 15
NV71/72M DDR2-SO-DIMM X2
PCI-E x 16 Intel Calistoga GMCH DDR2 -400/533/667 BANK 0, 1, 2, 3 page 13,14
page 18,19,20,21,26
PCBGA 1466 Dual Channel
LVDS Panel
Interface page 16
page 7, 8, 9, 10,11,12
2 Mini-PCIE Card 2
page 37
CRT & TV OUT DMI
page 17 New Card
PCIE x3
Connector x2
page 34
USB2.0
LAN I/F
Intel ICH7-M AC-LINK
PCI BUS mBGA-652
3.3V 33 MHz
page 27, 28, 29, 30
USB conn X3
page 41
CardBus Controller
10/100 LAN TI PCI7412 BT Conn
LPC BUS
page 35 page 32 page 41
3 3
MO DEM
RTC CKT. Audio CKT AMOM page 39
page 29 RJ45 CONN Slot 0 13 94 Card reader AMOM page 38
page 35 page 33 page 32 page 32
ENE KB910/L AMP & Audio Jack
page 44 page 40
SATA HDD
Connector x2
page 31 SPR CONN.
Touch Pad Int.KBD *RJ45 CONN
page 42 page 42
PATA CDROM *MIC IN JACK
*LINE OUT JACK
Power On/Off CKT. BIOS Connector *1394 CONN
page 42 page 45 page 31 *SPDIF CONN
*DC JACK
*TVOUT CONN
DC/DC Interface CKT. *USB CONN x1
4 *CIR x1 4
page 47
page 46
Power Circuit DC/DC Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/03/10 Deciphered Date 2006/03/10 Title
page 48~56 Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
www.laptopfix.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-2841 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, December 15, 2005 Sheet 2 of 60
A B C D E
A
Voltage Rails
+5VS
+3VS
power
plane +2.5VS
+1.8VS
+B
+1.5VS
LDO3 +5VALW +1.8V
+1.2VS
LDO5 +3VALW +5V
+VGA_CORE
+0.9VS
State
+CPU_CORE
+VCCP
S0 O O O O
S1
O O O O
S3
O O O X
S5 S4/AC
O O X X
S5 S4/ Battery only
O X X X
S5 S4/AC & Battery
don't exist X X X X
O MEANS ON
X MEANS OFF
1 1
PCI Devices
EXTERNAL IDSEL# REQ/GNT# PIRQ
CARD BUS & 1394 AD22 2 C,D,E,G
Load BOM check item
1.U31 GM/PM/GML part number
2.U6 ICH7 part number
3.VRAM part number and Page26 RAM_CFG[0:3]/PCI_DEVID[0:3] modify check
4.For NV73 R510/R75/R533/R168 change to 499ohm
5.U33 NV7x part number
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/03/10 Deciphered Date 2006/03/10 Title
Notes List
www.laptopfix.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-2841 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, December 15, 2005 Sheet 3 of 60
A
5 4 3 2 1
+VCCP
This shall place near CPU
ITP_TDI R6 1 2 56_0402_5%
<7> H_A#[3..31] H_D#[0..63] <7>
JP16A ITP_TMS R3 1 2 56_0402_5%
H_A#3 J4 E22 H_D#0 ITP_TDO R2 1 2 56_0402_5%
H_A#4
H_A#5
L4
A3#
A4#
YONAH D0#
D1# F24 H_D#1
H_D#2 ITP_BPM#5 R1 56_0402_5%
M3 A5# D2# E26 1 2
H_A#6 K5 H22 H_D#3
H_A#7 A6# D3# H_D#4 ITP_TRST# R4 56_0402_5%
M1 A7# D4# F23 1 2
H_A#8 N2 G25 H_D#5
H_A#9 A8# D5# H_D#6 ITP_TCK R5 56_0402_5%
J1 A9# D6# E25 1 2
D H_A#10 H_D#7 D
N3 A10# D7# E23
H_A#11 P5 K24 H_D#8
H_A#12 A11# D8# H_D#9
P2 A12# D9# G24
H_A#13 L1 J24 H_D#10
H_A#14 A13# D10# H_D#11
P4 A14# D11# J23
H_A#15 P1 H26 H_D#12 ITP_DBRESET# R181 1 2 @ 200_0402_5% PAD T27
H_A#16 A15# D12# H_D#13
R1 A16# D13# F26
H_A#17 Y2 K22 H_D#14 ITP_BPM#0 PAD T5
H_A#18 A17# D14# H_D#15 ITP_BPM#1 T4
U5 A18# D15# H25 PAD
H_A#19 R3 N22 H_D#16 ITP_BPM#2 PAD T3
H_A#20 A19# D16# H_D#17 ITP_BPM#3 T1
W6 A20# D17# K25 PAD
H_A#21 U4 P26 H_D#18 ITP_BPM#4 PAD T2
H_A#22 A21# D18# H_D#19
Y5 A22# D19# R23
H_A#23 U2 L25 H_D#20
H_A#24 A23# D20# H_D#21
R4 A24# D21# L22
H_A#25 T5 ADDR GROUP DATA GROUP L23 H_D#22
H_A#26
H_A#27
T3
W3
A25#
A26#
D22#
D23# M23
P25
H_D#23
H_D#24
Thermal Sensor ADM1032AR
H_A#28 A27# D24# H_D#25 +3VS
W5 A28# D25# P22
H_A#29 Y4 P23 H_D#26
H_A#30 A29# D26# H_D#27
W2 A30# D27# T24
H_A#31 Y1 R24 H_D#28 2
<7> H_REQ#[0..4] A31# D28#
L26 H_D#29 C598
H_REQ#0 D29# H_D#30
K3 REQ0# D30# T25
H_REQ#1 H2 N24 H_D#31 0.1U_0402_16V4Z
H_REQ#2 REQ1# D31# H_D#32 1
K2 REQ2# D32# AA23
H_REQ#3 J3 AB24 H_D#33 U30
H_REQ#4 REQ3# D33# H_D#34 EC_SMC_2
L5 REQ4# D34# V24 1 VDD SCLK 8
V26 H_D#35
H_ADSTB#0 D35# H_D#36 H_THERMDA EC_SMD_2
<7> H_ADSTB#0 L2 ADSTB0# D36# W25 2 D+ SDATA 7
H_ADSTB#1 V4 U23 H_D#37 C592
<7> H_ADSTB#1 ADSTB1# D37#
U25 H_D#38 1 2 H_THERMDC 3 6
C D38# H_D#39 D- ALERT# C
D39# U22
AB25 H_D#40 2200P_0402_50V7K THERM# 4 5
D40# H_D#41 THERM# GND
D41# W22
Y23 H_D#42 R458
CLK_CPU_BCLK A22 D42# H_D#43 ADM1032AR_SOP8
<15> CLK_CPU_BCLK BCLK0 D43# AA26 +3VS 1 2
CLK_CPU_BCLK# A21 HOST CLK Y26 H_D#44
<15> CLK_CPU_BCLK# BCLK1 D44# H_D#45 10K_0402_5%
D45# Y22 Address:100_1100
AC26 H_D#46
D46# H_D#47 EC_SMC_2
D47# AA24 <44> EC_SMC_2
H_ADS# H1 AC22 H_D#48 EC_SMD_2
<7> H_ADS# ADS# D48# <44> EC_SMD_2
H_BNR# E2 AC23 H_D#49
<7> H_BNR# BNR# D49#
H_BPRI# G5 AB22 H_D#50
<7> H_BPRI# BPRI# D50#
H_BR0# F1 AA21 H_D#51
<7> H_BR0# BR0# D51#
H_DEFER# H5 AB21 H_D#52
<7> H_DEFER# DEFER# D52#
H_DRD Y# F21 AC25 H_D#53
<7> H_DRDY# DRDY# D53#
R17 H_HIT# G6 AD20 H_D#54
<7> H_HIT# HIT# D54#
56_0402_5% H_HITM# E4 CONTROL AE22 H_D#55
<7> H_HITM# HITM# D55#
1 2 H_IERR# D20 AF23 H_D#56
+VCCP
<7> H_LOCK#
H_LOCK#
H_RESET#
H4
B1
IERR#
LOCK#
D56#
D57# AD24
AE21
H_D#57
H_D#58
FAN control +5VS
<7> H_RESET# RESET# D58#
AD21 H_D#59
D59# H_D#60 C765 1
<7> H_RS#[0..2] D60# AE25 2 10U_1206_16V4Z
H_RS#0 F3 AF25 H_D#61
H_RS#1 RS0# D61# H_D#62 U40
F4 RS1# D62# AF22
H_RS#2 G3 AF26 H_D#63 1 8
H_TRDY# RS2# D63# VEN GND
<7> H_TRDY# G2 TRDY# 2 VIN GND 7
FAN1 3 6
H_DINV#0 VO GND
DINV0# J26 H_DINV#0 <7> <44> EN_FAN1 4 VSET GND 5
M26 H_DINV#1
DINV1# H_DINV#1 <7>
ITP_BPM#0 AD4 V23 H_DINV#2 G993P1UF_SOP8
BPM0# DINV2# H_DINV#2 <7>
ITP_BPM#1 AD3 AC20 H_DINV#3
BPM1# DINV3# H_DINV#3 <7>
ITP_BPM#2 AD1
B ITP_BPM#3 BPM2# B
AC4 BPM3# H_DSTBN#[0..3] <7>
H23 H_DSTBN#0
ITP_DBRESET# C20 DSTBN0# H_DSTBN#1
<29> ITP_DBRESET# DBR# DSTBN1# M24
H_DBSY# E1 W24 H_DSTBN#2
<7> H_DBSY# DBSY# DSTBN2# +5VS +3VS
H_DPSLP# B5 AD23 H_DSTBN#3
<28> H_DPSLP# DPSLP# DSTBN3# H_DSTBP#[0..3] <7>
H_DPRSTP# E5 G22 H_DSTBP#0
<28,53> H_DPRSTP# DPRSTP# DSTBP0#
H_DPWR# D24 N25 H_DSTBP#1
<7> H_DPWR# DPWR# DSTBP1#
ITP_BPM#4 AC2 MISC Y25 H_DSTBP#2
<53> H_PROCHOT# PRDY# DSTBP2#
1
2
ITP_BPM#5 AC1 AE24 H_DSTBP#3
PREQ# DSTBP3#
+VCCP 1 R18 2 H_PROCHOT# D21
PROCHOT# 1SS355_SOD323
R551
75_0402_5% 10K_0402_5%
H_PW RGOOD D6 D28
<28> H_PWRGOOD H_CPUSLP# PWRGOOD JP30
D7
2
1
<7> H_CPUSLP# ITP_TCK SLP# FAN1
AC5 TCK 1
ITP_TDI AA6 A6 H_A20M#
TDI A20M# H_A20M# <28> 2
1000P_0402_50V7K
C763 10U_0805_10V4Z
ITP_TDO AB3 A5 H_FERR#
TDO FERR# H_FERR# <28> 3
1
R456 1 2 @ 1K_0402_5% TEST1 C26 C4 H_IGNNE# 1 1
TEST1 IGNNE# H_IGNNE# <28>
R455 1 2 51_0402_5% TEST2 D25 B3 H_INIT# ACES_85205-0300
TEST2 INIT# H_INIT# <28>
ITP_TMS AB5 C6 H_INTR
TMS LINT0 H_INTR <28>
ITP_TRST# AB6 B4 H_NMI D22
TRST# LINT1 H_NMI <28> 2 2
LEGACY CPU BAS16_SOT23
THERMAL
C761
H_THERMDA A24 D5 H_STPCLK#
H_THERMDC THERMDA DIODE STPCLK# H_SMI#
H_STPCLK# <28>
A25 A3 H_SMI# <28>
3
2
H_THERMTRIP# C7 THERMDC SMI#
<7,28> H_THERMTRIP# THERMTRIP#
H_THERMDA, H_THERMDC routing together.
FOX_PZ47903-2741-42_YONAH
Trace width / Spacing = 10 / 10 mil <44> FAN_SPEED1
1
C762
1000P_0402_50V7K
A +VCCP 2 A
+VCCP
1
R437
R457 H_DPSLP# 1 2
@ 56_0402_5% @ 56_0402_5%
R436 Security Classification Compal Secret Data Compal Electronics, Inc.
2 2
H_DPRSTP# 1 2 2005/03/10 2006/03/10 Title
Issued Date Deciphered Date
B
@ 56_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
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