Service Manuals, User Guides, Schematic Diagrams or docs for : Compal Compal_LA-2831_HAR00_WT2
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A B C D E
1 1
2 2
WT2
HAR00 LA-2831 Schematic
3 3
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/03/11 Deciphered Date 2006/03/11 Title
SCHEMATIC, M/B LA-2831
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401362 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: , 06, 2006 Sheet 1 of 59
A B C D E
5 4 3 2 1
Compal confidential Block Diagram
15.4" LCD
Dothan
D Clock Generator D
LVDS uFCPGA CPU ICS
Video Engine
page 5,6,7
page 17
DDR333
Chromakey CRT CONN.
8Mx16x2 Memory
XILINX XC3S400 & TV-OUT/D Conn.
page 45 page 43,44,47 HA#(3..31) HD#(0..63) BUS(DDR II) Fan Control X1
System Bus
RGB:8:8:8 RGB:6:6:6
400 / 533MHz Dual Channel
1.8V 400MHz SO-DIMM X 1
Flash Image Processor LVDS Rx Alviso Intel 915 GM BANK 0, 1
page 13
memory PW172A-10VL THC63LVDF84B LED/B
1Mx8 page 38,39 page 42 LVDS GMCH-M Channel A
page 40
SBUS video SDRAM
EXT IO MPEG4 DECODER 2Mx32 1257 FC-BGA 1.8V 400MHz SW LED BD
page 37
SO-DIMM X 1
TE7782 EM8475 3.3V 33MHz
BANK 0, 1 page 14
page 41 page 35,36,46 page 8,9,10,11,12
C Channel B C
T/P
DMI
1.5V
TV Module MINI PCI 100MHz
DC IN
PCI-IF MDC
page 32
page 26 page 26
+3VS AC-LINK
+2.5VS
PCI BUS 3.3V 24.576MHz BATT IN/+2.5V
+1.5VS 3.3V 33MHz 3.3V 33MHz
IDSEL:AD17 PATA100
(PIRQA/B#,GNT#2,REQ#2) ICH6M
SATA
PCI-E 609 BGA SATA AC97 CODEC
CardBus 10/100 LAN Ctrl. 1.5V/1.05V(+VCCP)
PCIE AD1981B
Controller RTL 8100CL Card page 18,19,20,21,22
SATA TO PATA SATA TO PATA
page 23 page 24 page 27
B R5C841 page 24,25 page 22 page 22 B
5V/3.3V/15V
CDROM
page 22
1394 SDIO Transformer 1st. HDD 2nd. HDD AMP &
CONN. CONN. Slot 0 LPC BUS page 22 page 22
page 25
& RJ45
3.3V 33MHz Phone/ MIC
page 25 SD/MS/xD page 23 Jack page 28 1.8V / 0.9V
Combo Slot
USBPORT 0
page 25 JUSBP0
USBPORT 1
JUSBP1
X BUS USBPORT 2 VCORE
48MHz / 480Mb JUSBP2
USB2.0
USBPORT 3
JUSBP3
KB910 USBPORT 4
PCIE Card page 24 CHARGER
SST39VF080 page 30
USBPORT 5
Video Engine page 42
A
page 31 USBPORT 6 A
Touch Pad page 31
USBPORT 7
Remote Ctr. page 29
Int.KBD
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/03/11 Deciphered Date 2006/03/11 Title
SCHEMATIC, M/B LA-2831
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401362 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: @, 06, 2006 Sheet 2 of 59
5 4 3 2 1
5 4 3 2 1
I2C / SMBUS ADDRESSING Power Managment table
PCB Rev Data
External PCI Devices
Signal Bringup-Build 0.1
+CPU_CORE ES-Build
+VCCP
D
DEVICE IDSEL REQ/GNT # PIRQ +5VS PP-Build D
L AN #
AD17 0 F +3VS
State +2.5V +2.5VS
CARD BUS AD20 1 A +12VALW +3V +1.8VS
+3VALW +5V +1.25VS MP1-Build
Cardreader B +5VALW +12V +1.5VS
1394 AD16 2 E
S0 ON ON ON MP-Build
Wireless LAN(MINI PCI) AD18 3 G ,H
S1 ON ON ON
S3 ON ON OFF
S5 S4/AC ON OFF OFF
SCHEMATICS VERSION LIST
S5 S4/AC don't exist OFF OFF OFF
VERSION ISSUE DATE REMARK
Ceramic Capacitor Spec
C C
Guide: 0.0A First Release
Temperature Characteristics:
Symbol 0 1 2 3 4 5 6 7
CODE Z5U Z5V Z5P Y5U Y5V Y5P X5R X7R
8 9 A B C D E F G
NP0 C0G BJ CH CJ CK SH SJ
H I J
UJ UK SL
Tolerance:
Symbol A B C D F G H J
B B
CODE +-0.05PF +-0.1PF +-0.25PF +-0.5PF +-1PF +-2% +-3% +-5%
K M N P Q V X Z
+-10% +-20% +-30% +100,-0% +30,-10% +20,-10% +40,-20% +80,-20%
SMBUS Control Table
THERMAL THERMAL VGA Thermal
SOURCE INVERTER BATT SERIAL SENSOR SENSOR SODIMM CLK CHIP MINI PCI LCD
EEPROM (CPU) (LM75) ADM1032
SMB_EC_CK1 PC87591L
SMB_EC_DA1
SMB_EC_CK2 PC87591L
SMB_EC_DA2
ICH_SMBCLK
ICH6-M
ICH_SMBDATA
A A
LCD_DDCCLK Alviso
LCD_DDCDATA GM-GP
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/03/11 Deciphered Date 2006/03/11 Title
SCHEMATIC, M/B LA-2831
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401362 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: , 06, 2006 Sheet 3 of 59
5 4 3 2 1
5 4 3 2 1
ACIN
32ms
+3/5/12VALW
D D
ON/OFF#
8.5/2.44/3.792ms
t<=10 ms
EC_ON
t=100 ms
364us
t=109 ms
PWRBTN_OUT#
438ms
SYSON
3/5V 400us 2.5V(1.8ms)
+12/3/5V
RSMRST# 7.856ms
C t<110 ms C
117ms
PM_SLP_S3/4/5#
92.88ms
SUSP# t>0
1.25VS(104us) 1.5VS(2.64ms) 3VS(7.044ms) 5VS(10.26ms) 2.5VS(4.966ms)
1.5/1.8/2.5/3/5VS
2.166ms
1.3ms PGD
+VCCP
5.6ms
VR_ON#
B B
CPU_VID t<100 us
726us
+CPU_CORE
815.2us t<110 ms
Vgate
99ms
SYSPOK(ICH_PWRGD)
PCIRST/PLTRST# 1.036ms 2
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