Service Manuals, User Guides, Schematic Diagrams or docs for : Compal Compal_LA-5881P
<< Back | HomeMost service manuals and schematics are PDF files, so You will need Adobre Acrobat Reader to view : Acrobat Download Some of the files are DjVu format. Readers and resources available here : DjVu Resources
For the compressed files, most common are zip and rar. Please, extract files with Your favorite compression software ( WinZip, WinRAR ... ) before viewing. If a document has multiple parts, You should download all, before extracting.
Good luck. Repair on Your own risk. Make sure You know what You are doing.
Image preview - the first page of the document
>> Download Compal_LA-5881P documenatation <<
Text preview - extract from the document
A B C D E
1 1
Compal Confidential
2 2
NAYF0 M/B Schematics Document
Intel Arrandale/Clarksfield Processor with DDRIII + Ibex Peak-M
3
VRAM PARK
2009-08-27 3
PCB ZZZ
ZZZ
VRAM PARK@
X76193BOL01
REV:0.1
DAZ@
DA80000GT00 512M HIX
NAYF0 LA-5881P REV0 M/B
LA-5881P MB Rev0: DA80000GT00 VRAM MAD
ZZZ
VRAM MAD@
X76193BOL03
1G HIX
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/08/10 Deciphered Date 2009/08/10 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A5881
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401805
Date: Tuesday, September 01, 2009 Sheet 1 of 60
A B C D E
A B C D E
Clock Generator
Compal Confidential IDT: 9LRS3199AKLFT
SILEGO: SLG8SP587
Model Name : NAYF0 133/120/100/96/14.318MHZ to PCH
File Name : LA5881 Fan Control
page 38
48MHZ to CardReader
page 12
1 1
100MHz PCI-E 2.0x16 5GT/s PER LANE
PEG(DIS) Intel Memory BUS(DDRIII)
133MHz Dual Channel 204pin DDRIII-SO-DIMM X2
MXM III eDP(DIS NV) eDP Conn. eDP(UMA) Auburndale / Clarksfield BANK 0, 1, 2, 3 page 10,11
Conn. 1.5V DDRIII 800/1066/1333
page 23 (UMA/DIS) (DIS) 6.4G/8.5G/10.6G
page 13
100M/133M/166M(CFD)
LVDS(DIS) Processor
rPGA988A
page 4,5,6,7,8,9
HDMI(DIS) CRT(DIS)
FDI x8 DMI x4 USB conn x2 Bluetooth CMOS Camera Card Reader
(UMA) Conn RTS5159-GR
USB port 7
HDMI Conn. CRT SW. CRT Conn. LVDS SW LVDS Conn. USB port 10 USB port 3 USB port 6
100MHz 100MHz USB port 8 HS USB
page 32 page 32 page 23,24 page 30
page 26 page 25 page 25 page 24 page 24 2.7GT/s 1GB/s x4
2 USBx14 3.3V 48MHz 2
HDMI(UMA) LVDS(UMA)
CRT(UMA) Intel 3.3V 24MHz
HDMI HD Audio
Level Shift TMDS(UMA) Ibex Peak-M
page 26
Dual CH NAND Interface
PCI-Express x 8 (ABD PCIE1 2.5GT/S CKD PCIE1/2 2.5/5GT/S) 100MHz PCH MDC 1.5 HDA Codec
SATA x 6 (GEN1 1.5GT/S ,GEN2 3GT/S) 100MHz page 14,15,16,17 Connpage 35 ALC272
port 2,5 port 1 18,19,20,21,22
SPI page 36
MINI Card x2 LAN(GbE)
WLAN, TV
USB port 4,5 page 31
BCM5784/5764
page 28 port 0,4 port 1 SPI ROM x2 NAND flash Audio AMP
SATA HDD SATA CDROM page 14
Conn page 23 TI TPS6017 37
page
Conn. Conn.
page 27 page 27
3
RJ45 LPC BUS 3
page 29
33MHz
Int. Speaker Phone Jack x 3
ENE KB926 +SubWoofer
Sub-board page 37 page 37
page 33
LS-5022P
USB/B 2P
RTC CKT. Port0,1
page 32
page 35
Touch Pad Int.KBD
page 34 page 34
LS-5024P
Power On/Off CKT. SJV70
page 35
Function/B EC I/O Buffer BIOS ROM
page 34
page 34 page 34
DC/DC Interface CKT. LS-5026P PCH XDP CPU XDP
SJV70 133MHz
4 4
page 39 LED/B page 22 page 5
page 34
Power Circuit DC/DC LS-5027P PWR/B Security Classification Compal Secret Data Compal Electronics, Inc.
SJV70 Issued Date 2008/08/10 Deciphered Date 2009/08/10 Title
page 40~48 page 34 SCHEMATIC MB A5881
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401805
Date: Tuesday, September 01, 2009 Sheet 2 of 60
A B C D E
A B C D E
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Voltage Rails
Full ON HIGH HIGH HIGH HIGH ON ON ON ON
Power Plane Description S1 S3 S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
VIN Adapter power supply (19V) N/A N/A N/A S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
B+ AC or battery power rail for power circuit. N/A N/A N/A
1
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF 1
+CPU_CORE Core voltage for CPU ON ON OFF
+0.75VS 0.75V switched power rail for DDR terminator ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.05VS 1.05V switched power rail for PCH ON OFF OFF
+1.1VS_VTT 1.1V switched power rail (1.05 for AUB CPU) ON OFF OFF
+1.5V 1.5V power rail for DDRIII ON ON OFF Board ID / SKU ID Table for AD channel
+1.5VS 1.5V switched power rail ON OFF OFF Vcc 3.3V +/- 5%
+1.8VS 1.8V switched power rail ON OFF OFF Ra/Rc/Re 100K +/- 5%
+3VALW 3.3V always on power rail ON ON ON* Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+3V 3.3V power rail for PCH ON ON ON 0 0 0 V 0 V 0 V
+3V_LAN 3.3V power rail for LAN ON ON ON* 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+3VS 3.3V switched power rail ON OFF OFF 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+5VALW 5V always on power rail ON ON ON* 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+5VS 5V switched power rail ON OFF OFF 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+5V 5V power rail for PCH ON ON ON 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+VSB VSB always on power rail ON ON ON* 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+RTCVCC RTC power ON ON ON 7 NC 2.500 V 3.300 V 3.300 V
2 2
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
BOARD ID Table BTO Option Table
BTO Item BOM Structure
Board ID PCB Revision
External PCI Devices ALC 271 271@
0 0.1
Device IDSEL# REQ#/GNT# Interrupts
ALC 272 272@
1 0.2
ASM1442 ASM@
2 0.3
CH7318 CH@
3 1.0
S3 S3@
4
NONS3 NONS3@
5
XDP XDP@
6
Switchable SG@
7
VGA VGA@
UMA UMA@
USB Port Table UMAO UMAO@
EC SM Bus1 address EC SM Bus2 address DISO DISO@
4 External 3 External
3 USB 2.0 USB 1.1 Port MADISON MAD@ 3
Device Address Device Address USB Port USB Port
Smart Battery 0001 011X b 0 Ext1 USB Ext1 USB PARK PARK@
UHCI0
1 Ext2 USB Ext2 USB
VRAM MADISON VRAM MAD@
Ext3 USB
2
UHCI1 (JV only)
VRAM PARK VRAM PARK@
3 Camera Camera
EHCI1
4 1st Min-Card 1st Min-Card
UHCI2
Ibex SM Bus address 5 2st Min-Card 2st Min-Card
6 Card Reader Card Reader
Device Address
BOM Config
UHCI3 Ext3 USB
7 UMA only SKU:UMAO@/UMA@
Clock Generator 1101 0010b
(JM only)
(9LRS3199AKLFT, SLG8SP587)
Switchable PARK SKU: SG@/VGA@/PARK@/VRAM PARK@
8 Ext4 HS USB Ext3 HS USB
DDR DIMM0 1001 000Xb
UHCI4 Switchable MADISON SKU: SG@/VGA@/MAD@/VRAM MAD@
9
DDR DIMM2 1001 010Xb 10 The same: 272@/ASM@/NONS3@/DAZ@
Blue Tooth Blue Tooth
ISL90727 0101 1100b
EHCI2 UHCI5
ISL90728 0111 1100b
11
12
4 UHCI6 4
13
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/08/10 Deciphered Date 2009/08/10 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A5881
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401805
Date: Tuesday, September 01, 2009 Sheet 3 of 60
A B C D E
5 4 3 2 1
JCPU1E
JCPU1A R605 AJ13
PEG_IRCOMP RSVD32
PEG_ICOMPI B26 1 2 49.9_0402_1% RSVD33 AJ12
PEG_ICOMPO A26
DMI_PTX_HRX_N0 A24 B27 R613 AP25
DMI_PTX_HRX_N1 DMI_RX#[0] PEG_RCOMPO EXP_RBIAS RSVD1
C23 DMI_RX#[1] PEG_RBIAS A25 1 2 750_0402_1% AL25 RSVD2 RSVD34 AH25
DMI_PTX_HRX_N2 B22 AL24 AK26
DMI_PTX_HRX_N3 DMI_RX#[2] PEG_GTX_C_HRX_N15 RSVD3 RSVD35
A21 DMI_RX#[3] PEG_RX#[0] K35 AL22 RSVD4
J34 PEG_GTX_C_HRX_N14 AJ33 AL26
DMI_PTX_HRX_P0 PEG_RX#[1] PEG_GTX_C_HRX_N13 RSVD5 RSVD36
B24 DMI_RX[0] PEG_RX#[2] J33 AG9 RSVD6 RSVD_NCTF_37 AR2
DMI_PTX_HRX_P1 D23 G35 PEG_GTX_C_HRX_N12 M27
DMI_RX[1] PEG_RX#[3] RSVD7
DMI
DMI_PTX_HRX_P2 B23 G32 PEG_GTX_C_HRX_N11 L28 AJ26
DMI_PTX_HRX_P3 DMI_RX[2] PEG_RX#[4] PEG_GTX_C_HRX_N10 RSVD8 RSVD38
D A22 DMI_RX[3] PEG_RX#[5] F34 (10) H_DIMMA_REF J17 SA_DIMM_VREF (CFD Only) RSVD39 AJ27 D
F31 PEG_GTX_C_HRX_N9 H17
PEG_RX#[6] (11) H_DIMMB_REF SB_DIMM_VREF (CFD Only)
DMI_HTX_PRX_N0 D24 D35 PEG_GTX_C_HRX_N8 G25
DMI_HTX_PRX_N1 DMI_TX#[0] PEG_RX#[7] PEG_GTX_C_HRX_N7 RSVD11
G24 DMI_TX#[1] PEG_RX#[8] E33 G17 RSVD12
DMI_HTX_PRX_N2 F23 C33 PEG_GTX_C_HRX_N6 E31 AP1
DMI_HTX_PRX_N3 DMI_TX#[2] PEG_RX#[9] PEG_GTX_C_HRX_N5 RSVD13 RSVD_NCTF_40
H23 DMI_TX#[3] PEG_RX#[10] D32 E30 RSVD14 RSVD_NCTF_41 AT2
B32 PEG_GTX_C_HRX_N4
DMI_HTX_PRX_P0 PEG_RX#[11] PEG_GTX_C_HRX_N3
D25 DMI_TX[0] PEG_RX#[12] C31 CFG3---1 :PEG Normal Operation RSVD_NCTF_42 AT3
DMI_HTX_PRX_P1 F24 B28 PEG_GTX_C_HRX_N2 0 :PEG Numbers Reversed AR1
DMI_HTX_PRX_P2 DMI_TX[1] PEG_RX#[13] PEG_GTX_C_HRX_N1 RSVD_NCTF_43
E23 DMI_TX[2] PEG_RX#[14] B30
DMI_HTX_PRX_P3 G23 A31 PEG_GTX_C_HRX_N0
DMI_TX[3] PEG_RX#[15]
J35 PEG_GTX_C_HRX_P15 R308 AL28
PEG_RX[0] PEG_GTX_C_HRX_P14 3.01K_0402_1% RSVD45
PEG_RX[1] H34 1 @ 2 CFG0 AM30 CFG[0] RSVD46 AL29
H33 PEG_GTX_C_HRX_P13 change R307 BOM structure CFG1 AM28 AP30
H_FDI_TXN0 PEG_RX[2] PEG_GTX_C_HRX_P12 R307 CFG2 CFG[1] RSVD47
E22 FDI_TX#[0] PEG_RX[3] F35 (pop to VGA@) 08/17 AP31 CFG[2] RSVD48 AP32
H_FDI_TXN1 D21 G33 PEG_GTX_C_HRX_P11 3.01K_0402_1% 1 VGA@ 2 CFG3 AL32 AL27
H_FDI_TXN2 FDI_TX#[1] PEG_RX[4] PEG_GTX_C_HRX_P10 R309 CFG[3] RSVD49
D19 FDI_TX#[2] PEG_RX[5] E34 1 @ 2 CFG4 AL30 CFG[4] RSVD50 AT31
H_FDI_TXN3 D18 F32 PEG_GTX_C_HRX_P9 3.01K_0402_1% CFG5 AM31 AT32
H_FDI_TXN4 FDI_TX#[3] PEG_RX[6] PEG_GTX_C_HRX_P8 CFG6 CFG[5] RSVD51
G21 FDI_TX#[4] PEG_RX[7] D34 AN29 CFG[6] RSVD52 AP33
H_FDI_TXN5 PEG_GTX_C_HRX_P7 R306 1 @ CFG7
H_FDI_TXN6
E19
F21
FDI_TX#[5]
FDI_TX#[6]
PCI EXPRESS -- GRAPHICS PEG_RX[8]
PEG_RX[9]
F33
B33 PEG_GTX_C_HRX_P6 3.01K_0402_1%
2
CFG8
AM32
AK32
CFG[7]
CFG[8]
RSVD53
RSVD_NCTF_54
AR33
AT33
Intel(R) FDI
H_FDI_TXN7 G18 D31 PEG_GTX_C_HRX_P5 change BOM structure form CFG9 AK31 AT34
RESERVED
FDI_TX#[7] PEG_RX[10] PEG_GTX_C_HRX_P4 CFG10 CFG[9] RSVD_NCTF_55
A32 AK28 AP35
PEG_RX[11]
C30 PEG_GTX_C_HRX_P3 SG@ to VGA@ 08/17 WW41 Recommend not pull down CFG11 AJ28
CFG[10] RSVD_NCTF_56
AR35
H_FDI_TXP0 PEG_RX[12] PEG_GTX_C_HRX_P2 CFG12 CFG[11] RSVD_NCTF_57
D22 FDI_TX[0] PEG_RX[13] A28 PCIE2.0 Jitter is over on ES1 AN30 CFG[12] RSVD58 AR32
H_FDI_TXP1 C21 B29 PEG_GTX_C_HRX_P1 CFG13 AN32
H_FDI_TXP2 FDI_TX[1] PEG_RX[14] PEG_GTX_C_HRX_P0 CFG14 CFG[13]
D20 FDI_TX[2] PEG_RX[15] A30 AJ32 CFG[14]
H_FDI_TXP3 C18 ◦ Jabse Service Manual Search 2024 ◦ Jabse Pravopis ◦ onTap.bg ◦ Other service manual resources online : Fixya ◦ eServiceinfo