Service Manuals, User Guides, Schematic Diagrams or docs for : Compal Compal_LA-6501P
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A B C D E
MODEL NAME : PIM10
PCB NO : LA-6501P (DA60000I100)
1
BOM P/N : 43190931L01 1
Compal Confidential
2
Kenting Schematics Document 2
Intel Pine Trail-M ( Pineview-M + Tiger point )
2010-03-18
REV: 0.2
3 3
@ : Nopop Component
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/03/18 Deciphered Date 2011/03/18 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6501P
Date: Tuesday, April 27, 2010 Sheet 01 of 35
A B C D E
A B C D E
Compal Confidential
Model Name : PIM10
Project Code : ANRPIM1000
Project Name : Kenting
1 1
Thermal Sensor
W83L771AWG
LCD Conn. LVDS page 5
page 9
Atom Processor N455 Memory BUS(DDRIII)
DDRIII-DIMM X1
page 7 Clock Generator
1.5V/800MHz
CRT Conn RGB 22x22mm CK505 page 8
page 23
page 4,5,6
DMI X2 mode
USB Card Reader
2
USB Port X1 Port 2 USB Port 7 RTS5160 2
page 23
NM10 Express chipset SD/MMC/MS
page 20
SATA
LS-6501P
PCI-Express 17x17mm
Daughter board HDA Port 0 USB Port X1
page 10,11,12,13
2.5" HDD (R) page 23
page 18
Through LVDS cable
LPC BUS Audio Codec Port 3
AMP & Speaker CMOS CAM
ALC272-GR
page 16 page 9
page 17
MINI Card 10/100 Ethernet
3 WLAN RTL8105EL Head Phone 3
page 14 page 19
PCIE-Port 2 PCIE-Port 1 page 17
USB Port 6 ENE KBC SPI
RJ45 KB926
page 19 page 21
Power ON/OFF DC/DC Interface Through power buttom cable Through LED cable
page 22 page 24
PWR buttom board LED/B
DC IN 3VALW/5VALW Int.KBD Touch Pad SPI ROM
page 26 page 28 LS-5732P LS-5733P
page 21 page 22 page 22
BATT CONN/OTP 1.8VS/0.9VS/
page 32 0.89VS page 30
4
CHARGER 1.5V/VCCP 4
page 27 page 29
1.2VS CPU CORE
page 29 page 31
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/03/18 Deciphered Date 2011/03/18 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6501P
Date: Monday, May 10, 2010 Sheet 02 of 35
A B C D E
A B C D E
ZZZ
PCB
DA60000I100
1 1
Voltage Rails
Power Plane Description S1 S3 S5
External PCI Devices
VIN Adapter power supply (19V) N/A N/A N/A
B+ AC or battery power rail for power circuit. N/A N/A N/A
DEVICE IDSEL # REQ/GNT # PIRQ
+CPU_CORE Core voltage for CPU ON OFF OFF
No PCI Device
+0.75VS 0.9V switched power rail for DDR terminator ON OFF OFF
+VCCP VCCP switched power rail ON OFF OFF
+1.5VS 1.5V switched power rail ON OFF OFF
+1.5V 1.5V power rail for DDR ON ON OFF
+1.8VS 1.8V switched power rail ON OFF OFF
+0.89VS CORE VOLTAGE FOR CPU VGA ON OFF OFF
+3VALW 3.3V always on power rail ON ON ON*
+3VS 3.3V switched power rail ON OFF OFF
+5VALW 5V always on power rail ON ON ON*
+5VS 5V switched power rail ON OFF OFF
2 2
+VS VS always on power rail ON ON ON*
+RTCBATT RTC power ON ON ON
EC SM Bus1 address EC SM Bus2 address
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Device Address Device Address
Smart Battery 0001 011X b W83L771AWG 1001_100X b
EEPROM(24C16/02) 1010 000X b EMC1402 100_1100X b
SIGNAL
STATE SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Full ON HIGH HIGH HIGH ON ON ON ON
S1 (Power On Suspend) HIGH HIGH HIGH ON ON ON LOW
S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF
S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF
S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF
3
BOARD ID Table(Page 21) Tiger Point SM Bus address
3
VCC 3.3V +/-5%
Device Address
ID BRD ID Ra Rb Vab (Min) Vab (Type) Vab (Max)
Clock Generator 1101 001Xb
0 R01 (SSI) NC 0 0V 0V 0.155V (SLG8SP556VTR)
1 R02 (PT) 100K +/- 5% 8.2K +/- 5% 0.168V 0.250V 0.362V DDR DIMMA 1010 000Xb
* 2 R03 (ST) 100K +/- 5% 18K +/- 5% 0.375V 0.503V 0.621V
3 R10 (X build) 100K +/- 5% 33K +/- 5% 0.634V 0.819V 0.945V
4 Reserved 100K +/- 5% 56K +/- 5% 0.958V 1.185V 1.359V
5 Reserved 100K +/- 5% 100K +/- 5% 1.372V 1.650V 1.838V
6 Reserved 100K +/- 5% 200K +/- 5% 1.851V 2.200V 2.420V
7 MP 100K +/- 5% NC 2.433V 3.300V 3.300V
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/03/18 Deciphered Date 2011/03/18 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6501P
Date: Tuesday, April 27, 2010 Sheet 03 of 35
A B C D E
5 4 3 2 1
PINEVIEW_M
PINEVIEW_M
U31A U31B
REV = 1.1
REV = 1.1 DDR_A_MA0 AH19 AD3 DDR_A_DQS0
DMI_RX0_R DDR_A_MA1 DDR_A_MA_0 DDR_A_DQS_0 DDR_A_DQS#0
F3 DMI_RXP_0 DMI_TXP_0 G2 DMI_TX0 <12> AJ18 DDR_A_MA_1 DDR_A_DQS#_0 AD2
DMI_RX#0_R F2 G1 <7> DDR_A_DQS#[0..7] DDR_A_MA2 AK18 AD4 DDR_A_DM0
DMI_RXN_0 DMI_TXN_0 DMI_TX#0 <12> DDR_A_MA_2 DDR_A_DM_0
DMI_RX1_R H4 H3 DMI_TX1 <12> DDR_A_MA3 AK16
DMI_RX#1_R DMI_RXP_1 DMI_TXP_1 <7> DDR_A_D[0..63] DDR_A_MA4 DDR_A_MA_3 DDR_A_D0
G3 DMI_RXN_1 DMI_TXN_1 J2 DMI_TX#1 <12> AJ14 DDR_A_MA_4 DDR_A_DQ_0 AC4
DDR_A_MA5 AH14 AC1 DDR_A_D1
DMI
<7> DDR_A_DM[0..7] DDR_A_MA6 DDR_A_MA_5 DDR_A_DQ_1 DDR_A_D2
AK14 DDR_A_MA_6 DDR_A_DQ_2 AF4
DDR_A_MA7 AJ12 AG2 DDR_A_D3
<7> DDR_A_DQS[0..7] DDR_A_MA8 DDR_A_MA_7 DDR_A_DQ_3 DDR_A_D4
AH13 DDR_A_MA_8 DDR_A_DQ_4 AB2
D DDR_A_MA9 DDR_A_D5 D
<7> DDR_A_MA[0..14] AK12 DDR_A_MA_9 DDR_A_DQ_5 AB3
N7 L10 DDR_A_MA10 AK20 AE2 DDR_A_D6
<8> CLK_CPU_EXP# EXP_CLKINN EXP_RCOMPO DDR_A_MA_10 DDR_A_DQ_6
N6 L9 R1172 49.9_0402_1% DDR_A_MA11 AH12 AE3 DDR_A_D7
<8> CLK_CPU_EXP EXP_CLKINP EXP_ICOMPI DDR_A_MA_11 DDR_A_DQ_7
L8 R1171 750_0402_1% DDR_A_MA12 AJ11
EXP_RBIAS DDR_A_MA13 DDR_A_MA_12 DDR_A_DQS1
R10 AJ24 AB8
EXP_TCLKINN DDR_A_MA14 DDR_A_MA_13 DDR_A_DQS_1 DDR_A_DQS#1
R9 EXP_TCLKINP RSVD_TP N11 T1 AJ10 DDR_A_MA_14 DDR_A_DQS#_1 AD7
N10 P11 AA9 DDR_A_DM1
RSVD RSVD_TP T2 DDR_A_DM_1
N9 RSVD DDR_A_WE# AK22 AB6 DDR_A_D8
<7> DDR_A_WE# DDR_A_WE# DDR_A_DQ_8
DDR_A_CAS# AJ22 AB7 DDR_A_D9
<7> DDR_A_CAS# DDR_A_RAS# DDR_A_CAS# DDR_A_DQ_9 DDR_A_D10
<7> DDR_A_RAS# AK21 DDR_A_RAS# DDR_A_DQ_10 AE5
K2 K3 AG5 DDR_A_D11
RSVD RSVD DDR_A_BS0 DDR_A_DQ_11 DDR_A_D12
J1 RSVD RSVD L2 <7> DDR_A_BS0 AJ20 DDR_A_BS_0 DDR_A_DQ_12 AA5
M4 M2 DDR_A_BS1 AH20 AB5 DDR_A_D13
RSVD RSVD <7> DDR_A_BS1 DDR_A_BS2 DDR_A_BS_1 DDR_A_DQ_13 DDR_A_D14
L3 N2 <7> DDR_A_BS2 AK11 AB9
RSVD RSVD DDR_A_BS_2 DDR_A_DQ_14 DDR_A_D15
AD6
DDR_A_DQ_15
1 OF 6 DDR_A_DQS2
PINEVIEW-M_FCBGA8559 AD8
DDR_CS#0 DDR_A_DQS_2 DDR_A_DQS#2
<7> DDR_CS#0 AH22 DDR_A_CS#_0 DDR_A_DQS#_2 AD10
DDR_CS#1 AK25 AE8 DDR_A_DM2
<7> DDR_CS#1 DDR_A_CS#_1 DDR_A_DM_2
AJ21
DDR_A_CS#_2 DDR_A_D16
AJ25 AG8
DDR_A_CS#_3 DDR_A_DQ_16 DDR_A_D17
DDR_A_DQ_17 AG7
C906 DMI_RX0_R CONN@ DDR_CKE0 DDR_A_D18
<12> DMI_RX0 1 2 <7> DDR_CKE0 AH10 DDR_A_CKE_0 DDR_A_DQ_18 AF10
0.1U_0402_10V7K JP80 DDR_CKE1 AH9 AG11 DDR_A_D19
<7> DDR_CKE1 DDR_A_CKE_1 DDR_A_DQ_19
<5> XDP_PREQ# XDP_PREQ# 1 AK10 AF7 DDR_A_D20
C907 DMI_RX#0_R XDP_PRDY# 1 DDR_A_CKE_2 DDR_A_DQ_20 DDR_A_D21
<12> DMI_RX#0 1 2 <5> XDP_PRDY# 2 AJ8 AF8
2 DDR_A_CKE_3 DDR_A_DQ_21 DDR_A_D22
0.1U_0402_10V7K 3 AD11
XDP_BPM#3 3 M_ODT0 DDR_A_DQ_22 DDR_A_D23
<5> XDP_BPM#3 4 4 <7> M_ODT0 AK24 DDR_A_ODT_0 DDR_A_DQ_23 AE10
C908 DMI_RX1_R XDP_BPM#2 M_ODT1
<12> DMI_RX1 1 2 <5> XDP_BPM#2 5 5 <7> M_ODT1 AH26 DDR_A_ODT_1
0.1U_0402_10V7K 6 AH24 AK5 DDR_A_DQS3
XDP_BPM#1 6 DDR_A_ODT_2 DDR_A_DQS_3 DDR_A_DQS#3
C909 <5> XDP_BPM#1 7 AK27 AK3
C 1 2 DMI_RX#1_R XDP_BPM#0 7 DDR_A_ODT_3 DDR_A_DQS#_3 DDR_A_DM3 C
<12> DMI_RX#1 <5> XDP_BPM#0 8 8 DDR_A_DM_3 AJ3
0.1U_0402_10V7K 9
@R1173 1
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