Service Manuals, User Guides, Schematic Diagrams or docs for : Compal Compal_LA-8868P
<< Back | HomeMost service manuals and schematics are PDF files, so You will need Adobre Acrobat Reader to view : Acrobat Download Some of the files are DjVu format. Readers and resources available here : DjVu Resources
For the compressed files, most common are zip and rar. Please, extract files with Your favorite compression software ( WinZip, WinRAR ... ) before viewing. If a document has multiple parts, You should download all, before extracting.
Good luck. Repair on Your own risk. Make sure You know what You are doing.
Image preview - the first page of the document
>> Download Compal_LA-8868P documenatation <<
Text preview - extract from the document
A B C D E
1 1
VBLE4 / VBLE5
2
Eureka 2
LA-8868P REV 1.0 Schematic
3
AMD Brazos 2.0 / Zacate APU / Hudson-M3L FCH 3
2012-07-12 Rev 1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
2012/05/18 2013/10/05 Title
Issued Date Deciphered Date SCHEMATIC, MB A8868
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019K4 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Saturday, September 07, 2013 Sheet 1 of 47
A B C D E
A B C D E
Two DIMM/One Channel
CRT
page 20
1.5V DDRIII 800MHZ
200pin DDRIII-SO-DIMM X2
LVDS Conn. BANK 0, 1, 2, 3 page9,10
1
page 19 AMD Zacate APU 1
Memory BUS(DDRIII)
HDMI Conn. FT1 1.5V DDRIII 1066
page 21 BGA 413-Ball USB PORT 2.0 x2(Right)
USB port 0,1 page 27 Daughter board
19mm x 19mm
PCIE-Express 4X 5GHz USB PORT 2.0 x2(Left)
page 5,6,7,8
USB port 10, 11 page 28
x4 UMI Gen. 1
2.5GT/s per lane 2IN1 RTS5129 Daughter board
USB port 7 page 32
USB2.0x6
VGA (DDR3) 5V 480MHz Int. Camera
USB port 5 page 19
ATI Seymour XTX S3 64bit with 1GB
page 11~18
Hudson M3L
2
(A38M) 2
PCIeMini Card
BGA 656-Ball WiMax
23mm x 23mm USB port 8
page 29
HDMI Conn. LCD Conn. CRT PCIe 1x PCIeMini Card
page 19 page 20
1.5V 2.5GHz(250MB/s) WLAN
page 21
RTL8105E-VB 10/100M PCIe port 1
PCIe 1x page 29
RJ45 RTL811F Giga page 36
page 36 1.5V 2.5GHz(250MB/s)
PCIe port 0
SATA port 0 SATA HDD
USB3.0x2 5V 3GHz(300MB/s) page 27
USB PORT 3.0 x2(Left)
USB3.0 port 0,1 page 28
SATA port 1 SATA ODD
page 22~26
5V 3GHz(300MB/s) page 27
3.3V 33 MHz
LPC BUS
HD Audio 3.3V/1.5V 24MHz
3 3
HDA Codec
TPM Debug Port ENE KB9012 ALC259-GR
page 31
page 32 page 34 page 33
RTC CKT. SPK Conn JCRIO
JTP page 31
Int.KBD (HP & MIC)
RUSB+Power/B (Touch Pad) page 34 page 32
page 35
LS-8865P page 27
Power On/Off CKT.
Audio+CR/B
LS-8864P page 32
DC/DC Interface CKT. ODD/B
4 4
LS-8862P page 27 Daughter board
Power Circuit DC/DC TP/B
LS-8863P page 35 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2012/05/18 Deciphered Date 2013/10/05 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, MB A8868
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019K4
Date: Saturday, September 07, 2013 Sheet 2 of 47
A B C D E
A B C D E
DESIGN CURRENT 0.1A +3VL
B+ DESIGN CURRENT 0.1A +5VL
DESIGN CURRENT 4A +5VALW
1 SUSP 1
N-CHANNEL DESIGN CURRENT 6.5A +5VS
SI4800BDY
ODD_PWR
DESIGN CURRENT 1.5A +5VS_ODD
A03413-SOT23
SUSP#
DESIGN CURRENT 2.6A +1.8VS
Y8032ABC
RT8205LZQW
FCH_PWR_EN
DESIGN CURRENT 1.2A +1.1VALW
SY8036LDBC SUSP
N-CHANNEL DESIGN CURRENT 3.8A +1.1VS
FDS6676AS-SO8
SUSP#
DESIGN CURRENT 2.5A +1.05VS
2 APL5916KAI-TRL 2
DESIGN CURRENT 1.7A +3VALW
SUSP
N-CHANNEL DESIGN CURRENT 4A +3VS
SI4800BDY
LCD_ENVDD
P-CHANNEL DESIGN CURRENT 2.0A +LCD_VDD
AO-3413
WLAN_PWR#
DESIGN CURRENT 500mA +3V_LAN
P-CHANNEL
AO-3413
VR_ON
DESIGN CURRENT 11A +APU_CORE
RT8870AZQW DESIGN CURRENT 10A +APU_CORE_NB
3 3
SYSON
DESIGN CURRENT 7A +1.5V
RT8207MZQW SUSP
N-CHANNEL DESIGN CURRENT 5A +1.5VS
SI4800BDY
SUSP#
DESIGN CURRENT 3A +1.0VS
APL5930KAI-TRG
DESIGN CURRENT 1.5A +0.75VS
SUSP#
DESIGN CURRENT 21.6A +VGA_CORE
TPS51518RUK
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
2012/05/18 2013/10/05 Title
Issued Date Deciphered Date SCHEMATIC, MB A8868
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 4019K4 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Saturday, September 07, 2013 Sheet 3 of 47
A B C D E
A B C D E
Symbol Note :
O MEANS ON X MEANS OFF
Voltage Rails
: means Digital Ground : means Analog Ground
+5VS
1 1
+3VS
power
plane +2.5VS
+1.8VS
+1.5VS
+1.1VS
B+ +5VALW +1.5V
+0.9VS
+3VL +3VALW
+0.75VS
+5VL +1.1VALW +NB_CORE
State
+RTCVCC +VDDNB
+CPU_CORE_0
S0
O O O O
S1
2
O O O O 2
S3
O O O X
S5 S4/AC
O O X X
S5 S4/ Battery only
O X X X
S5 S4/AC & Battery
don't exist X X X X
SB SM Bus1 Address SB SM Bus2 Address
Power Device HEX Address Power Device HEX Address
3 3
+3VS DDR SO-DIMM 0 A0 H 1010 0000 b +3VALW WLAN/WIMAX
SMBUS Control Table
+3VS DDR SO-DIMM 1 A4 H 1010 0100 b
+3VS Clock Generator D2 H 1101 0010 b CPU
SOURCE BATT SODIMM 0 CLK WLAN LCD HDMI
THERMAL GEN DDC DDC APU
WWAN
SENSOR ROM ROM
EC_SMB_CK1
KB926
EC_SMB_DA1 V
EC_SMB_CK2
KB926 V
EC_SMB_DA2
LCD_EDID_CLK
APU FT1
EC SM Bus1 Address EC SM Bus2 Address LCD_EDID_DATA V
HDMICLK
APU FT1
Power Device HEX Address Power Device HEX Address HDMIDAT V
SMB_CK_CLK0
+3VL Smart Battery 16 H 0001 011X b +3VS CPU_ADM1032-1 98 H 1001 100X b FCH M1
SMB_CK_DAT0 V
+3VS G-Sensor SMB_CK_CLK1
FCH M1
4
SMB_CK_DAT1 V 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2012/05/18 Deciphered Date 2013/10/05 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, MB A8868
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019K4 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Saturday, September 07, 2013 Sheet 4 of 47
A B C D E
A B C D E
PCIE_CTX_GRX_P[3..0]
<11> PCIE_CTX_GRX_P[3..0]
PCIE_CTX_GRX_N[3..0]
<11> PCIE_CTX_GRX_N[3..0]
PCIE_CRX_GTX_P[3..0]
<11> PCIE_CRX_GTX_P[3..0]
PCIE_CRX_GTX_N[3..0]
<11> PCIE_CRX_GTX_N[3..0]
1 1
U1A E1R1@
PCIE_CRX_GTX_P0 AA6 AB6 PCIE_CTX_C_GRX_P0 C518 1 2 DIS@ 0.1U_0402_16V7K PCIE_CTX_GRX_P0
PCIE_CRX_GTX_N0 Y6 P_GPP_RXP0 P_GPP_TXP0 AC6 PCIE_CTX_C_GRX_N0 C519 1 2 DIS@ 0.1U_0402_16V7K PCIE_CTX_GRX_N0
P_GPP_RXN0 P_GPP_TXN0
PCIE_CRX_GTX_P1 AB4 AB3 PCIE_CTX_C_GRX_P1 C520 1 2 DIS@ 0.1U_0402_16V7K PCIE_CTX_GRX_P1
PCIE I/F
PCIE_CRX_GTX_N1 AC4 P_GPP_RXP1 P_GPP_TXP1 AC3 PCIE_CTX_C_GRX_N1 C521 1 2 DIS@ 0.1U_0402_16V7K PCIE_CTX_GRX_N1
P_GPP_RXN1 P_GPP_TXN1
PCIE_CRX_GTX_P2 AA1 Y1 PCIE_CTX_C_GRX_P2 C522 1 2 DIS@ 0.1U_0402_16V7K PCIE_CTX_GRX_P2
PCIE_CRX_GTX_N2 AA2 P_GPP_RXP2 P_GPP_TXP2 Y2 PCIE_CTX_C_GRX_N2 C523 1 2 DIS@ 0.1U_0402_16V7K PCIE_CTX_GRX_N2
P_GPP_RXN2 P_GPP_TXN2
PCIE_CRX_GTX_P3 Y4 V3 PCIE_CTX_C_GRX_P3 C524 1 2 DIS@ 0.1U_0402_16V7K PCIE_CTX_GRX_P3
PCIE_CRX_GTX_N3 Y3 P_GPP_RXP3 P_GPP_TXP3 V4 PCIE_CTX_C_GRX_N3 C525 1 2 DIS@ 0.1U_0402_16V7K PCIE_CTX_GRX_N3
P_GPP_RXN3 P_GPP_TXN3
+1.05VS 1 R1 2 DIS@ P_ZVDD_10 Y14 AA14 P_ZVSS DIS@ 1 R2 2
2K_0402_1% P_ZVDD_10 P_ZVSS 1.27K_0402_1%
<22> UMI_RX0P AA12 AB12 UMI_TX0P_C C2 1 2 0.1U_0402_16V7K
P_UMI_RXP0 P_UMI_TXP0 UMI_TX0P <22>
<22> UMI_RX0N Y12 AC12 UMI_TX0N_C C1 1 2 0.1U_0402_16V7K
P_UMI_RXN0 P_UMI_TXN0 UMI_TX0N <22>
<22> UMI_RX1P AA10 AC11 UMI_TX1P_C C4 1 2 0.1U_0402_16V7K
P_UMI_RXP1 P_UMI_TXP1 UMI_TX1P <22>
Y10 AB11 UMI_TX1N_C C3 1 2 0.1U_0402_16V7K
UMI I/F
<22> UMI_RX1N P_UMI_RXN1 P_UMI_TXN1 UMI_TX1N <22>
From FCH <22> UMI_RX2P AB10 AA8 UMI_TX2P_C C5 1 2 0.1U_0402_16V7K To FCH
P_UMI_RXP2 P_UMI_TXP2 UMI_TX2P <22>
<22> UMI_RX2N AC10 Y8 UMI_TX2N_C C6 1 2 0.1U_0402_16V7K
P_UMI_RXN2 P_UMI_TXN2 UMI_TX2N <22>
<22> UMI_RX3P AC7 AB8 UMI_TX3P_C C8 1 2 0.1U_0402_16V7K
P_UMI_RXP3 P_UMI_TXP3 UMI_TX3P <22>
<22> UMI_RX3N AB7 AC8 UMI_TX3N_C C7 1 2 0.1U_0402_16V7K
P_UMI_RXN3 P_UMI_TXN3 UMI_TX3N <22>
S IC E SERIES EME450GBB22GVA 1.65G BGA
2 2
FAN Control Circuit
+5VS JFAN @
1A +FAN 1
2 1
3 2
2 2 3
3 C18 C20 3
10U_0805_10V6K 1000P_0402_50V7K 4
@ 5 GND
U3 1 1 GND
1 8 ACES_85204-0300N
2 EN GND 7
+FAN 3 VIN GND 6 R63 10K_0402_5%
4 VOUT GND 5 2 1
<33> EN_DFAN1 VSET GND +3VS
10mil 1
APL5607KI-TRG_SO8
FAN_SPEED1 <33>
C36 1
10U_0805_10V6K C19
2 0.01U_0402_25V7K
@
2
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2012/05/18 Deciphered Date 2013/10/05 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, MB A8868
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019K4 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Saturday, September 07, 2013 Sheet 5 of 47
A B C D E
1 2 3 4 5
A A
U1E E1R1@
DDR_A_MA0 R17 B14 DDR_A_D0
<9,10> DDR_A_MA0 M_ADD0 M_DATA0 DDR_A_D0 <9,10>
DDR_A_MA1 H19 A15 DDR_A_D1
<9,10> DDR_A_MA1 M_ADD1 M_DATA1 DDR_A_D1 <9,10>
DDR_A_MA2 J17 A17 DDR_A_D2
<9,10> DDR_A_MA2 M_ADD2 M_DATA2 DDR_A_D2 <9,10>
DDR_A_MA3 H18 D18 DDR_A_D3
<9,10> DDR_A_MA3 M_ADD3 M_DATA3 DDR_A_D3 <9,10>
DDR_A_MA4 H17 A14 DDR_A_D4
<9,10> DDR_A_MA4 M_ADD4 M_DATA4 DDR_A_D4 <9,10>
DDR_A_MA5 G17 C14 DDR_A_D5
<9,10> DDR_A_MA5 M_ADD5 M_DATA5 DDR_A_D5 <9,10>
DDR_A_MA6 H15 C16 DDR_A_D6
<9,10> DDR_A_MA6 M_ADD6 M_DATA6 DDR_A_D6 <9,10>
DDR_A_MA7 G18 D16 DDR_A_D7
<9,10> DDR_A_MA7 M_ADD7 M_DATA7 DDR_A_D7 <9,10>
DDR_A_MA8 F19
<9,10> DDR_A_MA8 M_ADD8
DDR_A_MA9 E19 C18 DDR_A_D8
<9,10> DDR_A_MA9 M_ADD9 M_DATA8 DDR_A_D8 <9,10>
DDR_A_MA10 T19 A19 DDR_A_D9
<9,10> DDR_A_MA10 M_ADD10 M_DATA9 DDR_A_D9 <9,10>
DDR_A_MA11 F17 B21 DDR_A_D10
<9,10> DDR_A_MA11 M_ADD11 M_DATA10 DDR_A_D10 <9,10>
DDR_A_MA12 E18 D20 DDR_A_D11
<9,10> DDR_A_MA12 M_ADD12 M_DATA11 DDR_A_D11 <9,10>
DDR_A_MA13 W17 A18 DDR_A_D12
<9,10> DDR_A_MA13 M_ADD13 M_DATA12 DDR_A_D12 <9,10>
DDR_A_MA14 E16 B18 DDR_A_D13
<9,10> DDR_A_MA14 M_ADD14 M_DATA13 DDR_A_D13 <9,10>
DDR_A_MA15 G15 A21 DDR_A_D14
<9,10> DDR_A_MA15 M_ADD15 M_DATA14 DDR_A_D14 <9,10>
DDR SYSTEM MEMORY
C20 DDR_A_D15
M_DATA15 DDR_A_D15 <9,10>
DDR_A_BS#0 R18
<9,10> DDR_A_BS#0 M_BANK0
DDR_A_BS#1 T18 C23 DDR_A_D16
<9,10> DDR_A_BS#1 M_BANK1 M_DATA16 DDR_A_D16 <9,10>
DDR_A_BS#2 F16 D23 DDR_A_D17
<9,10> DDR_A_BS#2 M_BANK2 M_DATA17 DDR_A_D17 <9,10>
F23 DDR_A_D18
M_DATA18 DDR_A_D18 <9,10>
DDR_A_DM0 D15 F22 DDR_A_D19
<9,10> DDR_A_DM0 M_DM0 M_DATA19 DDR_A_D19 <9,10>
DDR_A_DM1 B19 C22 DDR_A_D20
<9,10> DDR_A_DM1 M_DM1 M_DATA20 DDR_A_D20 <9,10>
DDR_A_DM2 D21 D22 DDR_A_D21
<9,10> DDR_A_DM2 M_DM2 M_DATA21 DDR_A_D21 <9,10>
DDR_A_DM3 H22 F20 DDR_A_D22
<9,10> DDR_A_DM3 M_DM3 M_DATA22 DDR_A_D22 <9,10>
DDR_A_DM4 P23 F21 DDR_A_D23
<9,10> DDR_A_DM4 M_DM4 M_DATA23 DDR_A_D23 <9,10>
DDR_A_DM5 V23
<9,10> DDR_A_DM5 M_DM5
DDR_A_DM6 AB20 H21 DDR_A_D24
<9,10> DDR_A_DM6 M_DM6 M_DATA24 DDR_A_D24 <9,10>
DDR_A_DM7 AA16 H23 DDR_A_D25
<9,10> DDR_A_DM7 M_DM7 ◦ Jabse Service Manual Search 2024 ◦ Jabse Pravopis ◦ onTap.bg ◦ Other service manual resources online : Fixya ◦ eServiceinfo