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1 2 3 4 5 6 7 8
04-- 0402 footprint
PCB STACK UP
LAYER 1 : TOP
06--
08--
12--
0603 footprint
0805 footprint
1206 footprint
AT3 BLOCK DIAGRAM 01
LAYER 2 : SGND1 F-- 1% tolerance CPU THERMAL
CPU SENSOR
A
LAYER 3 : IN1 Merom 14.318MHz A
PAG 5
LAYER 4 : IN2
478P (uPGA)/35W
LAYER 5 : VCC PAG 3,4 CLK_CPU_BCLK,CLK_CPU_BCLK#
CLK_MCH_BCLK,CLK_MCH_BCLK# CLOCK GEN
LAYER 6 : IN3 DREFCLK,DREFCLK# ICS9LPRS355AGLFT
64pinsTSSOP
LAYER 7 : SGND2 DREFSSCLK,DREFSSCLK#
PAG 2
LAYER 8 : BOT
Option for 17" only
PCI-Express 16X NVDIA G3-64 for 15.4"
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NVDIA G3-128 for 17" HDMI CON
DDRII-SODIMM1 DDRII 533,667 MHz 820p FCBGA PAG PAG 26
NORTH BRIDGE 15,16,17,18,19,20
TV_OUT PAG 13,14
Cable VGA
Docking Crestline TV_OUT
RJ-45
B
DDRII-SODIMM2 DDRII 533,667 MHz
CRT/S-VIDEO B
CIR/Pwr btn CRT_OUT PAG 25
SPDIF Out PAG 13,14 PAG
7,8,9,10,11,12
Stereo MIC LVDS(2 Channel) Panel Connector
Headphone Jack 15" / 17" PAG 26
USB Port DMI LINK NBSRCCLK, NBSRCCLK#
VOL Cntr
PAG 38 USB2.0
Option for 17" only 0,1,2
5 3 4,6,7
SYSTEM CHARGER(MAX8724) SATA2 Bluetooth USB2.0 I/O Ports Camera Mini PCI-E Card x1
SATA - HDD Express Card x1
PAG 41 PAG 35 X3 PAG 32 X1 PAG 32
PAG 35 SOUTH BRIDGE Cable Docking x1
PCI BUS / 33MHz
SYSTEM POWER MAX8778
SATA0 150MB
PAG 42 SATA - HDD ICH-8M PCI-E
PAG 32
C C
DDR II SMDDR_VTERM Azalia
1.8V/1.8VSUS(TPS51116REGR) PATA (66/100/133)
PAG 46 PATA- CD-ROM PAG 21,22,23,24 Mini PCI-E LAN Express RICOH
PAG 32 Card Realtek Card RICOH 832
PCI Express PCIE-LAN
Realtek Mini Card RTL8101E/8111B (NEW CARD)
VCCP +1.5V AND GMCH
Two-element (Wireless
1.05V(MAX8717) LPC ALC 268 LAN/WAN)
(10/100/GagaLAN) PAG 27,28
PAG 43 microphone
PAG 39 PAG 33,34 PAG 35
PAG 29 PAG 29
Keyboard
VGACORE(1.025V)MAX1992 Touch Pad PAG 36 ENE KBC Audio Jacks IEEE1394 Memory
CardReader
PAG 45 (Phone/ MIC) RJ45 CONN
KB3920 Bx SIM CARD
CIR PAG 29
PAG 36 KB3926 Bx PAG 28 PAG 27
CPU CORE MAX8771 PAG 32 PAG 33
PAG 44 Capacitive Sense PAG 37,48 PCI ROUTING
SW PAG 36 AUDIO MDC DAA TABLE IDSEL INTERUPT DEVICE
Amplifier REQ0# / GNT0# AD25 INTE#,INTF# RICOH832
X-Bus
SI3080
D
Digitally signed by dd PAG 30 PAG 31
D
REQ1# / GNT1# AD22 INTC#,INTD# MINI PCI for debug
DN: cn=dd, o=dd, ou=dd,
email=dddd@yahoo. FAN Flash SPI Jack to PROJECT : AT3
Speaker MODEM RJ 11 Quanta Computer Inc.
com, c=US PAG 38 PAG 37 PAG 37 PAG 30 PAG 33 Size Document Number Rev
Date: 2009.11.05 15:09:50
Custom BLOCK DIAGRAM 1A
NB5/RD1/HW2
Date: Monday, September 11, 2006 Sheet 1 of 48
+07'00'
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+3V
+3V
L42
1 2
BLM21PG600SN1D/08
120 ohms@100Mhz
+CK_VDD_MAIN
CLK_3GPLLREQ#
NEW-CARD_CLK_REQ#
R321
R322
2
2
1 10K/04
1 10K/04
02
1
1
1
1
1
1
C464 C436 C441 C446 C429
C400 .1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04
22U/10V/12
2
2
2
2
2
2
Y1
SI-1 modify
A L43 CG_XIN 1 2 CG_XOUT A
VDDCPU
( remove
1 2
BLM21PG600SN1D/08 R256 --not
14.318MHZ
1
1
1 need )
1
C431 C430
C447 C445 27P/50V/04 27P/50V/04
22U/10V/12 .1U/10V/04
2
2
internal have
2
2
14.318MHz
already build-in
33ohm damping
resisteor
L44
+CK_VDD_MAIN2 U16
1 2
BLM21PG600SN1D/08
120 ohms@100Mhz +CK_VDD_MAIN 16 54 RHCLK_CPU RP40 4 3 4P2R-S-0
VDDPLL3 CPUCLKT0 CLK_CPU_BCLK 3
1
1
1
1
1
1
1
9 53 RHCLK_CPU# 2 1
VDD48 CPUCLKC0 CLK_CPU_BCLK# 3
C479 C456 C473 C448 C462 C458 C452 2
22U/10V/12 .1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04 VDDPCI CK505 RHCLK_MCH RP41 4 3 4P2R-S-0
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61 VDDREF CPUCLKT1 51 CLK_MCH_BCLK 6
RHCLK_MCH#
2
2
2
2
2
2
2
39 VDDSRC CPUCLKC1 50 2 1 CLK_MCH_BCLK# 6
VDDCPU 55 VDDCPU CPU_ITP RP45 4
CPUT2_ITP/SRCT8 47 3 4P2R-S-0 CLK_CPU_ITP 3
+CK_VDD_MAIN2 12 46 CPU_ITP# 2 1
VDD96I/O CPUT2_ITP/SRCC8 CLK_CPU_ITP# 3
20 VDDPLL3I/O
+3V 26 13 R_DOT96 RP42 2 1 4P2R-S-0
VDDSRCI/O DOTT_96/SRCT0 DREFCLK 7
45 14 R_DOT96# 4 3
VDDSRCI/O DOTC_96/SRCC0 DREFCLK# 7
36 VDDSRCI/O
SI-1 modify
+3V 17 R_DREFSSCLK RP43 2 1 4P2R-S-0
27MHz_Nonss/SRCCLK1/SE1 DREFSSCLK 7 ( add in
2
49 18 R_DREFSSCLK# 4 3
B VDDCPU_IO 27Mhz_ss/SRCCLC1/SE2 DREFSSCLK# 7 UMA BOM ) B
48 NC
R259 21 RSRC_SATA RP46 2 1 4P2R-S-0
SRCCLKT2/SATACL RSRC_SATA# CLK_PCIE_SATA 21
10K/04 22 4 3
SRCCLKC2/SATACL CLK_PCIE_SATA# 21
CG_XIN 60
Q16 R288 R308 CG_XOUT X1 R_CLK_PCIE_VGA RP48 2 1 4P2R-S-0
1
59 X2 SRCCLKT3/CR#_C 24 CLK_PCIE_VGA 20
2
PCLK_MINI_LPC 10K/06 10K/06 25 R_CLK_PCIE_VGA# 4 3
SRCCLKC3/CR#_D CLK_PCIE_VGA# 20
2N7002E
3 1 CGDAT_SMB 27 RSRC1_LAN RP50 2 1 4P2R-S-0
23,35 PDAT_SMB SRCCLKT4 CLK_PCIE_LAN 33
28 RSRC1_LAN# 4 3
SRCCLKC4 CLK_PCIE_LAN# 33
R269
56 38 PM_STPPCI#
23 CK_PWG CK_PWRGD/PD# PCI_STOP# PM_STPPCI# 23
*4.7K/04 CLK_BSEL1 R298 4.7K/04FSB 57 37 PM_STPCPU#
FSLB/TEST_MODE CPU_STOP# PM_STPCPU# 23
+3V
41 RSRC_ICH RP49 4 3 4P2R-S-0
SRCCLKT6 CLK_PCIE_ICH 22
Q17 40 RSRC_ICH# 2 1
SRCCLKC6 CLK_PCIE_ICH# 22
2
2N7002E CGCLK_SMB 64 44 CLK_PCIE_MINI_ RP47 4 3 4P2R-S-0
13,14,39 CGCLK_SMB SCLK SRCCLKT7/CR#_F CLK_PCIE_MINI 39
3 1 CGCLK_SMB CGDAT_SMB 63 43 CLK_PCIE_MINI_# 2 1
23,35 PCLK_SMB 13,14,39 CGDAT_SMB SDATA SRCCLKC7/CR#_E CLK_PCIE_MINI# 39
0=overclocking 30 RSRC_MCH RP52 2 1 4P2R-S-0
SRCCLKT9 CLK_PCIE_3GPLL 7
15 31 RSRC_MCH# 4 3
of CPU and GND SRCCLKC9 CLK_PCIE_3GPLL# 7
19 GND
11 34 CLK_PCIE_NEW RP51 2 1 4P2R-S-0
SRC Allowed GND48 SRCCLKT10 CLK_PCIE_NEW#
CLK_PCIE_NEW_C 35
52 GNDCPU SRCCLKC10 35 4 3 CLK_PCIE_NEW_C# 35
8 GNDPCI
1 = overclocking 58 33 NEW-CARD_CLK_REQ#_R R324 475/F/03 NEW-CARD_CLK_REQ#
GNDREF SRCCLKT11/CR#_H NEW-CARD_CLK_REQ# 35
23 32 CLK_3GPLLREQ#_R R323 475/F/03 CLK_3GPLLREQ#
of CPU and SRC GNDSRC SRCCLKC11/CR#_G CLK_3GPLLREQ# 7
29 GNDSRC
not Allowed 42 GNDSRC
1 R_PCLK_KB3920 R250 33/04
C PCICLK0/CR#_A PCLK_LPC_KB3920 37,48 C
C416 *33P/50V/04 PCLK_LPC_KB3920 3 R_PCLK_5C832 R260 33/04
PCICLK1/CR#_B PCI_CLK_5C832 28
4 PCLK_MINI_LPC R279 33/04
PCICLK2/TME PCI_ICH PCLK_LPC_DEBUG 39
C421 *33P/50V/04 PCI_CLK_5C832 5 T258
+3V PCICLK3 FCTSEL1 R293 33/04
PCICLK4/27_SELECT 6 PCLK_MINI 40 form ICS FAE
C442 *33P/50V/04 PCLK_ICH SI-1 modify for recommend(defaule is
C438 *33P/50V/04 PCLK_LPC_DEBUG
S3 resume issue
R285 33/04 Hi )
PCLK_ICH 22
2
7 ITP_EN
C432 *33P/50V/04 14M_ICH PCI_F5/ITP_EN R292 33/04
CLKUSB_48 23
R287 10 FSA R295 4.7K/04 CLK_BSEL0
*10K/04 USB_48MHZ/FSLA FSC R257 4.7K/04 CLK_BSEL2
for EMI 62 R266 33/04
FSLC/TST_SL/REF 14M_ICH 23
FCTSEL1
1
ICS9LPRS355AGLFT/CY28548ZXCT/RTM875T-606
2
R296 GCLK_SEL = FCTSEL1
10K/04 CPU Clock select FSC FSB FSA CPU SRC PCI
1 0 1 100 100 33 FCTSEL1 PIN20 PIN21 PIN24 PIN25
R309 0/04 CLK_BSEL0 R310 0/04
1
3 CPU_BSEL0 MCH_BSEL0 7 (PIN13)
R307 *56/04
0 0 1 133 100 33
+1.05V
0=UMA 0 1 1 166 100 33 0=UMA DOT96T DOT96C SRCT1/LCDT_100 SRCT1/LCDT_100
1 = External VGA R301 1K/04
R305 0/04 CLK_BSEL1 R299 0/04
0 1 0 200 100 33
3 CPU_BSEL1 MCH_BSEL1 7 1 = External
R302 *0/04
0 0 0 266 100 33 VGA SRCT0 SRCC0 27Mout-NSS 27Mout-SS
+3V
R303 1K/04
1 0 0 333 100 33
+1.05V
2
D Enable ITP D
R277 0/04 CLK_BSEL2 R258 0/04
1 1 0 400 100 33
3 CPU_BSEL2 MCH_BSEL2 7
10K/04 1 1 1 RSVD 100 33
R283 R264 *0/04
1K to NB only when
R265 1K/04
1
PROJECT : AT3
+1.05V XDP is implement.No
ITP_EN
XDP can use 0 ohm
Quanta Computer Inc.
Size Document Number Rev
Custom CLOCK GENERATOR 1A
NB5/RD1/HW2
Date: Monday, September 11, 2006 Sheet 2 of 48
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
H_A#[3..16] U31A H_D#[0..63] U31B H_D#[0..63]
6 H_A#[3..16] 6 H_D#[0..63] H_D#[0..63] 6
H_A#3 J4 H1 H_D#0 E22 Y22 H_D#32
A[3]# ADS# H_ADS# 6 D[0]# D[32]#
H_A#4 L5 E2 H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# 6 D[1]# D[33]#
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