Service Manuals, User Guides, Schematic Diagrams or docs for : Dell Alienware M17x-
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Quicksilver Design
SYSTEM MCP VR CPU VR
POWER HybridSLI SW PG 19, 21 Dual/Quad Core CPU +MCP_CORE +VCC_CORE/
HybridSLI POWER PG 45 PG 44, 45
A
+5V_MXM1/ +5V_MXM2 Intel +1.05V_VCCP A
POWER +3.3V_MXM1/ +3.3V_MXM2 Penryn REGULATOR For DDR3 REGULATOR
AC/BATT (35W/45W/OC 55W) +1.5V_DDR/ SYS 5V/ 3V
+0.75V_DDR_VTT PG 46 PG 47
CONNECTOR PG 49
(478 Micro-FCPGA) RUN/SUS POWER SW LDO LDO
BATT 35 x 35 mm +5V/+3.3V/+1.5V_RUN +1.05V_SUS +1.8V_RUN
PG 5,6 +3.3V_SUS/ +3.3V_ALW PG 50 PG 48 PG 48
CHARGER PG 43
1066 MHz FSB
LVDS
LVDS Mux Panel PG 24
DDR3-SODIMM PG 17
1333 MHZ DDR III
TI TS3DV520EPG 23
LVDS
VGA
1333 MHZ DDR III NVIDIA CRT CONN PG 25
DDR3-SODIMM PG 18
MCP79SLI HDMI
USB2.0 HDMI Connector PG 27
LVDS
USB x 2
Audio/ Express Board HDMI Mux
TI TMDS251 DP
B
Amplifier PG 26
Display Port PG 27
B
Audio Jack
MAX9724A DP-C DP-D DP-A
Audio Jack Amplifier AUDIO
IDT MXM CONNECTOR 1 PG 19-20
MAX9724A PCIEx8
92HD73C SLI
Audio Jack IHDA
PCIEx8 PG 21-22
Audio Jack MXM CONNECTOR 2 Light FX
USB2.0 PG 36, 37
(56 LQFP)
Keyboard BL
Amplifier 9 x 9 mm PCI-E I2C
Internal Speaker WLAN Half T/P Module
TPA6040A4 USB2.0
5Wx2 MINI-CARD 30
PG Head Logo - A
PG 24
USB2.0
WebCam+DMIC PCI-E
Logo - B
USB2.0 WWAN MINI-CARD PG 31
Speaker LED
C PCI-E C
PG 28
USB2.0 UWB/BT MINI-CARD
USBx2 USB2.0
USB2.0
COMBO CONN PG 31
PG 28
SATA2 Express Switch
USB/eSATA
SATA2 PCI-E RICOH
(1437 Pin PBGA)
PG 29
SATA2 USB2.0 Express Card R5538D001
SATA - ODD 35 x 35 mm
SATA2 RGMII (20 QFN)
PG 7~16
Audio/ Express Board 4 x 4 mm
SATA - HDD1 PG 29
33MHz PCI LPC
SATA - HDD2 PG 29 PHY
Broadcom
PC Card/1394 SM Bus SIO
PG 39
B5071A2KFBG
1394 RICOH ITE Magnetic RJ45
(100 BGA)
R5C833T SPI PG 41 PG 41
CardReader ITE8512E 9 x 9 mm PG 40
(128 Pin TQFP) PG
CONN (128 Pin LQFP)
14 x 14 mm 38,39 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
D
Audio/ Express Board 16 x 16 mm BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
D
PG 34 NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
MAX7313 X 3 T/P Board CIR Board
THERMAL PG 36
FLASH Memory PS/2
USER
2MB DELL/FLEX CONFIDENTIAL
SMSC4002 PG 32
INTERFACE Title
(8 Pin SO8W) Keyboard Touchpad CIR
PG 35 PG 34 PG 35
Cover Sheet
Size Document Number Rev
A00
Quicksilver
1 2
http://laptop-motherboard-schematic.blogspot.com/
3 4 5 6
Date: Monday, March 09, 2009
7
Sheet 1
8
of 61
1 2 3 4 5 6 7 8
INDEX
Power States
Page# Description
Control S4/ S5/
1 Schematic Block Diagram
Power Rail S0 S3 S4 S5 G3
Signal M-off M-off
2 Front Page +PWR_SRC N/A V V V V V
3 PCI RESET/CLOCK +0.75V_DDR_VTT RUN_ON V
A A
4 POWER SEQUENCING +1.05V_VCCP CPUVDD_EN V
5-6 Penryn +1.05V_RMGT SLP_RMGT# V
7-16 MCP79 +1.05V_SUS SUS_ON V V
17-18 DDRIII SO-DIMM(204P) +1.5V_RUN RUN_ON V
19-22 MXM CONN +1.5V_DDR SUS_ON V V
23 LCD Conn. & SSP +1.8V_RUN RUN_ON V
25 CRT Conn +15V_ALW N/A V V V V V
26 DeMux (SN75DP122) +3.3V_ALW +3.3V_EN2 V V V V V
27 HDMI & DP CONN +3.3V_RMGT SLP_RMGT# V
28 USBx2 & eSATA +3.3V_RUN RUN_ON V
B B
29 SATA & IDE Conn +3.3V_SUS SUS_ON V V
30 Mini Card (WLAN) +5V_ALW +5V_EN1 V V V V V
31 MINI-CARD (WPAN,WWAN) +5V_ALW2 N/A V V V V V
32 FAN & Thermal +5V_SUS SUS_ON V V
33 SIO (ITE8512) +5V_HDD HDDC_EN V TBD
34 Flash ROM, RTC & CIR +5V_MOD MODC_EN V TBD
35 Keyboard, Daughtor Board conn & User Interface +5V_RUN RUN_ON V
36, 37 LED Light FX +GFX_PWR_SRC N/A V V V V V
38, 39 PCCARD/Conn & 1394 +LCDVCC ENVDD V
C 40,41 PHY(B5071), RJ45 & Transform +MCP_CORE RUN_ON V C
42 System Reset Circuit +RTC_CELL RTC V V V V V
43 CHARGER (MAX8731)
+VCC_CORE 1.05V_VCCP
44 CPU Core (MAX8786) _PWRGD V
45 MCP79, 1.05VCC (MAX17007) +USB_RIGHT_PWR USB_SIDE_EN# V TBD
46 DDR3 1.5V/0.75V(TPS51116) +USB_LEFT_PWR USB_BACK_EN# V TBD
By Anthony
47 SYS 5V/3V(MAX17020)
48 1.05V_SUS/ 1.8V_RUN
49 DCIN,Batt
50 RUN POWER SW
D 51 Power Diagram D
52 PAD& SCREW
53 PCI Reset Map
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT FRONTPAGE
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD A00
Dell/FLEX Confidential
1 2
http://laptop-motherboard-schematic.blogspot.com/
3 4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5 6
Date: Monday, March 09, 2009
7
Sheet 2
8
of 61
1 2 3 4 5 6 7 8
Penryn 2C/4C (45W)
BCLK1
A A
BCLK0
MCP79
*ITP700 Flex_NC MCLK0A[2:0]
2 MCLK0A[1:0] USED
MCLK0A[1:0] USED
BCLKOUT_CPU_P MCLK0A[2:0]*
2
BCLKOUT_CPU_N
2
MCS0A[1:0]*
MODT0A[1:0]*
MCKE0A[1:0]* 2 2
BCLKOUT_ITP_P
BCLKOUT_ITP_N
BCLK_OUT_NB_P SO-DIMM 0
BCLK_OUT_NB_N MCLK0B[2:0]
MCLK0B[2:0]* NC
LEAVE EMPTY
BCLKIN_N 2 MCLK0B[1:0] USED
MCLK1A[2:0]
BCLKIN_P MCLK0B[1:0] USED
MCLK1A[2:0]*
2 MINICARD
2 EXPRESS Robsun,
MCS1A[1:0]* MINI CARD BT,UWB
CARD MINICARD
MODT1A[1:0]* WLAN PPU CONN
2 2 MXM_3.0 WWAN
32.768 KHZ MCKE1A[1:0]*
KBC SUSCLK
B LPC_CLK SO-DIMM 1 B
MCLK1B[2:0]
NC
MCLK1B[2:0]*
LPC LPC
FLASH HEADER PE0_REFCLK
PE0_REFCLK*
PE1_REFCLK
32.768 KHZ PE1_REFCLK*
RTC_XTAL
PE2_REFCLK
PE2_REFCLK*
PE3_REFCLK
25.0 MHZ PE3_REFCLK*
XTAL
PE4_REFCLK
PE4_REFCLK*
PE5_REFCLK
PE5_REFCLK*
TV XTAL
TEST PAD
PE6_REFCLK
PHY TEST PAD
PE6_REFCLK*
LAN INTERFACE
BUF_25M
RXC Card Reader
GTXCLK RGMII_RXCLK / MII_RXCLK PCI_CLK0
PCICLK
RGMII_TXCLK / MII_TXCLK PCI_CLK1
PCI_CLK2
CODEC
PCI_CLK_IN
HDA_BITCLK
C HDA BITCLK C
TPS51116PWPRG4
LEAVE EMPTY DDCl_CLK0 CRT CONN
S3 PCI_RESET0#
Card Reader +VTT_CPUCLK
+1.15V_VCCP
PCE/OTHER PCI_RESET0#
MXM_3.0
PCIRST# IFPB_TXC_P
CRT CONN
IFPB_TXC_N
D D
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT CLOCK MAP
1 2
http://laptop-motherboard-schematic.blogspot.com/
3 4
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5 6
Size
Date:
Document Number
Dell/FLEX Confidential
Monday, March 09, 2009
7
Sheet 3
8
of 61
Rev
A00
1 2 3 4 5 6 7 8
Quicksilver Power Up Sequence.
+RTC_CELL
+5V_ALW2
+3.3V_ALW_1720
A A
MAIN_PWR_SW#
+5V_ALW_ON
+5V_ALW
+3V_ALW_ON
+3V_ALW
3.3V 5V ALW PWRGD
SUS_ON
+1.05V_SUS
+3.3V_SUS
1.05V_SUS_PWRGD
SIO_PWRGD_SB
RGMII_25MHZ
PWRGD_SB
SUS_CLK
SLP_RMGT#
B B
+1.1V_RMGT
+3.3V_RMGT
MCP_PWRBTN#
SLP_S5#
+1.5V_DDR
SLP_S3#
STR_EN#
+0.75V_DDR_VTT
1.5V_DDR_PWRGD
RUN_ON
+1.1V_RUN
1.1V_RUN_PWRGD
+MCP_CORE
MCP_PWRGD
+1.8V_RUN
1.8V_RUN_PWRGD
C C
+5V_RUN
+1.5V_RUN
+3.3V_RUN
HWPG
MXM1_PWR_EN
+3.3V_MXM1
+5V_MXM1
MXM2_PWR_EN
+3.3V_MXM2
+5V_MXM2
MXM_RUNPWROK
PS_PWRGD
CPUVDD_EN
+1.05_VCCP
+1.05_RUN
1.05_VCCP_PWRGD
D
+VCC_CORE D
CPU_PWRGD
PCI_CLK
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
POWER SEQUENCING
http://laptop-motherboard-schematic.blogspot.com/
Size Document Number Rev
A00
Dell/FLEX Confidential
Date: Monday, March 09, 2009 Sheet 4 of 61
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
H_A#[3..16] U1A H_D#[0..15] U1B H_D#[32..47]
(7) H_A#[3..16] (7) H_D#[0..15] H_D#[32..47] (7)
H_A#3 J4 H1 +1.05V_VCCP H_D#0 E22 Y22 H_D#32
A[3]# ADS# H_ADS# (7) D[0]# D[32]#
GROUP_0
GROUP_0
ADDR
H_A#4 L5 E2 Layout Note: H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# (7) D[1]# D[33]#
H_A#5 L4 G5 H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# (7) Keep 12 mils D[2]# D[34]#
1
H_A#6 K5 H_D#3 G22 V26 H_D#35
A[6]# D[3]# D[35]#
DATA GRP 0
DATA GRP 0
H_A#7 M3 A[7]# DEFER# H5 H_DEFER# (7) spacing and H_D#4 F23 D[4]# D[36]# V23 H_D#36
H_A#8 N2 F21 R5 H_D#5 G25 T22 H_D#37
A[8]# DRDY# H_DRDY# (7) near CPU. D[5]# D[37]#
DATA GRP 2
H_A#9 J1 E1 *62_NC H_D#6 E25 U25 H_D#38
A[9]# DBSY# H_DBSY# (7) D[6]# D[38]#
H_A#10 N3 H_D#7 E23 U23 H_D#39
2
H_A#11 A[10]# H_BR0# H_D#8 D[7]# D[39]# H_D#40
P5 A[11]# BR0# F1 H_BR0# (7) K24 D[8]# D[40]# Y25
H_A#12 P2 R1 51_F H_D#9 G24 W 22 H_D#41
H_A#13 A[12]# H_IERR# 1 H_D#10 D[9]# D[41]# H_D#42
A
L2 A[13]# IERR# D20 2 +1.05V_VCCP J24 D[10]# D[42]# Y23 A
CONTROL
H_A#14 P4 B3 +1.05V_VCCP H_D#11 J23 W 24 H_D#43
A[14]# INIT# H_INIT# (7) D[11]# D[43]#
H_A#15 P1 Layout Note: H_D#12 H22 W 25 H_D#44
A[15]# H_LOCK# (7) D[12]# D[44]#
H_A#16 R1 H4 H_D#13 F26 AA23 H_D#45
A[16]# LOCK# Place R8 D[13]# D[45]#
1
M1 H_D#14 K22 AA24 H_D#46
(7) H_ADSTB#0 H_REQ#[0..4] ADSTB[0]# D[14]# D[46]#
(7) H_REQ#[0..4] RESET# C1 R6 1 2 0 H_RESET# R8 close to H_D#15 H23 D[15]# D[47]# AB25 H_D#47
H_REQ#0 K3 F3 *200_F_NC J26 Y26
H_REQ#1 REQ[0]# RS[0]# H_RS#0 (7) CPU. (7) H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 (7)
H2 REQ[1]# RS[1]# F4 H_RS#1 (7) (7) H_DSTBP#0 H26 DSTBP[0]# DSTBP[2]# AA26 H_DSTBP#2 (7)
H_REQ#2 K2 G3 H25 U22
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