Service Manuals, User Guides, Schematic Diagrams or docs for : Dell DELL M4040 DV14 AMD Brazos 4IU01 10265-1
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5 4 3 2 1
D
Enrico 14 D
Muxless Discrete/UMA Schematics Document
AMD Ontario CPU FT1
AMD GPU Seymour XT
FCH HUDSON M1
C C
PCB :10265
2010-04-21
REV : A00
B B
DY :None Installed
UMA:UMA and Muxless platform installed
DIS_PX:DIS and Muxless platform installed
PSL:10mW internal schematic
10mW: 10mW schematic installed
A Surge: Surege schematic installed A
GIGA: GIGA schematic installed
10/100: 10/100 schematic installed Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
ROB: ROBOSON GPU installed
Title
Cover Page
Size Document Number Rev
A3
Enrico 14 AMD A00
5 4 www.bblianmeng.com
3 2
Date: Friday, April 22, 2011 Sheet
1
1 of 109
5 4 3 2 1
CHARGER
BQ24707 40
Project code : 91.4IU01.001 INPUTS OUTPUTS
PCB P/N :
AMD Brazos UMA/Discrete Block Diagram AD+
DCBATOUT
28,29
BT+
Revision : 10265-1 SYSTEM DC/DC
DDRIII DIMM1 TPS51125A 41
D DDR III 1333 D
1066MHZ INPUTS OUTPUTS 30
14,15
AMD APU-Ontario 3D3V_AUX_S5
RGB CRT (FT1 BGA 413-Ball) 5V_AUX_S5
CRT DDRIII DIMM2 DCBATOUT
50 5V_S5
1066MHZ 14,15
PCIe GPPs (4 parts) 3D3V_S5
27
DP0 (DP/HDMI/DVI/LVDS)
LVDS APU Core/NB Power
DP1 (DP/HDMI/DVI) DP0 42, 43
ISL6265CHRTZ-T
AMD dGPU 49
INPUTS OUTPUTS
31
PCIe x 4 Gen 2(Muxless)
Seymour-XT 4,5,6,7,8
DP1
HDMI APU_VDD
VRAM DCBATOUT
51 APU_VDDNB
83,84,85,86,87
gDDR3
64M*16b*4(512MB)/128M*16b*4(1024MB) DDRIII SUS
x4 UMI(Gen 1) TPS51216RUKR 44
INPUTS OUTPUTS
C
10/100 DCBATOUT 1D5V_S3 C
CardReader RJ45
PCIE x 1 Realtek
31
DDRIII VTT
SD/MMC/MS RTL8105 CONN 59 TPS51216RGER 44
Realtek USB2.0
74
RTS5138 FCH INPUTS OUTPUTS
32
Hudson-M1 DCBATOUT 0D75V_S0
APU VDDR/VDDP
USB 2.0 (14 parts) PCIE x 1 Mini-Card/Bluetooth TPS51218 46
USB 2.0 x 1 INPUTS OUTPUTS
USB 1.1 (2 parts) 802.11a/b/g
65
Internal Analog MIC AZALIA SATA III(6 parts), 6Gb/s DCBATOUT 1D1V_S5
Azalia INT CLK GEN AMD APU/FCH CORE Power
USB 2.0 x 3
MIC IN CODEC HW MONITOR
Right Side:
USB x3
TPS51218 46
ACPI 1.1 61 INPUTS OUTPUTS 33
& USB 2.0 x 1 CAMERA DCBATOUT 1V_S0
HP OUT
OP AMP (Option) 49 AMD GPU CORE
B IDT 92HD87B1 USB 2.0 RT8208BGQW 26 92 B
29 INPUTS OUTPUTS
LPC Bus DCBATOUT VGA_CORE
2CH SPEAKER AMD GPU CORE
RT8015B 26 47
17,18,19,20,21,22
INPUTS OUTPUTS
3D3V_S5 1D8V_S0
PCB LAYER
KBC L1: Top
SATA II
SATA II
SPI NUVOTON L2: VCC
27
NPCE795P L3: Signal
L4: Signal
L5: GND
L6: Bottom
A A
Flash ROM Touch Int. Thermal
HDD ODD Wistron Corporation
56 56 2MB PAD KB P2800
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
60 69 69 25 28 Taipei Hsien 221, Taiwan, R.O.C.
Title
Fan Block Diagram
Size Document Number Rev
P2793 58 A3 Enrico 14 AMD A00
Date: Friday, April 22, 2011 Sheet 2 of 109
5 4 www.bblianmeng.com 3 2 1 28
28
5 4 3 2 1
REQUIRED SYSTEM STRAPS
D
AZ_SDOUT PCI_CLK1 CLK_PCI_LPC PCI_CLK4 TYPE EC_PWM2 EC_PWM3 D
LPC_CLK0 LPC_CLK1 LPC_CLK2
ENABLED
PULL LOW POWER Allow USE non_Fusion CLKGEN Enable
HIGH MODE PCIE GEN2 DEBUG CLOCK mode ENABLE EC ENABLED boot timer Reserved 2.2-kohm 5% pull-down 2.2-kohm 5% pull-down
STRAPS (Use Internal) function
DEFAULT DEFAULT
PERFORMANCE Force IGNORE Fusion DISABLE EC CLKGEN Disable boot LPC ROM Not connected. 2.2-kohm 5% pull-down
PULL
MODE PCIE GEN1 DEBUG CLOCK mode DISABLED fail timer
LOW
STRAPS function
DEFAULT DEFAULT
DEFAULT DEFAULT (Use External) DEFAULT
SPI ROM 2.2-kohm 5% pull-down Not connected.
Reserved Not connected. Not connected.
Note: EC_PWM2, EC_PWM3 default have internal 10kohm PU.
C C
USB Table PCIe Routing
APU
Pair USB Device
0 USB 2.0 EXT.Port1 LANE0 LAN
1 Mini Card1 (WLAN)
LANE1 WWAN
2 USB 2.0 EXT.Port1
3 NC LANE2 WLAN
4 NC
LANE3 CardReader
5 NC
6 USB 2.0 EXT.Port1
7 CCD Camera
B B
8 NEWCARD
9 Card Reader
10 NC
11 NC
12 NC
13 NC
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Table of Content
Size Document Number Rev
A3
Enrico 14 AMD A00
5 4 www.bblianmeng.com 3 2
Date: Friday, April 22, 2011 Sheet
1
3 of 109
5 4 3 2 1
SSID = CPU
D D
APU1A 1 OF 5
PEG_C_TXP0 C401 1
DIS_PX
83 PEG_RXP0 AA6 P_GPP_RXP0 ONTARIO_FT1 P_GPP_TXP0 AB6 2 SCD1U10V2KX-5GP PEG_TXP0 83
83 PEG_RXN0 Y6 AC6 PEG_C_TXN0C402 DIS_PX SCD1U10V2KX-5GP
1 2
P_GPP_RXN0 P_GPP_TXN0 PEG_TXN0 83
83 PEG_RXP1 AB4 AB3 PEG_C_TXP1 C403 DIS_PX SCD1U10V2KX-5GP
1 2
P_GPP_RXP1 P_GPP_TXP1 PEG_TXP1 83
83 PEG_RXN1 AC4 AC3 PEG_C_TXN1C404 DIS_PX SCD1U10V2KX-5GP
1 2
P_GPP_RXN1 P_GPP_TXN1 PEG_TXN1 83
83 PEG_RXP2 AA1 Y1 PEG_C_TXP2 C405 DIS_PX SCD1U10V2KX-5GP
1 2
P_GPP_RXP2 P_GPP_TXP2 PEG_TXP2 83
83 PEG_RXN2 AA2 Y2 PEG_C_TXN2C406 DIS_PX SCD1U10V2KX-5GP
1 2
P_GPP_RXN2 P_GPP_TXN2 PEG_TXN2 83
Y4 V3 PEG_C_TXP3 C407 DIS_PX SCD1U10V2KX-5GP
1 2
PCIE I/F
83 PEG_RXP3 P_GPP_RXP3 P_GPP_TXP3 PEG_TXP3 83
83 PEG_RXN3 Y3 V4 PEG_C_TXN3C408 DIS_PX SCD1U10V2KX-5GP
1 2
P_GPP_RXN3 P_GPP_TXN3 PEG_TXN3 83
1V_S0 R401 1 2 P_ZVDDP Y14 AA14 P_ZVSS 1 R402 2
2KR2F-3-GP P_ZVDD_10 P_ZVSS 1K27R2F-L-GP
17 UMI_FCH_APU_RX0P AA12 AB12 UMI_TX0P_C C409 1 2 SCD1U10V2KX-5GP
P_UMI_RXP0 P_UMI_TXP0 UMI_APU_FCH_TX0P 17
17 UMI_FCH_APU_RX0N Y12 AC12 UMI_TX0N_C C410 1 2 SCD1U10V2KX-5GP
C P_UMI_RXN0 P_UMI_TXN0 UMI_APU_FCH_TX0N 17 C
17 UMI_FCH_APU_RX1P AA10 AC11 UMI_TX1P_C C411 1 2 SCD1U10V2KX-5GP
P_UMI_RXP1 P_UMI_TXP1 UMI_APU_FCH_TX1P 17
17 UMI_FCH_APU_RX1N Y10 AB11 UMI_TX1N_C C412 1 2 SCD1U10V2KX-5GP
P_UMI_RXN1 P_UMI_TXN1 UMI_APU_FCH_TX1N 17
UMI_TX2P_C C413 1 2 SCD1U10V2KX-5GP
UMI I/F
17 UMI_FCH_APU_RX2P AB10 P_UMI_RXP2 P_UMI_TXP2 AA8 UMI_APU_FCH_TX2P 17
17 UMI_FCH_APU_RX2N AC10 Y8 UMI_TX2N_C C414 1 2 SCD1U10V2KX-5GP
P_UMI_RXN2 P_UMI_TXN2 UMI_APU_FCH_TX2N 17
17 UMI_FCH_APU_RX3P AC7 AB8 UMI_TX3P_C C415 1 2 SCD1U10V2KX-5GP
P_UMI_RXP3 P_UMI_TXP3 UMI_APU_FCH_TX3P 17
17 UMI_FCH_APU_RX3N AB7 AC8 UMI_TX3N_C C416 1 2 SCD1U10V2KX-5GP
P_UMI_RXN3 P_UMI_TXN3 UMI_APU_FCH_TX3N 17
ONTARIO-FT1-GP
B B
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
APU_PCIE(1/5)
Size Document Number Rev
A3
Enrico 14 AMD A00
Date: Friday, April 22, 2011 Sheet 4 of 109
5 4 www.bblianmeng.com 3 2 1
5 4 3 2 1
APU1E 5 OF 5
R17 B14
SSID = CPU 14,15
14,15
14,15
M_A0
M_A1
M_A2
H19
J17
M_ADD0
M_ADD1
M_ADD2
ONTARIO_FT1
M_DATA0
M_DATA1
M_DATA2
A15
A17
M_DQ0
M_DQ1
M_DQ2
14,15
14,15
14,15
14,15 M_A3 H18 M_ADD3 M_DATA3 D18 M_DQ3 14,15
14,15 M_A4 H17 M_ADD4 M_DATA4 A14 M_DQ4 14,15
14,15 M_A5 G17 M_ADD5 M_DATA5 C14 M_DQ5 14,15
14,15 M_A6 H15 M_ADD6 M_DATA6 C16 M_DQ6 14,15
14,15 M_A7 G18 M_ADD7 M_DATA7 D16 M_DQ7 14,15
14,15 M_A8 F19 M_ADD8
14,15 M_A9 E19 M_ADD9 M_DATA8 C18 M_DQ8 14,15
14,15 M_A10 T19 M_ADD10 M_DATA9 A19 M_DQ9 14,15
14,15 M_A11 F17 M_ADD11 M_DATA10 B21 M_DQ10 14,15
D 14,15 M_A12 E18 M_ADD12 M_DATA11 D20 M_DQ11 14,15 D
14,15 M_A13 W17 M_ADD13 M_DATA12 A18 M_DQ12 14,15
14,15 M_A14 E16 M_ADD14 M_DATA13 B18 M_DQ13 14,15
14,15 M_A15 G15 M_ADD15 M_DATA14 A21 M_DQ14 14,15
M_DATA15 C20 M_DQ15 14,15
14,15 M_BS0 R18 M_BANK0
14,15 M_BS1 T18 M_BANK1 M_DATA16 C23 M_DQ16 14,15
14,15 M_BS2 F16 M_BANK2 M_DATA17 D23 M_DQ17 14,15
M_DATA18 F23 M_DQ18 14,15
14,15 M_DM0 D15 M_DM0 M_DATA19 F22 M_DQ19 14,15
14,15 M_DM1 B19 M_DM1 M_DATA20 C22 M_DQ20 14,15
14,15 M_DM2 D21 M_DM2 M_DATA21 D22 M_DQ21 14,15
14,15 M_DM3 H22 M_DM3 M_DATA22 F20 M_DQ22 14,15
14,15 M_DM4 P23 M_DM4 M_DATA23 F21 M_DQ23 14,15
14,15 M_DM5 V23 M_DM5
14,15 M_DM6 AB20 M_DM6 M_DATA24 H21 M_DQ24 14,15
14,15 M_DM7 AA16 M_DM7 M_DATA25 H23 M_DQ25 14,15
M_DATA26 K22 M_DQ26 14,15
14,15 M_DQS0 A16 M_DQS_H0 M_DATA27 K21 M_DQ27 14,15
14,15 M_DQS#0 B16 M_DQS_L0 M_DATA28 G23 M_DQ28 14,15
14,15 M_DQS1 B20 M_DQS_H1 M_DATA29 H20 M_DQ29 14,15
14,15 M_DQS#1 A20 M_DQS_L1 M_DATA30 K20 M_DQ30 14,15
14,15 M_DQS2 E23 M_DQS_H2 M_DATA31 K23 M_DQ31 14,15
14,15 M_DQS#2 E22 M_DQS_L2
14,15 M_DQS3 J22 M_DQS_H3 M_DATA32 N23 M_DQ32 14,15
J23 P21
MEMORY
14,15 M_DQS#3 M_DQS_L3 M_DATA33 M_DQ33 14,15
14,15 M_DQS4 R22 M_DQS_H4 M_DATA34 T20 M_DQ34 14,15
14,15 M_DQS#4 P22 M_DQS_L4 M_DATA35 T23 M_DQ35 14,15
14,15 M_DQS5 W22 M_DQS_H5 M_DATA36 M20 M_DQ36 14,15
I/F
C V22 P20 C
14,15 M_DQS#5 M_DQS_L5 M_DATA37 M_DQ37 14,15
14,15 M_DQS6 AC20 M_DQS_H6 M_DATA38 R23 M_DQ38 14,15
14,15 M_DQS#6 AC21 M_DQS_L6 M_DATA39 T22 M_DQ39 14,15
14,15 M_DQS7 AB16 M_DQS_H7
14,15 M_DQS#7 AC16 M_DQS_L7 M_DATA40 V20 M_DQ40 14,15
M_DATA41 V21 M_DQ41 14,15
14 M_DIM0_CLK_DDR0 M17 M_CLK_H0 M_DATA42 Y23 M_DQ42 14,15
14 M_DIM0_CLK_DDR#0 M16 M_CLK_L0 M_DATA43 Y22 M_DQ43 14,15
14 M_DIM0_CLK_DDR1 M19 M_CLK_H1 M_DATA44 T21 M_DQ44 14,15
14 M_DIM0_CLK_DDR#1 M18 M_CLK_L1 M_DATA45 U23 M_DQ45 14,15
15 M_DIM0_CLK_DDR2 N18 M_CLK_H2 M_DATA46 W23 M_DQ46 14,15
15 M_DIM0_CLK_DDR#2 N19 M_CLK_L2 M_DATA47 Y21 M_DQ47 14,15
15 M_DIM0_CLK_DDR3 L18 M_CLK_H3
15 M_DIM0_CLK_DDR#3 L17 M_CLK_L3 M_DATA48 Y20 M_DQ48 14,15
M_DATA49 AB22 M_DQ49 14,15
14,15 M_RST# L23 M_RESET# M_DATA50 AC19 M_DQ50 14,15
M_EVENT# N17 AA18
M_EVENT# M_DATA51 M_DQ51 14,15
M_DATA52 AA23 M_DQ52 14,15
M_DATA53 AA20 M_DQ53 14,15
14,15 M_DIM0_CKE0 F15 M_CKE0 M_DATA54 AB19 M_DQ54 14,15
14,15 M_DIM0_CKE1 E15 M_CKE1 M_DATA55 Y18 M_DQ55 14,15
M_DATA56 AC17 M_DQ56 14,15
M_DATA57 Y16 M_DQ57 14,15
14 M_A_DIM0_ODT0 W19 M0_ODT0 M_DATA58 AB14 M_DQ58 14,15
14 M_A_DIM0_ODT1 V15 M0_ODT1 M_DATA59 AC14 M_DQ59 14,15
15 M_B_DIM0_ODT0 U19 M1_ODT0 M_DATA60 AC18 M_DQ60 14,15
15 M_B_DIM0_ODT1 W15 M1_ODT1 M_DATA61 AB18 M_DQ61 14,15
M_DATA62 AB15 M_DQ62 14,15
B B
14 M_A_DIM0_CS#0 T17 M0_CS#0 M_DATA63 AC15 M_DQ63 14,15
14 M_A_DIM0_CS#1 W16 M0_CS#1
15 M_B_DIM0_CS#0 U17 M1_CS#0
V16 M23 M_VREF_APU
15 M_B_DIM0_CS#1 M1_CS#1 M_VREF
U18 R502 1D5V_S3
14,15 M_RAS# M_RAS#
V19 39R2F-GP
14,15 M_CAS# M_CAS#
V17 M22 M_ZVDDIO_M ◦ Jabse Service Manual Search 2024 ◦ Jabse Pravopis ◦ onTap.bg ◦ Other service manual resources online : Fixya ◦ eServiceinfo