Service Manuals, User Guides, Schematic Diagrams or docs for : Dell Dell D810 - Compal LA-2112 Laguna
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5 4 3 2 1
D D
LAGUNA
REV : X03
@ : Depop Component
C C
PRELIMINARY
B
LA-2112 (8 Layer M/B for LAGUNA) B
Dothan Schematic with Capture CIS and Function field
uFCPGA Dothan
10-07-2004
A REV: 0.4 A
DELL CONFIDENTIAL/PROPRIETARY
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DO CUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL . IN ADDITION,
Size
Cover Sheet
D ocument Number R ev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSE D TO ANY THIRD
Board Number LA2112 0.4
PARTY WITHOUT DELL'S EXPRESS WRITTEN C ONSENT.
D ate: Thursday, October 28, 2004 Sheet 1 of 82
5 4 3 2 1
5 4 3 2 1
Compal confidential
Block Diagram
D GUARDIAN Dothan D
EMC6N300 page 39
uFCPGA CPU
page 7,8,9
Fan Control
page 15
HA#(3..31) HD#(0..63)
System Bus Memory
CRT CONN. 400 / 533MHz
BUS(DDR2)
& TV-OUT
VGA page 19
Alviso SO-DIMM X2
1.8V 400 / 533MHz
BANK 0, 1, 2, 3page16,17
Board GMCH-M
PCI-E 16X Clock Generator
page
1257 FC-BGA 10,11,12 CK410M
VGA CONN. 13,14
C page 6 C
page 18
DMI
DOCKING DOCKING MINI PCI 1.5V DC IN page
100MHz 44
PORT BUFFER
PAGE 35 PAGE 34 page 33
BATT page
USB 3.3V 24.576MHz
PCI BUS AC-LINK IN 45
ICH6 MDC
page 28
609 BGA SATA Marvell 1.8V / 0.9V page
IDSEL:AD20 3.3V 33MHz PCI-E BUS AC97 44
(PIRQA/B#,GNT#2,REQ#2) LAN SATA to PATA
BCM5751M page ATA100 and SATA Codec
B
CardBus Controller 20,21,22,23 page 52
STAC9751 1.5V/1.05V(+VCCP) B
PCI6515 page 29
PATA page 25 page 47
CDROM
page 31,32
Analog Switch USB HDD VCORE
page 30 FDD AMP& Phone
page 52 page 49
Smart card Slot 0 LPC BUS SATA HDD Jack
USB page 26
3.3V 33MHz
page32 page 24
Transformer 5V/3.3V/15V
page 30
page31 USBPORT 0 page 46
FDD
Macallen III USBPORT 1
DOCK
RJ45 LPC to X-BUS USB2.0 CHARGER page
page 30 & Super I/O USBPORT 2
48MHz / 480Mb BT 50,51
X BUS page USBPORT 3
36,37 Card BUS
USBPORT 4
JUSB2 U
COM Int.KBD USBPORT 5
A
SST39VF080 page 28 page 38
page 27
JUSB2 D A
USBPORT 6
page 38
JUSB1 U
Touch Pad FIR (LED/B) 40
page USBPORT 7
page 38 JUSB1 D DELL CONFIDENTIAL/PROPRIETARY
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DO CUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL . IN ADDITION, Size
Block Diagram
D ocument Number R ev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSE D TO ANY THIRD Board Number LA2112 0.4
PARTY WITHOUT DELL'S EXPRESS WRITTEN C ONSENT.
D ate: Thursday, October 28, 2004 Sheet 2 of 82
5 4 3 2 1
5 4 3 2 1
D D
PM TABLE
C +5VRUN USB TABLE C
+3VRUN +0.9V_DDR_VTT PCI TABLE
power +3VALW +3VSUS +2.5VRUN
plane
USB PORT# DESTINATION
+5VALW +5VSUS +1.8VRUN
PCI DEVICE IDSEL REQ#/GNT# PIRQ
+RTC_CELL +1.8VSUS +1.5VRUN
+3.3VX +1.5VSUS +VCC_CORE 0 FDD (module bay)
State
+15V +VCCP
CARD BUS AD17 1 D,C 1 DOCK
2 MPCI (BlueTooth)
S0 ON ON ON
DOCK AD24 0 A 3 NEW Connector
S1 ON ON ON
MINI PCI AD19 3 D,B 4 USB Port 2(Top)
S3 ON ON OFF 5 USB Port 2(Bottom)
6 USB Port 1(Top)
S5 S4/AC ON OFF OFF
7 USB Port 1(Bottom)
B B
S5 S4/AC don't exist OFF OFF OFF
A A
DELL CONFIDENTIAL/PROPRIETARY
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DO CUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL . IN ADDITION, Size
Index and Config.
D ocument Number R ev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSE D TO ANY THIRD Board Number LA2112 0.4
PARTY WITHOUT DELL'S EXPRESS WRITTEN C ONSENT.
D ate: Thursday, October 28, 2004 Sheet 3 of 82
5 4 3 2 1
5 4 3 2 1
+5VALW
D D
ADAPTER
PWR_SRC +3VALW
BATTERY G_PWR_SRC
C C
SUSPWROK_5V
SUSPWROK_5V
RUNPWROK
RUNPWROK
SUS_ON
SUS_ON
+5RUN
+5VSUS +3VSRC +VCC_CORE +1.5VSUS +VCCP +1.8VSUSP +0.9V_DDR_VTT
AUDIO_AVDD_ON
SUSPWROK_5V
PJP11,PJP12
RUN_ON
B B
RUN_ON
(Option)
RUN_ON RUN_ON
PL9
+5VHDD +5VMOD +5VRUN +15V VDDA +3VRUN V3P3LAN +3VSUS +2.5VRUN +1.5VRUN +1.8VSUS
RUN_ON
L10
+1.8VRUN
A A
DELL CONFIDENTIAL/PROPRIETARY
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DO CUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL . IN ADDITION, Size D ocument Number
Power Rail R ev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSE D TO ANY THIRD Board Number LA2112 0.4
PARTY WITHOUT DELL'S EXPRESS WRITTEN C ONSENT.
D ate: Thursday, October 28, 2004 Sheet 4 of 82
5 4 3 2 1
5 4 3 2 1
+3VRUN
ICH_SMBCLK CK_SCLK
7002
D
+3VSUS CLK GEN. D
ICH6 ICH_SMBDATA CK_SDATA
7002
DIMM0 DIMM1 LAN_SMBCLK
7002 7002
Address 00 Address 10 LOM
LAN_SMBDATA
7002 7002
CLK_SMB V_3P3_LAN
DAT_SMB +3VALW GUARDIAN
C C
24C04
DOCK_SMB_CLK
SIO DOCK_SMB_DAT +5VALW DOCKING
Macallen III
SBAT_SMBCLK
SBAT_SMBDAT +5VALW 2'nd
BATTERY
B B
VGA
PBAT_SMBCLK
1'st
PBAT_SMBDAT +5VALW BATTERY
A A
CHARGER
DELL CONFIDENTIAL/PROPRIETARY
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DO CUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL . IN ADDITION, Size
SMBUS TOPOLOGY
D ocument Number R ev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSE D TO ANY THIRD Board Number LA2112 0.4
PARTY WITHOUT DELL'S EXPRESS WRITTEN C ONSENT.
D ate: Thursday, October 28, 2004 Sheet 5 of 82
5 4 3 2 1
5 4 3 2 1
+3VR UN CK_VDD _MAIN
+3VRUN
0.1 U_0402_16V4Z~D
1 2 CK_VDD _MAIN
100K_0402_5%~D
100K_0402_5%~D
L33 2 1 1 1 1 CL K_MCH_BCLK 2 R 92 1
1
1
1 BLM21PG600SN1D_0805~D C 89 49.9_0402_1%~D
C94 C91 C87 C85 CL K_MCH_BCLK# 2 R 86 1
R57
R61
C992
4.7U_0805_6.3V6K~D 0.047U_0402_10V7K~D 0.047U_0402_10V7K~D 0.047U_0402_10V7K~D 0.047U_0402_10V7K~D 49.9_0402_1%~D
1 2 2 2 2 CK_BCLK 2 R 84 1
2 CK_VD D_MAIN2 49.9_0402_1%~D
2
2
CK_BCLK# 2 R 80 1
ICH_ SMBDATA 1 3 C K_SDATA 1 2 49.9_0402_1%~D
D
S
<22,33> ICH_SMBDATA C K_SDATA <16,17>
Q6 L130 2 1 1 C K_ITP 2 R1257 1
2N7002_SOT23~D BLM21PG600SN1D_0805~D C 993 49.9_0402_1%~D
C 994 C 995 Place near each pin CK_ITP# 2 R1258 1
G
2
4.7U_0805_6.3V6K~D 0.047U_0402_10V7K~D 0.047U_0402_10V7K~D 49.9_0402_1%~D
D
+3VRUN
1 2 2 W>40 mil C LK_PCIE_SATA 1 R 146 2
49.9_0402_1%~D
D
C LK_PCIE_SATA# 1 R 140 2
2
49.9_0402_1%~D
G
Q8 Place near CK410 CLK _PCIE_VGA 1 R 153 2
ICH_SMBCLK 1 3 2N7002_SOT23~D CK_SCLK 49.9_0402_1%~D
<22,33> ICH_ SMBCLK C K_SCLK <16,17>
CLK _PCIE_VGA# 1 R 154 2
D
S
R1106 49.9_0402_1%~D
2.2_0603_5%~D CLK_P CIE_ICH 1 R 156 2
0.047U_0402_10V7K~D
1 2 CK_ VDD_A 49.9_0402_1%~D
D CK_ VDD_A CK _VDD_48 CK_ VDD_REF CLK_ PCIE_ICH# R 159 2
1
0.047U_0402_10V7K~D
49.9_0402_1%~D
1 1 1 1 1 1
0.047U_0402_10V7K~D
4.7U_0805_6.3V6K~D
4.7U_0805_6.3V6K~D
U8 CL K_MCH_3GPLL 1 R 114 2
49.9_0402_1%~D
G 2 3 S
C1247
C1248
C1249
21 CL K_MCH_3GPLL# 1 R 115 2
2 2 2 2 2 28 VDD_SRC0 37 49.9_0402_1%~D
VDD_SRC1 VDD_A
C1251
C1252
34 C LK_PCIE_LOM 1 R 10382
2N 7002 VDD_SRC2
VSS_A
38 49.9_0402_1%~D
1 C LK_PCIE_LOM# 1 R 10392
VDD_PCI0 49.9_0402_1%~D
7
VDD_PCI1 H _STP_PCI#
55 H_STP_PCI# <22>
PCI_STOP#
P l a c e c r y s t al within 54 H _STP_CPU#
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