Service Manuals, User Guides, Schematic Diagrams or docs for : ECS 558-1-4-01_r21
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5 4 3 2 1
558 Rev: 2.0 15-F55-012000
Digitally signed by
fdsf
AC/BATT
CONNECTOR 30
DC/DC
CPU VR CLOCK
DN: cn=fdsf,
D Dothan/Yonah +1.2V/+2.5V
D
RUN POWER
SW
+1.05V/+1.5V Gen. o=fsdfsd, ou=ffsdf,
email=fdfsd@fsdff,
+1.8V/+0.9V
-- (478 Micro-FCPGA) +3V/+5V 19,31,34 32,35 3
BATT 4,5
35
c=US
CHARGER
Date: 2010.01.06
30
LCD Connector
4X133MHZ
12 06:13:32 +07'00'
LVDS
+1.5V
266/333 MHZ DDR Alviso
DDR-SODIMM1
1257 PCBGA
10,11 VCC_DIMM
TVOUT S-Video
13
266/333 MHZ DDR +2.5V
DDR-SODIMM2 VGA CRT
6,7,8,9
10,11 13
C DMI interface
USB2.0 C
2 Ports 20
33MHz PCI REALTEK RJ45/Magnetics
+1.5V +1.05V
8100CL
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+2.5V
HDD/CD-ROM ICH6-M CARDBUS/1394 27 28
IDE VCC3 PCMCIA MINI-PCI
18 +3VSUS 609 BGA ENECB851 CON. Wireless LAN
+1.5VSUS 21,22 22 29
AC'97
15,16,17
AUDIO MDC
3.3V LPC, 33MHz
23,24 26
VCC3 +3valways/+3vaux VCC5
Winbond FAN 1
ENE 3910 14
B W83517D
(MicroP) B
25 14
VCC5 VCC5 VCC5 VCC5 3V_591
LPT FIR Touchpad Keyboard FLASH
26 25
14 14 14
Page 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20
Rev. 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0
2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/
Data
03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21
A A
Page 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37
Rev. 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 Elitegroup Computer Systems
Title
2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ 2005/ BLOCK DIAGRAM
Data Size Document Number Rev
03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 03/21 C
558-1-4-01 2.0
Date: Thursday, March 24, 2005 Sheet 1 of 37
5 4 3 2 1
Voltage Rails ON S0~S1 ON S3 ON S4 ON S5 Control signal
12VOUT X X X X
3V_591 X X X X
D 5VPCU X X X X D
+3V_S5 X X X X S5_ON
+1.5V_S5 X X X X S5_ON
+1.8VSUS X X SUSON
+3VSUS X X SUSON
+5VSUS X X SUSON
+0.9VSUS DDR Termination voltage X X SUSON
CPU_CORE Core voltage for Processor X VR_ON
+0.9V X MAINON
+VCCP 1.05V rail for Processor I/O X MAINON
+1.5V X MAINON
+1.8V X MAINON
+2.5V X MAINON
+3V X MAINON
+5V X MAINON
+12V X MAINON
C C
External PCI Devices
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Device IDSEL# REQ#/GNT# Interrupts
CardBus+1394 AD17 1 PIRQD/C
Mini-PCI AD19 2 PIRQB/D
10/100M LAN AD23 3 PIRQB
EC SM Bus1 address
Device
Smart Battery
THERMAL SENSOR
B B
ICH6-M SM Bus address
Device
SODIMM 1010 000X b
Clock Gen 1101 001x b
A A
Elitegroup Computer Systems
Title
SYSTEM INFO
Size Document Number Rev
B 558-1-4-01 2.0
Date: Thursday, March 24, 2005 Sheet 2 of 37
5 4 3 2 1
5 4 3 2 1
The region below of Clock
Gen. need to place ground
plane
VCC3
FCM2012V-121RC10-0805
SR204
Place these termination
L48 0.47uF/6.3V_04020.47uF/6.3V_0402 SC292
D
1 2 VDD_CKG_CPU 1 2 VDDA_CKG 10uf/10v_0805_X5R to close CK410M. D
SC232 2.2
2
2
2
2
2
2
2
SC309 C429 33pf/50v_0402 SR168 1 2 49.9_1%_0402
C430 SC298 C428 2 1 CG_XIN SC293 0.47uF/6.3V_0402 SR171 1 2 49.9_1%_0402
10uf/10v_0805_X5R 0.47uF/6.3V_0402 0.47uF/6.3V_0402 SY2
1
1
1
1
1
1
1
SR182 1 2 49.9_1%_0402
4 3 SR192 1 2 49.9_1%_0402 1-1 : 33 ohm
NC1 #3
1 #1 NC 2 1-2 : 15 ohm
1-3 : <10 ohm
The Crystal must be 20PF => SU15
37
38
14.318MHz/20p_SMD_4P SR161
Close to IC chip SC231 50 52 14M_REF 33_0402 1 2
VDDA
VSSA
33pf/50v_0402 XTAL_IN REF 14M_ICH 16
2 1 CG_XOUT 49 44 R_HCLK_CPU SR167 1 2 33_0402
XTAL_OUT CPU0 HCLK_CPU 4
43 R_HCLK_CPU- SR170 1 2 33_0402
CPU0# HCLK_CPU- 4
CLK_EN- 10 41 R_HCLK_MCH SR181 1 2 33_0402
CLK_EN- use to invert VCCP ok 55
VTT_PWRGD#/PD CPU1
40 R_HCLK_MCH- SR191 1 2 33_0402
HCLK_MCH 6
16 STP_PCI- PCI/SRC_STOP# CPU1# HCLK_MCH- 6
16,32 STP_CPU- 54 CPU_STOP#
2
2
10PF_0402_R 36 The region below of Clock Gen. need to place ground plane
10PF_0402_R CPU2_ITP/SRC7
Must be the same length CPU2#_ITP/SRC7# 35
C419 C404 SMbus address D2 CGCLK_SMB 46
at two targets(48MHz) => SCLK
1
1
CGDAT_SMB 47 CK-410M 33
22_0402 SDATA SRC6
SRC6# 32
R361 1 2 ICS954201/ICS954206
16 CLK48_USB R345 1 22_0402 FSA
2 12 FSA/USB_48 SRC5 31
25 SIO48M CFG1_FSB FSB
5,7 CFG1_FSB 2 1 16 FSB/TEST_MODE/IREF1 SRC5# 30 12/07 PCI_LAN OFF
CFG2_FSC R362 2 1 0_0402 FSC_H 53
R340 1_1% 7 CFG2_FSC SR157 2.2K_0402 FSC/REF1/TEST_SEL
12/14 SRC4 26
1 2 VDD_CKGREF 48 27
VDD_REF SRC4#
1 VDD_PCI_1 SRC3 24
VCC3 1 2 CLKVDD 7 25
L47 VDD_PCI_2 SRC3#
2
2
2
2
2
FCM2012V-121RC10-0805 VDD_CKG_CPU 42 22 R_CLK_PCIE_ICH SR221 1 2 33_0402
VDD_CPU SRC2 CLK_PCIE_ICH 16
SR185 SC229 SC266 C405 21 23 R_CLK_PCIE_ICH- SR219 1 2 33_0402 PCLK_MINI CHANGE WITH
VDD_SRC0 SRC2# CLK_PCIE_ICH- 16
2.2 10uf/10v_0805_X5R C401 28 VDD_SRC1 PCLK_CB851 FROM U1
1
1
1
1
0.47uF/6.3V_0402 0.47uF/6.3V_0402 34 19 R_MCH_3GPLL SR205 1 2 33_0402
VDD_SRC2 SRC1 CLK_MCH_3GPLL 7
0.47uF/6.3V_0402 20 R_MCH_3GPLL- SR206 1 2 33_0402 PIN3, 4
SRC1# CLK_MCH_3GPLL- 7
1
C VDD_CKG_48 11 C
SR196 475_1%_0402 VDD_48 R_DREFSSCLK SR195 1 33_0402
96M_SS/SRC0 17 2 DREFSSCLK 7
2
2
1 2 IREF 39 18 R_DREFSSCLK- SR202 1 2 33_0402
SC268 Iref=5mA, IREF 96M_SS#/SRC0# R_PCLK_SIO SR163 1 2 33_0402
DREFSSCLK- 7
PCLK_SIO 25
10uf/10v_0805_X5R SC272 5 R_PCLK_MINI SR160 1 2 33_0402
Ioh=4*Iref PCI5 PCLK_MINI 29
1
1
0.47uF/6.3V_0402 4 R_PCLK_CB851 SR158 1 2 33_0402
PCI4 SR319 1 10_0402 PCLK_CB851 21
3 2
GND_PCI_1
GND_PCI_2
SR180 33_0402 R_DOT96 PCI3 R_PCLK_1394 SR152 1 10_0402 PCLK_LAN 27
GND_SRC
GND_CPU
1 2 14 56 2
GND_REF
7 DOT96 DOT96 PCI2 PCLK_1394 21
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SR190 33_0402 R_DOT96- R_PCLK_591 R343 1 33_0402
GND_48
7 DOT96- 2 1 15 DOT96# 96#100SEL/PCIF1 9 2 PCLK_3910 14
8 R_PCLK_ICH R323 1 2 33_0402
PCIF0/ITP_EN PCLK_ICH 15
9/22
2
2
2
2
2
2
2
12/13
10PF_0402_R 10PF_0402_R 10PF_0402_R 12/13
13
51
2
6
29
45
ICS954206AG C392 C414 SC227 SC248 SC251 SC259 SC418
300mA ( MAX.)
1
1
1
1
1
1
1
R325
2 1 CLK_EN- 10PF_0402_R 10PF_0402_R
VCC3
10PF_0402_R 10PF_0402_R DOT96 SR179 1 2 49.9_1%_0402
10K_0402 DOT96- SR189 1 2 49.9_1%_0402
PULL HIGH PULL LOW
D
DREFSSCLK SR194 1 2 49.9_1%_0402
Q28 TO SET TO SET DREFSSCLK- SR201 1 2 49.9_1%_0402
G 2N7002 If power-up w/ V>2.0V PIN35,36 PIN17,18
32 CLK_EN VCC3
will enter to test TO HOST TO 96M_SS
S
mode CLK_MCH_3GPLL SR223 1 2 49.9_1%_0402
VCCP VCCP VCCP CLK CLK CLK_MCH_3GPLL- SR224 1 2 49.9_1%_0402
FSC , FSB
2
2
R326
2
2
2
R329
SR153 R371 R357 10K_0402 10K_0402_R
4.7K_0402 4.7K_0402_R 10K_0402 CLK_PCIE_ICH SR222 1 2 49.9_1%_0402
DOTHAN-B CLK_PCIE_ICH- SR226 1 2 49.9_1%_0402
1
1
SR153, R371
1
1
1
VCC3 FSC_H FSB FSA R_PCLK_ICH R_PCLK_591
POP, R488, 12/13
R368 DEPOP
2
2
2
R328 R341
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