Service Manuals, User Guides, Schematic Diagrams or docs for : Gigabyte GIGABYTE GIGABYTE 8I865PE775-G-RH - REV 2.02
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5 4 3 2 1
GIGABYTE GA-8I865PE775-G-RH Revision 2.02
Schematics
SHEET TITLE SHEET TITLE
D D
01 COVER SHEET 24 CODEC ALC653
02 BOM & PCB MODIFY HISTORY 25 AUDIO JACK, L_OUT, F_AUDIO
03 BLOCK DIAGRAM 26 ITE 8712-KX
04 LGA775 A 27 COM_LPT
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05 LGA775 C,D 28 IDE
06 LGA775 B 29 FAN/HWMO
C
07 LGA775 E,F,G,H 30 KB_PS2 C
08 SPRINGDALE HOST 31 FPANEL
09 SPRINGDALE DDR 32 USB CONN
10 SPRINGDALE AGP, HUB, CSA, VGA 33 DDR POWER
11 SPRINGDALE PWR 34 VCORE POWER
12 DDR1,2 CHANNEL A 35 ATX, OTHERS POWER
13 DDR3,4 CHANNEL B 36 MARVELL 88E8001
14 DDR TERMINATION 37 PCI ROUNTING
B B
15 AGP 8X SLOT 38 GPIO PIN LIST
16 ICH5 PCI, USB, HUB, LAN
17 ICH5 IDE, GPIO, SATA, CTRL
18 ICH5 VCC, GND
19 FWH
Digitally signed by dd
20 ICS952635 CLOCK GEN DN: cn=dd, o=dd, ou=dd, COMPONENT SIDE
(1 oz. Copper)
A
21 PCI1_2 [email protected], VCC SIDE
(1 oz. Copper)
GND SIDE
A
c=US
(1 oz. Copper)
22 PCI3_4 SOLDER SIDE
(1 oz. Copper)
23 PCI5 Date: 2009.11.05 19:45:49 GIGABYTE CORP.
+07'00'
Title
COVER SHEET
Size Document Number Rev
Custom GA-8I865PE775-G-RH 2.02
Date: Sheet 1 of 39
5 4 3 2 1
5 4 3 2 1
Model Name: GA-8I865PE775-G-RH
Version : 2.02
BOM Version : 9M865PETGR-00-20B Circuit or PCB layout history
D
Component history Date Change Item Reason D
Date Change Item Reason 0.1-0917 8I848P-G REV2.01 --> 8I848P775-G REV0.1
1. CPU SOCKET478 --> LGA775
Rev2.02 2.W833301 REMOVE , CHANGE OTHER POWER
2.02-95/6/19 8I865G775-G-RH Rev2.02 --> 865PE775-G-RH 2.02 3. ICS952603 --> ICS952635BF
1.0-0216 1. BAT 1K CHANGE TO RB (FOOTPRINT)
2.02-95/7/7 Add BC58,BC65 1uf cap
2. M/B ID GPIO
2.02-95/7/7 BOM 20A-->20B 3. FSC R1321 REMOVE TO CLK-GEN (CHECK OTHER PIN)
4. EMI REQUEST ADD CR30~33
1.01 1. BAT SOCKET CHANGE (BATTERY-DUAL-2)
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2.0-95/2/22 1. VCC POWER PLANE ;AGP SLOT VCC PLANE
2. FUSEVCC,FUSEVCC1,5VDUAL POWER PLANE( VCCpower
plane VIA)
3. DDR25V-->VDDQ PLANE
4. PCN2 LPT17,LPT5 ;PCN3 AGND VIA
C 5. ITE IO GP40-->GP53 C
2.01-95/3/23 PCB 2.0-->2.01
2.02-95/4/25 PCB 2.01-->2.02 ,for VGA,ESD PAD
for USB,VGA,KB_MS
2.02-95/6/19 865PE775-G-RH 2.02--> remove VGA and add COMB
B B
A A
GIGABYTE CORP.
Title
BOM & PCB MODIFY HISTORY
Size Document Number Rev
Custom GA-8I865PE775-G-RH 2.02
Date: Sheet 2 of 39
5 4 3 2 1
5 4 3 2 1
BLOCK DIAGRAM
INTEL Pentium4
LGA775
D
CLOCK GENERATOR D
VID0~5
PWM/OTHER POWER
VCORE = 1.75V / SLEEP : 1.3V
VCORE = 1.55V
VCC3 PAGE 4, 5, 6, 7 VCORE = 1.35V
CKVDD = 3.3V PAGE 20 5VSB,-12V,+12V,VCC,VCC3,3VDUAL
VTT_DDR,2_5VSTR
PAGE 33,34,35
GDBI_LO, GDBI_HI
GMCH SPRINGDALE CHANNEL A
GAD0~31 DCLKA0~5
ADSTB0,ADSTB0- -DCLKA0~5 DDR SDRAM DIMM X 2
865G/865PE
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ADSTB1,ADSTB1- MAAA0~12 DDR25V = 2.6V(MEMORY,SUSPEND POWER)
VTT_DDR = 1.3V
SBA0~7 MABA1~5 PAGE 9,12
AGP SLOT 8X SBSTB,SBSTB- MDA0~63
-DQSA0~7
VDDQ = 1.5V (AGP POWER 4X) GCBE0~3-
DMA0~7
VCC3 = 3.3V
+12V = 12V
3VDUAL = 3.3V
ST0~2 AGP BUS CHANNEL B
PAGE 15
VCC = 5V VCORE = 1.75V / SLEEP : 1.3V
2_5VSTR = 2.5V(MEMORY)
VDDQ = 1.5V (AGP POWER 4X, HUBLINK) PAGE 8 ,9 ,10 ,11
DCLKB0~5 DDR SDRAM DIMM X 2
-DCLKB0~5
C DDR25V = 2.6V(MEMORY,SUSPEND POWER) C
MAAB0~12 VTT_DDR = 1.3V
MABB1~5
PAGE 9,13
MDB0~63
HL0~10
HUB LINK -DQSB0~7
CONTROL BUS
DMB0~7
USB CONN
ICH5
PAGE 32
USB PORTS 0~7 IDE Primary and
Secondary
VCC25 = 2.5V(I/O,MEMORY/I,VLINK/I)
VCC = 5V 3VDUAL = 3.3V(SUSPEND POWER)
5VSB = 5V VCC3 = 3.3V VCC = 5V PAGE 28
5VUSB = 5V PAGE 32,36 RTCVDD = 3.3V
PAGE 16,17,18
SERIAL ATA
PCI BUS
B
AC97 CODEC ALC653 B
VCC = 5V PAGE 17
+12V = 12V
VCC3 = 3.3V
PCI SLOT 1,2,3,4,5
VCC = 5V
AVDD = 5V PAGE 24 AC97 LINK
+12 = 12V
FWH
-12 = -12V
VCC = 5V
VCC3 = 3V
3VDUAL = 3V PAGE 21,22,23
VCC = 5V
VCC3 = 3V PAGE 19
AUDIO PORTS : FRONT AUDIO
LPC BUS
LIN_ OUT LINE_IN MIC FRONT PANEL
CD_IN AUX_IN LPC I/O ITE8712
PVCC = 5V
PAGE 25
PAGE 25 VCC = 5V
5VSB = 5V
+12 = 12V
P_5VSB = 5V PAGE 31 VCC = 5V
5VSB = 5V
VBAT = 3V PAGE 26
LAN MARVELL 88E8001
A
PAGE 36 FANS / HWMO I/O PORTS : A
VCC = 5V
5VSB = 5V
COMA COMB LPT PS2 FDD
+12 = 12V
PAGE 29 PAGE 27,28
GIGABYTE CORP.
Title
BOM & PCB MODIFY HISTORY
Size Document Number Rev
Custom GA-8I865PE775-G-RH 2.02
Date: Sheet 3 of 39
5 4 3 2 1
5 4 3 2 1
I1 I2 I3 I4
4MMH/X 4MMH/X 4MMH/X 4MMH/X
1
1
1
1
D D
K1 K2 K3
K1_ICT/X K1_ICT/X K1_ICT/X
1
1
1
K4 K5 K6
U46A
HA[3..16]
8 HA[3..16]
HA3 L5 D2 -HADS
A03# ADS# -HADS 8
HA4 P6 C2 -BNR
A04# BNR# -BNR 8
HA5 M5 D4 -HIT K1_ICT/X K1_ICT/X K1_ICT/X
A05# HIT# -HIT 8
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HA6 L4 H4
HA7 A06# RSP# -BPRI
1
1
1
M4 A07# BPRI# G8 -BPRI 8
HA8 R4 B2 -DBSY
A08# DBSY# -DBSY 8
HA9 T5 C1 -DRDY
A09# DRDY# -DRDY 8
HA10 U6 E4 -HITM
A10# HITM# -HITM 8
HA11 -IERR
HA12
T4
U5
A11# IERR# AB2
P3 -HINIT
*
A12# INIT# -HINIT 17,19
HA13 U4 C3 -HLOCK
A13# LOCK# -HLOCK 8
HA14 V5 E3 -HTRDY C463
A14# TRDY# -HTRDY 8
HA15 V4 AD3 33p/4/NPO/50V/J
HA16 A15# BINIT# -DEFER
W5 A16# DEFER# G7 -DEFER 8
C N4 F2 -EDRDY C
RSVD EDRDY# -EDRDY
P5 RSVD MCERR# AB3
-HREQ0 K4
8 -HREQ0 REQ0#
-HREQ1 J5 U2
8 -HREQ1 REQ1# AP0#
-HREQ2 M6 U3
8 -HREQ2 REQ2# AP1#
-HREQ3 K6
8 -HREQ3 REQ3#
-HREQ4 J6 F3 -BR0
8 -HREQ4 REQ4# BR0# -BR0 8
-HADSTB0 R6 G3 TESTHI8
8 -HADSTB0 ADSTB0# TESTHI08 TESTHI8 5
-HPCREQ G5 G4 TESTHI9
-HPCREQ PCREQ# TESTHI09 TESTHI9 5
HA[17..31] H5 TESTHI10
8 HA[17..31] TESTHI10 TESTHI10 5
HA17 AB6
HA18 A17#
W6 A18# DP0# J16
HA19 Y6 H15
HA20 A19# DP1#
Y4 A20# DP2# H16
HA21 AA4 J17 2005/11/18:REV1.1
HA22 A21# DP3# GTLREF1 C913 0.1u/4/Y5V/16V/Z
AD6 A22# GTLREF1 H2
HA23 AA5 H1 GTLREF C464 0.1u/4/Y5V/16V/Z
HA24 A23# GTLREF0
AB5 A24#
HA25 AC5 G23 -CPURST VTT_OL R1261 62/4 -IERR
A25# RESET# -CPURST 8
HA26 AB4
HA27 A26# -RS0
AF5 A27# RS0# B3 -RS0 8
HA28 AF4 F5 -RS1 C465 R1262 62/4 -BR0
A28# RS1# -RS1 8 VTT_OL
HA29 AG6 A3 -RS2 22p/4/NPO/50V/J/X
A29# RS2# -RS2 8
HA30 AG4
HA31 A30# R1263 62/4 -CPURST
AG5 A31# VTT_OL
AH4 A32#
AH5 A33#
AJ5 R1294 62/4 -EDRDY
A34# VTT_OL
AJ6 A35#
AC4 RSVD
AE4 R1306 62/4 -HPCREQ
B RSVD VTT_OL B
SP-CAP X 8 -HADSTB1
-HADSTB1 AD5 ADSTB1#
4PCS
VCORE CPU-SK/775/D/GF/[11SC1-920775-02R_11SC1-920775-03R]
CR
+
+
SEC1 SEC2 CPU RETAINTION/X
100U/2V/SPCAP/X
REV 1.1-->support Cedar Mill CPU
100U/2V/SPCAP/X Closed to Pin-H2
R1488 49.9/4/1 R1489 30/4 GTLREF1
VTT_OR
VCORE
R1490 C912
100/4/1 1u/6/Y5V/10V/Z
+
+
EC2 EC130
100U/2V/SPCAP/X 100U/2V/SPCAP/X
Closed to
Pin-H1
R1259 49.9/4/1 R1491 30/4 GTLREF
A VTT_OR A
VCORE
BC631 R1260 C462
0.01u/4/X7R/16V/K 100/4/1 1u/6/Y5V/10V/Z
BC6 BC4 BC8 BC9
10u/12/X7R/6.3V/K/X 10u/12/X7R/6.3V/K 10u/12/X7R/6.3V/K 10u/12/X7R/6.3V/K/X
GIGABYTE CORP.
2005/11/18 Title
P4_LGA775-A
Size Document Number Rev
Custom GA-8I865PE775-G-RH
2.02
Date: Friday, July 07, 2006 Sheet 4 of 39
5 4 3 2 1
5 4 3 2 1
2005/11/18:REV1.1--->Support Cedar Mill CPU
R1307 110/4/1 TESTHI0 Place outside of CPU socket
VCC3
Note: R1308 C475 R1266 60.4/4/1 COMP0 R1264 60.4/4/1 COMP4
VTT_OL
VCCA & VCOREPLL 61.9/4/1 0.1u/6/Y5V/25V/Z R1267 60.4/4/1 COMP1 R1265 60.4/4/1 COMP5
R1492 60.4/4/1 COMP2
define doesn't same as R1493 60.4/4/1 COMP3 C466
VTT_GMCH old P4 design kit 0.1u/6/Y5V/25V/Z
L20
VCCA R1323 249/4/1
VCC3
3
10uH/8/320mA/0.91/S/[10LI2-12100A-02R_10LI2-12100A-13R] R1494 60.4/4/1 COMP6
VTT_OR
Q214 R1495 60.4/4/1 COMP7
C467 BC652 R1268 D
D D
1u/6/Y5V/10V/Z 4.7u/8/Y5V/10V/Z 0/6/SHT/X 2N7002/SOT23/25pF/5 C914
G S 0.1u/6/Y5V/25V/Z
VSSA SOT23 TESTHI0
Trace width doesn't 8 GTL_DET
2
1
less than 12 Mil
C468 BC653 RN123
L21 1u/6/Y5V/10V/Z 4.7u/8/Y5V/10V/Z 470/8P4R/X
VCOREPLL 7 8 FSBSEL1
VTT_GMCH
U46C 5 6 FSBSEL0
10uH/8/320mA/0.91/S/[10LI2-12100A-02R_10LI2-12100A-13R] As close as possible to 3 4 FSBSEL2
1 2
CPU socket -SMI P2 F26 TESTHI0
17 -SMI SMI# TESTHI00
-A20M K3 W3 TESTHI1 R1269 62/4 TESTHI2_7
17 -A20M A20M# TESTHI01
-FERR R3 P1 TESTHI11
17 -FERR FERR#/PBE# TESTHI11
INTR K1 W2 TESTHI12
17 INTR LINT0 TESTHI12
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