Service Manuals, User Guides, Schematic Diagrams or docs for : Gigabyte GIGABYTE GIGABYTE 8I915P Duo - REV 2.01
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5 4 3 2 1
Model Name: 8I915P Duo REV2.01
SHEET TITLE SHEET TITLE
D D
01 COVER SHEET 23 PCI SLOT
02 BLOCK DIAGRAM 24 PCI EXPRESS*1 SLOT
03 BOM & PCB MODIFY HISTORY 25 ITE8712HX
04 P4_LGA775_A 26 HWMO/FAN/FWH BIOS
05 P4_LGA775_B 27 KB_MS/GAME
06 P4_LGA775_C 28 COM/LPT/FDD
C
07 P4_LGA775_D 29 (FRONT+REAR)USB/RING/IDE C
08 VCORE POWER 30 AZALIA CODEC ALC880/CMI9880
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09 GMCH-GRANTSDALE_HOST 31 AUDIO JACK
10 GMCH-GARNTSDALE_DDR 32 LAN BCM5705E/5751
11 GMCH-GRANTSDALE_PCI E, DMI 33 LAN BCM5751
12 GMCH-GRANTSDALE_INT VGA 34 ATX POWER CONN.
13 GMCH-GRANTSDALE_GND 35 ALL POWER
14 GMCH-GRANTSDALE_PWR 36 1394 TSB43AB23
B B
15 DDR CHANNEL A 37 FRONT PANEL/BZ
16 DDR CHANNEL B 38 RAID VIA6410
17 DDR TERMINATION 39 RAID IDE CONNECTOR
18 PCI EXPRESS*16 SLOT 40 GPIO TABLE
19 ICH6 PCI, USB, DMI, LAN 41 RESET TABLE
20 ICH6 IDE, GPIO, SATA, CTRL
Digitally signed by fdsf
21 ICH6 VCC, GND DN: cn=fdsf, o=fsdfsd,
A A
22 CLK GEN ou=ffsdf,
email=fdfsd@fsdff,
GIGABYTE
c=US
COMPONENT SIDE
(1 oz. Copper)
VCC SIDE Title
Date: 2009.12.15
(1 oz. Copper)
GND SIDE
Cover Sheet
20:38:05 +07'00'
(1 oz. Copper) Size Document Number Rev
SOLDER SIDE
(1 oz. Copper)
Custom 8I915P Duo 2.01
Date: Thursday, April 28, 2005 Sheet 1 of 39
5 4 3 2 1
5 4 3 2 1
BLOCK DIAGRAM
INTEL Pentium4
LGA775
D
CLOCK GENERATOR D
VID0~4
PWM/OTHER POWER
VCORE = 1.75V / SLEEP : 1.3V PAGE 4, 5, 6,7
VCC3 VCORE = 1.75V (650-1100MHZ) / SLEEP : 1.3V
CKVDD = 3.3V PAGE 22 5VSB,-12V,+12V,VCC,VCC3,3VDUAL
VTT_DDR,2_5VSTR PAGE 8,34,35
CHANNEL A
DDRII DIMM X 1
GMCH DDRI DIMM X 1
GAD0~31 2_5VSTR = 2.5V(MEMORY,SUSPEND POWER)
ADSTB0,ADSTB0- MAA0~14 VTT_DDR = 1.25V PAGE 15,17
ADSTB1,ADSTB1-
GRANTSDALE MAA_CPC1~5
SBA0~7 MAB_CPC1~5
PCI EXPRESS SBSTB,SBSTB- MDD0~63 CHANNEL B
BY 16 PORTS -DQSD0~7 DDRII DIMM X 1
VDDQ = 1.5V (AGP POWER 4X) GCBE0~3- DDRI DIMM X 1
VCC3 = 3.3V DM0~7
+12V = 12V ST0~2
3VDUAL = 3.3V 2_5VSTR = 2.5V(MEMORY,SUSPEND POWER)
VCC = 5V PAGE 18 VCORE = 1.75V / SLEEP : 1.3V VTT_DDR = 1.25V PAGE 16,17
2_5VSTR = 2.5V(MEMORY)
VDDQ = 1.5V (AGP POWER 4X, HUBLINK) PAGE 9,10,11,12,13,14
C C
AGPUSB+ / -
HL0~10
CONTROL BUS
HUB LINK
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IDE Primary
ICH6
VCC = 5V PAGE 29
USB PORTS 0~7 SERIAL ATA
VCC25 = 2.5V(I/O,MEMORY/I,VLINK/I)
VCC = 5V 3VDUAL = 3.3V(SUSPEND POWER)
5VSB = 5V VCC3 = 3.3V
AMRUSB+ / - 5VUSB = 5V PAGE 29 RTCVDD = 3.3V VCC = 5V PAGE 20
PAGE 19,20,21
AZALIA
PCI BUS
LINK
B FWH/HWMO B
PCI SLOT
AC97/Azalia +12 = 12V
PCI EXPRESS SLOT VCC = 5V
VCC3 = 3V PAGE 26
-12 = -12V
ALC880/CMI9880
+12V = 12V
VCC = 5V
VCC3 = 3V
3VDUAL = 3V PAGE 23,24
VCC3 = 3.3V
VCC = 5V
AVDD = 5V PAGE 30
LAN BCM5721/5751 LPC BUS
LPC ITE8712HX
AUDIO PORTS : FRONT AUDIO PAGE 32,33
LIN_ OUT LINE_IN MIC VCC = 5V
5VSB = 5V
VBAT = 3V PAGE 25
TELE CD_IN AUX_IN
PAGE 31 1394 IT TSB43AB23
PAGE 36
A I/O PORTS : A
RAID VIA6410 COMA COMB LPT PS2 IR FDD
PAGE 27,28,29
FRONT PANEL/BZ
VCC = 5V PAGE 38,39 GIGABYTE
5VSB = 5V
+12 = 12V Title
PVCC = 5V PAGE 37 BOM & PCB MODIFY HISTORY
Size Document Number Rev
Custom 8I915P Duo 2.01
Date: Thursday, April 28, 2005 Sheet 2 of 39
5 4 3 2 1
5 4 3 2 1
Model Name: 8I915P Duo Circuit or PCB layout change
Version: 2.01 for next version
PAGE Change Item Reason
D
0.1 EVT D
Component value change 1.0 PCB 8I915PC DUO Rev0.1 --> 8I915PC DUO Rev1.0
2004/11/22
history ALL 0ohm resister remove ,
CHOKE DL2,DL3,DL4 MODIFY FOOTPRINT=CHOKE06U-40A_1PDL
Data Change Item Reason
LU1 MARVELL8001 VDD15_L & AVDD25_L ADD 100U/DIP
0.1 RELEASE
ADD USB PROTECT DIODE
1.0 AUDIO2 CHANGE TO 3RJ+15F/[11NR6-403004-31]
ITE8712 GPIO MODIFY FOR OVER VOLTAGE & TURBO PIN
-RSMRST R1133=22K -->
1K/6 LU1 MARVELL8001
CLK-GEN VCC3 BC88,BC91 0.1U/6/Y25V --> 1U/6/Y/10V
PIN8,PIN9 , ICT SHORT
PROCHOT THERMAL RESISTOR REMOVE TO PWM MOSFET
REMOVE PWROK1 CAP C306=100P & C417=33P
(ICH6)ICT , 1.27mm
PWM DR100 200K --> 178K , DR103 1.8K --> 3.3K , DR82 3.3K --> 3.9K ,
C
DR111,112,113 28K --> 39.2K CPU PIN/H16 , PIN/U3 LAUOUT C
DC32,DC36 CHANGE TO 0.01U/6/X/50V/[10CM1-031002-21_10CM1-031002-27]
TESTPOINT
VCC1_5
ADD DDRVTT POWER CAP
( MCHCLK)
BAT
10A-PVT 1. L1,L2 10LI2-00100A-01/02/03 --> 10LI2-12100A-01/02/03
SOCKET CO-LAYOUT
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AUDIO & LAN AGND,COMP-SOLDER SIDE ,COMP CR32=2.2
2. R563 11K/6/1 --> 20K/6/1
ohm
PIN HEADER CHECK NEME RULE
3. R565 1.91K/6/1 --> 1.5K/6/1
4. U23 10HL6-184148-10 --> 10HL6-184148-20
20A-0304 1. ADD VT6410 IDE RAID FUNCTION
10B-0202 1. ADD PWM COMP DC28=180P/4/N/50V
2. ADD DDR18V_OV3
2. U22 SST
49LF003B(10HL4-132003-34) 3. ADD BAT RB=1Kohm
3. ADD KB_MS
10NR6-802006-2A 4. VCC1_5 ADD BC719=0.1U & GATE R1147 2.2 --> 4.7/6
5. ADD NEW AVL MOSFET
B 20A-0304 1. ADD VT6410 IDE RAID FUNCTION B
20B 1.
MANUAL
2.
DDR18_0V3
3. AUDIO2 : 11NR6-403004-71 915P Duo Rev2.0
20A-0322 1. 8I915PL-G Rev2.0 --> 8I915P Duo Rev2.0
915P Duo Rev2.0
20A-0322 1. 8I915PL-G Rev2.0 --> 8I915P Duo Rev2.0 ADD VT6410 IDE RAID
PVT 1. R1616 5.36K/6/1 --> 6.8K/6/1
2. Q193 MMBT2222A --> 2N7002
20B-0322 1. PCB REv2.0 --> Rev2.01
A
2. Add RN142~RN149 8P4R 33ohm A
GIGABYTE
Title
BOM & PCB MODIFY HISTORY
Size Document Number Rev
Custom 8I915P Duo 2.01
Date: Thursday, April 28, 2005 Sheet 3 of 39
5 4 3 2 1
5 4 3 2 1
D D
U1A
HA[3..16]
(9) HA[3..16]
HA3 L5 D2 -HADS Closed to
A03# ADS# -HADS (9)
HA4 P6 C2 -BNR
A04# BNR# -BNR (9) Pin-H1
HA5 M5 D4 -HIT
A05# HIT# -HIT (9)
HA6 L4 H4 R1
HA7 A06# RSP# -BPRI 49.9/6/1 GTLREF
M4 A07# BPRI# G8 -BPRI (9) VTT_OR
HA8 R4 B2 -DBSY
A08# DBSY# -DBSY (9)
HA9 T5 C1 -DRDY
A09# DRDY# -DRDY (9)
HA10 U6 E4 -HITM BC11 R2 C3
A10# HITM# -HITM (9)
HA11 -IERR 0.01U/6/X/50V 100/6/1 1U/6/Y/10V
HA12
T4
U5
A11# IERR# AB2
P3 -HINIT
*
A12# INIT# -HINIT (20)
HA13 U4 C3 -HLOCK
A13# LOCK# -HLOCK (9)
HA14 V5 E3 -HTRDY C2
A14# TRDY# -HTRDY (9)
HA15 V4 AD3 33P/4/N/50V/X
HA16 A15# BINIT# -DEFER
W5 A16# DEFER# G7 -DEFER (9)
C N4 F2 -EDRDY C
RSVD EDRDY# -EDRDY (9)
P5 RSVD MCERR# AB3
-HREQ0 K4
(9) -HREQ0 REQ0#
-HREQ1 J5 U2
(9) -HREQ1 REQ1# AP0# TP_CPU1
-HREQ2 M6 U3
(9) -HREQ2 REQ2# AP1# TP_CPU2
-HREQ3 K6
(9) -HREQ3 REQ3#
-HREQ4 J6 F3 -BR0
(9) -HREQ4 REQ4# BR0# -BR0 (9)
-HADSTB0 TESTHI8
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(9) -HADSTB0 R6 ADSTB0# TESTHI08 G3 TESTHI8 (5)
-HPCREQ G5 G4 TESTHI9
HA[17..31] (9) -HPCREQ PCREQ# TESTHI09 TESTHI9 (5)
H5 TESTHI10
(9) HA[17..31] TESTHI10 TESTHI10 (5)
HA17 AB6
HA18 A17#
W6 A18# DP0# J16 TP_CPU3
HA19 C1
Y6 A19# DP1# H15 TP_CPU4
HA20 Y4 H16 220P/4/N/25V/X
A20# DP2# TP_CPU5
HA21 AA4 J17
A21# DP3# TP_CPU6
HA22 AD6 R1539 62/6/X -IERR
A22# VTT_OR
HA23 AA5 H1 GTLREF
HA24 A23# GTLREF
AB5 A24#
HA25 AC5 G23 -CPURST R6 62/6 -IERR
A25# RESET# -CPURST (9) VTT_OL
HA26 AB4
HA27 A26# -RS0
AF5 A27# RS0# B3 -RS0 (9)
HA28 AF4 F5 -RS1 C4 R7 62/6 -BR0
A28# RS1# -RS1 (9) VTT_OL
SP-CAP X 4PCS HA29
HA30
AG6
AG4
A29# RS2# A3 -RS2
-RS2 (9)
22P/4/N/50V
HA31 A30# R8 62/6 -CPURST
AG5 A31# VTT_OL
AH4 A32#
VCORE AH5 A33#
AJ5 A34#
AJ6 A35#
AC4 RSVD
AE4
+
+
B SEC1 SEC2 -HADSTB1 AD5 RSVD B
(9) -HADSTB1 ADSTB1#
100U/4V/SPCAP/X
CPU-SK/775/[10SC1-D03775-01_10SC1-D03775-02]
100U/4V/SPCAP/X
VCORE
+
+
+
+
EC1 EC2 EC129 EC130
100U/4V/SPCAP/9m/X 100U/4V/SPCAP/9m/X
100U/4V/SPCAP/X 100U/4V/SPCAP/X CR
CPU RETAINTION/X
VCORE
BC6 BC4 BC8 BC9
10U/12/X/6.3V/X 10U/12/X/6.3V 10U/12/X/6.3V 10U/12/X/6.3V/X
A A
GIGABYTE
Title
P4_LGA775-A
Size Document Number Rev
Custom 8I915P Duo 2.01
Date: Thursday, April 28, 2005 Sheet 4 of 39
5 4 3 2 1
5 4 3 2 1
VCC3
10UH//120mA/8/S/[10LI2-12100A-01_10LI2-12100A-02_10LI2-12100A-03]
Note:
Place outside of CPU socket
VCCA & VCOREPLL R1538 R1593
249/6/1 49.9/6/1/X GTLREF1 R10 100/6/1 COMP2
define doesn't same as VTT_OR VTT_OL
R11 100/6/1 COMP3
3
VTT_GMCH old P4 design kit R23
L1 Q262 R1594 C1290 C5 R14 60.4/6/1 COMP0
VCCA D 110/6/1 100/6/1/X 1U/6/Y/10V/X 0.1U/6/Y/25V R15 60.4/6/1 COMP1
2N7002/S
G S
D C6 BC213 R17 SOT23 R1595 60.4/6/1/X COMP2 D
(7,9) GTL_DET
2
1
1U/6/Y/10V 4.7U/8/Y/10V/X 0/SHT/X TESTHI0 R1596 60.4/6/1/X COMP3
VSSA Trace width doesn't
R1224 C439
less than 12 Mil 61.9/6/1 0.1U/6/Y/25V
C7 BC214 RN103
L2 1U/6/Y/10V 4.7U/8/Y/10V/X 470/8P4R
VCOREPLL 7 8 FSBSEL0
VTT_GMCH
10UH//120mA/8/S/[10LI2-12100A-01_10LI2-12100A-02_10LI2-12100A-03] U1C 5 6 FSBSEL2
As close as possible to 3 4 FSBSEL1
1 2
CPU socket -SMI P2 F26 TESTHI0
(20) -SMI SMI# TESTHI00
-A20M K3 W3 TESTHI1 R22 62/6 TESTHI2_7
(20) -A20M A20M# TESTHI01
-FERR R3 P1 TESTHI11
(20) -FERR FERR#/PBE# TESTHI11
INTR K1 W2 TESTHI12
(20) INTR LINT0 TESTHI12
NMI L1 F25
(20) NMI LINT1 TESTHI02
FSBSEL1 -IGNNE N2 G25 R24 62/6 -THRMTRIP
(20) -IGNNE IGNNE# TESTHI03
-STPCLK M3 G27 Locate at ICH6 Side
(20) -STPCLK STPCLK# TESTHI04
VCC G26 R25 62/6 -FERR
TESTHI05
3
VCCA A23 G24
Q278 VSSA VCCA TESTHII06 TESTHI2_7
D
B23 VSSA TESTHI07 F24
R1598 D23 AK6 -FORCEPR
RSVD RSVD -FORCEPR (35)
2N7002/S VCOREPLL C23 G6 RSVD_G6
8.2K/6 G S VCCIOPLL RSVD R26 62/6/X RSVD_G6
VTT_OL
VID0 AM2 L2 -CPUSLP
-CPUSLP (20)
2
1
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