Service Manuals, User Guides, Schematic Diagrams or docs for : Gigabyte GIGABYTE GIGABYTE G31M-ES2C - REV 1.12
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5 4 3 2 1
Model Name:GA-G31M-ES2C Revision 1.12
SHEET TITLE SHEET TITLE
01 COVER SHEET 28 REAR AUDIO JACK
D
02 BLOCK DIAGRAM 29 DISCRETE POWER D
03 BOM & PCB MODIFY HISTORY 30 VCORE PWM_RT9214
04 P4_LGA775_A 31 ATX, OTHERS POWER
05 P4_LGA775_B,D 32 FRONT PANEL
06 P4_LGA775_C 33 REALTEK RTL8111C/8102E
07 P4_LGA775_E,F,G,H
08 G31_HOST
09 G31_DDRII
C C
10 G31_PCI E, DMI
11 G31_VGA
12 G31_GND
13 G31_PWR
14 PCI EXPRESS*16 SLOT
15 DDRII CHANNEL A
16 DDRII CHANNEL B
17 DDRII TERMINATION
B B
18 ICH7 PCI, USB, DMI, LAN
19 ICH7 IDE, GPIO, SATA, CTRL
20 ICH7 VCC, GND
21 CK505 CLOCK.
22 PCI SLOT 1,2,PCIE*1
23 IDE/FLOPPY
24 ITE 8718 GB/HX
25 COM_LPT
A A
26 CI,HWM,KB/MS,DUALBIOS
27 ALC883 Gigabyte Technology
Title
Cover Sheet
Size Document Number Rev
Custom GA-G31M-ES2C 1.12
Date: Friday, November 21, 2008 Sheet 1 of 33
5 4 3 2 1
5 4 3 2 1
BLOCK DIAGRAM
INTEL Pentium4
LGA775
D
CLOCK GENERATOR D
VCORE = 1.4V
VCC3
CKVDD = 3.3V
PCI EXPRESS X16
VDDQ = 1.5V (AGP POWER 4X)
CHANNEL A
VCC3 = 3.3V
+12V = 12V DDRII DIMM X 1
3VDUAL = 3.3V
VCC = 5V G31 1.8VSTR = 1.8V(MEMORY,SUSPEND POWER)
VTT_DDR = 0.9V
CHANNEL B
DDRII DIMM X 1
1.8VSTR = 1.8V(MEMORY,SUSPEND POWER)
VCORE = 1.75V / SLEEP : 1.3V VTT_DDR = 0.9V
2_5VSTR = 2.5V(MEMORY)
VDDQ = 1.5V (AGP POWER 4X, HUBLINK)
C C
PCI EXPRESS X1
IDE Primary
ICH7
VCC = 5V
USB PORTS 0~7 SERIAL ATA
VCC25 = 2.5V(I/O,MEMORY/I,VLINK/I)
VCC = 5V 3VDUAL = 3.3V(SUSPEND POWER)
5VSB = 5V VCC3 = 3.3V
5VUSB = 5V RTCVDD = 3.3V VCC = 5V
PCI BUS
B FWH/HWMO B
PCI SLOT 1,2
VCC = 5V
+12 = 12V VCC3 = 3V
-12 = -12V
VCC = 5V
VCC3 = 3V
3VDUAL = 3V
LPC BUS
ALC883 LPC I/O ITE8718GB
+12V = 12V
VCC3 = 3.3V VCC = 5V
VCC = 5V 5VSB = 5V
AVDD = 5V VBAT = 3V
A AUDIO PORTS : FRONT AUDIO FRONT PANEL /CPU FAN I/O PORTS : A
LIN_ OUT LINE_IN MIC VCC = 5V
5VSB = 5V
CD_IN +12 = 12V
PVCC = 5V
COMA LPT PS2 FDD
Gigabyte Technology
Title
BOM & PCB MODIFY HISTORY
Size Document Number Rev
Custom GA-G31M-ES2C 1.12
Date: Friday, November 21, 2008 Sheet 2 of 33
5 4 3 2 1
5 4 3 2 1
Model Name:GA-G31M-ES2C Circuit or PCB layout change
for next version
Version: 1.12 DATE Change Item Reason
D D
Component value change history
2008/11/25
Data Change Item Reason
2007/08/03 EBOM:9MG31MS2L-00-10B
2007/08/15 R1.02:VIN 470UX3(FP)+RTL8111C OC GPIO65 PBOM:9MG31MS2L-00-10C
2007/08/28 ADD GP65 CONTROL ISOLATEB FOR O.C FPBOM:9MG31MS2L-00-10D
2007/09/10 CHANGE RTL8111C O.C VERSION PBOM:9MG31MS2L-00-10E
2007/08/28 FIX POWER SEQUENCE ISSUE PBOM:9MG31MS2L-00-10F
2007/12/05 CHANGE SATA CONNECTOR PBOM:9MG31MS2L-00-10G
C 2007/12/07 R1.03 CHANGE PWN RT9214+G31(A2) EBOM:9MG31MS2L-00-10H C
2008/04/24 R1.1 DES LITE DESIGN
VCORE 0.5UH CHOKE05U-30A-1PQ-2 EBOM:9MG31MS2L-00-11A
2008/05/07 R1.1 PVT PBOM:9MG31MS2L-00-11A
2008/06/09 R2.02 ADD DUAL BIOS+RCA SPDIF
2008/06/17 ADD CO-LAYOUT E-CAP EBOM:9MG31MS2L-00-20A
2008/07/14 FIX DUAL BIOS ISSUE.LAN LED FAIL. PBOM:9MG31MS2L-00-20B
2008/07/17 RENAME FROM G31M-S2L R2.02
2008/07/18 R1.11 PVT PBOM:9MG31ME2L-00-11A
2008/10/27 RENAME G31M-ES2C .LAN MODIFY RTL8102E. PBOM:9MG31ME2C-00-11A
B
2008/11/03 MODIFY PCIE X1 BLACK PBOM:9MG31ME2C-00-11B B
2008/11/21 R1.12.PWM RT9214. PBOM:9MG31ME2C-00-11CK
2008/11/25 FECN MODIFY PWM RT8105GS/PS.
A A
Gigabyte Technology
Title
BOM & PCB MODIFY HISTORY
Size Document Number Rev
Custom GA-G31M-ES2C 1.12
Date: Tuesday, November 25, 2008 Sheet 3 of 33
5 4 3 2 1
5 4 3 2 1
VCORE
R1 49.9/6/1 GTLREF1
VTT_OR
R3 C1
BC5 BC6 BC7 BC8 100/6/1 1u/6/Y5V/10V/Z
10u/12/X7R/6.3V/K 10u/12/X7R/6.3V/K 10u/12/X7R/6.3V/K 10u/12/X7R/6.3V/K
D D
R5 49.9/6/1 GTLREF0
VTT_OR
R7 C2
VCORE 100/6/1 1u/6/Y5V/10V/Z
0.9V
BC1 BC2 BC3 BC4
10u/12/X7R/6.3V/K 10u/12/X7R/6.3V/K 10u/12/X7R/6.3V/K 10u/12/X7R/6.3V/K
R8 62/6 -IERR
VTT_OR
R10 62/6 -BR0
VTT_OL
R12 62/6 -CPURST
VTT_OR
RN1
C 7 8 C
5 6 TESTHI9
LGA775-39 3 4 TESTHI8
1 2 TESTHI10
VTT_OL
HA[3..16] LGA775A 62/8P4R/6
[8] HA[3..16]
HA3 L5 D2 -HADS
A<3>* ADS* -HADS [8]
HA4 -BNR
HA5
P6 A<4>* LGA775 BNR* C2
-HIT
-BNR [8]
M5 A<5>* HIT* D4 -HIT [8]
HA6
HA7
L4 A<6>* (1/8) RSP* H4 TP_CPU16
-BPRI
M4 A<7>* BPRI* G8 -BPRI [8]
HA8 R4 B2 -DBSY
A<8>* DBSY* -DBSY [8]
HA9 T5 C1 -DRDY
A<9>* DRDY* -DRDY [8]
HA10 U6 E4 -HITM
A<10>* HITM* -HITM [8]
HA11 T4 AB2 -IERR
HA12 A<11>* IERR* -HINIT
U5 A<12>* INIT* P3 -HINIT [19]
HA13 U4 C3 -HLOCK 1.3K/4/1
A<13>* LOCK* -HLOCK [8]
HA14 V5 E3 -HTRDY R2859 R2860 0/6/X GTLREF0
A<14>* TRDY* -HTRDY [8]
HA15 V4 AD3 TP_CPU17 +12V
A<15>* BINIT*
3
HA16 W5 G7 -DEFER
A<16>* DEFER* -DEFER [8]
TP_CPU18 N4 RSVD_3 D GTLREF2 [6]
P5 AB3 R2862 Q360
TP_CPU19 RSVD_4 MCERR*
-HREQ0 K4 1K/4/1 2N7002/SOT23/25pF/5
[8] -HREQ0 REQ<0>* G S
-HREQ1 J5 U2 TP_CPU1
[8] -HREQ1 REQ<1>* AP<0>* VCC3
B -HREQ2 M6 U3 TP_CPU2 B
2
1
[8] -HREQ2 -HREQ3 REQ<2>* AP<1>*
[8] -HREQ3 K6 REQ<3>*
3
-HREQ4 J6 F3 -BR0
[8] -HREQ4 REQ<4>* BR<0>* -BR0 [8]
-HADSTB0 R6 G3 TESTHI8 Q361
HA[17..35][8] -HADSTB0 HA17 AB6
ADSTB<0>* TESTHI_8
G4 TESTHI9 R2863 MMBT2222A/SOT23/600mA/40
[8] HA[17..35] A<17>* TESTHI_9
HA18 W6 H5 TESTHI10 1K/4/1
HA19 A<18>* TESTHI_10 SOT23
Y6 [24] GTLREF_UV0
2
1
HA20 A<19>*
Y4 A<20>*
HA21 AA4 J16 TP_CPU3 R2864
HA22 A<21>* DP<0>* 576/6/1
AD6 A<22>* DP<1>* H15 TP_CPU4
HA23 AA5 H16 TP_CPU5 GTLREF1
HA24 A<23>* DP<2>* +12V
AB5 A<24>* DP<3>* J17 TP_CPU6
3
HA25 AC5
HA26 A<25>* GTLREF0
AB4 A<26>* GTLREF0 H1 GTLREF3 [6]
HA27 GTLREF1 D
AF5 H2 R2867 Q362
HA28 A<27>* GTLREF1 GTLREF_MCH 1K/4/1 2N7002/SOT23/25pF/5
AF4 A<28>* GTLREF2 E24 GTLREF_MCH [8]
HA29 G S
AG6 A<29>* GTLREF_SEL H29 TP_CPU20
HA30 AG4 BC736 VCC3
2
1
HA31 A<30>* 1u/6/Y5V/10V/Z
AG5 A<31>*
3
HA32 AH4 G23 -CPURST
A<32>* RESET* -CPURST [8]
HA33 AH5 Q363
HA34 A<33>* R2868 MMBT2222A/SOT23/600mA/40
AJ5 A<34>*
HA35 AJ6 B3 -RS0 1K/4/1
A<35>* RS<0>* -RS0 [8] SOT23
AC4 F5 -RS1
-RS1 [8] [24] GTLREF_UV1
2
1
A RSVD_1 RS<1>* -RS2 A
AE4 RSVD_2 RS<2>* A3 -RS2 [8]
-HADSTB1 AD5
[8] -HADSTB1 ADSTB<1>*
CPU-SK/775/S/GF Gigabyte Technology
Title
P4_LGA775-A
Size Document Number Rev
B GA-G31M-ES2C 1.12
Date: Friday, November 21, 2008 Sheet 4 of 33
5 4 3 2 1
5 4 3 2 1
HD[0..15] LGA775B HD[32..47] RN2 470/8P4R/6
[8] HD[0..15] HD[32..47] [8]
HD0 B4 G16 HD32 7 8 FSBSEL0
D<0>* D<32>* VTT_GMCH
HD1 C5 LGA775 E15 HD33 5 6 FSBSEL2
HD2 D<1>* D<33>* HD34 FSBSEL1
A4 D<2>* D<34>* E16 3 4
HD3 C6 (2/8) G18 HD35 1 2
HD4 D<3>* D<35>* HD36
A5 D<4>* D<36>* G17
D HD5 HD37 RN3 62/8P4R/6 D
B6 D<5>* D<37>* F17
HD6 B7 F18 HD38 7 8 -BPM0
D<6>* D<38>* VTT_OR
HD7 A7 E18 HD39 5 6 -BPM1
HD8 D<7>* D<39>* HD40 -BPM5
A10 D<8>* D<40>* E19 3 4
HD9 A11 F20 HD41 1 2 -BPM4
HD10 D<9>* D<41>* HD42 -BPM3
B10 D<10>* D<42>* E21 7 8
HD11 C11 F21 HD43 C7 5 6 -BPM2
HD12 D<11>* D<43>* HD44 1u/6/Y5V/10V/Z TDI
D8 D<12>* D<44>* G21 3 4
HD13 B12 E22 HD45 1 2 TMS
HD14 D<13>* D<45>* HD46 RN4 62/8P4R/6
C12 D<14>* D<46>* D22
HD15 D11 G22 HD47
-DBI0 D<15>* D<47>* -DBI2 R20 62/6 TDO
[8] -DBI0 A8 DB1<0>* DBI<2>* D19 -DBI2 [8]
STBN0 C8 G20 STBN2 R593 1K/4/1 VR_RDY
HD[16..31] [8] STBN0 DSTBN<0>* DSTBN<2>* STBN2 [8] HD[48..63]
STBP0 B9 G19 STBP2
[8] HD[16..31] [8] STBP0 DSTBP<0> DSTBP<2> STBP2 [8] HD[48..63] [8]
HD16 G9 D20 HD48 R22 62/6 -TRST
HD17 D<16>* D<48>* HD49 R23 62/6 TCK
F8 D<17>* D<49>* D17
HD18 F9 A14 HD50
HD19 D<18>* D<50>* HD51
E9 D<19>* D<51>* C15
HD20 D7 C14 HD52
HD21 D<20>* D<52>* HD53 FSBSEL0 R14 8.2K/4 BSEL0
E10 D<21>* D<53>* B15 [21] FSBSEL0 BSEL0 [11]
HD22 D10 C18 HD54 TO CLK GEN FSBSEL1 R15 8.2K/4 BSEL1 TO NB
D<22>* D<54>* [21] FSBSEL1 BSEL1 [11]
HD23 F11 B16 HD55 FSBSEL2 R16 8.2K/4 BSEL2
D<23>* D<55>* [21] FSBSEL2 BSEL2 [11]
HD24 F12 A17 HD56
HD25 D<24>* D<56>* HD57
C D13 D<25>* D<57>* B18 C
HD26 E13 C21 HD58
HD27 D<26>* D<58>* HD59
G13 D<27>* D<59>* B21
HD28 F14 B19 HD60
HD29 G14
D<28>*
D<29>*
D<60>*
D<61>* A19 HD61 CPU
HD30 F15 A22 HD62
HD31 D<30>* D<62>* HD63
G15 D<31>* D<63>* B22
-DBI1 G11 C20 -DBI3 NA FSB FSA
[8] -DBI1 DB1<1>* DBI<3>* -DBI3 [8]
STBN1 G12 A16 STBN3
[8] STBN1 DSTBN<1>* DSTBN<3>* STBN3 [8]
STBP1 E12 C17 STBP3 FSBSEL3 FSBSEL1 FSBSEL0 Clock
[8] STBP1 DSTBP<1> DSTBP<3> STBP3 [8]
1 0 1 100MHz X
CPU-SK/775/S/GF 0 0 1 133MHz
0 1 1 166MHz
VTT_GMCH 0 1 0 200MHz
LGA775D
VTT_1 A29 0 0 0 266MHz
TCK AE1 LGA775 B25
TDI TCK VTT_2
AD1 TDI VTT_3 B29
TDO AF1 (4/8) VTT_4 B30
TMS TDO
AC1 TMS VTT_5 C29
B -TRST AG1 A26 B
-BPM0 TRST* VTT_6
AJ2 BPM<0>* VTT_7 B27
-BPM1 AJ1 C28
-BPM2 BPM<1>* VTT_8 FSBSEL1
AD2 BPM<2>* VTT_9 A25
3
-BPM3 AG2 A28
-BPM4 BPM<3>* VTT_10 Q391
AF2 BPM<4>* VTT_11 A27
-BPM5 AG3 C30 R2 MMBT2222A/SOT23/600mA/40
-SYS_RST BPM<5>* VTT_12 453/4/1
[19,21,32] -SYS_RST AC2 DBR* VTT_13 A30
AK3 C25 FSBSEL2 SOT23
2
1
ITPCLK<0> VTT_14
AJ3 ITPCLK<1> VTT_15 C26
FSBSEL0 G29 C27
FSBSEL1 BSEL<0> VTT_16
H30 BSEL<1> VTT_17 B26
FSBSEL2 G30 D27 FIX FSB1600 LATCH FAIL
BSEL<2> VTT_18
N5 SPARE0 VTT_19 D28
C9 SPARE1 VTT_20 D25
TP_CPU7 E7 D26
R13 SPARE2 VTT_21
AE6 SPARE4 VTT_22 B28
1K/4/1/X D16 D29
NC_DSS2 VTT_23
A20 NC_DSS3 VTT_24 D30
TP_CPU8 E23 AM6 VR_RDY
NC VTT_PWRGD VR_RDY [30]
VTT_OUT_1 AA1 VTT_OR
VTT_OUT_2 J1 VTT_OL
F27 TP_CPU27
VTT_SEL TP_CPU9
EXTBGREF F23
A D14 A
SFRANAD
SFRANAC E6
DCLKPH E5
ACLKPH
HFPLL
J3
D1
Gigabyte Technology
Title
P4_LGA775-B,D
Size Document Number Rev
CPU-SK/775/S/GF B GA-G31M-ES2C 1.12
Date: Friday, November 21, 2008 Sheet 5 of 33
5 4 3 2 1
5 4 3 2 1
Place outside of CPU socket
R28 49.9/6/1 COMP5
VTT_OL
R30 49.9/6/1 COMP4
Note: R31 49.9/6/1 COMP2
R32 49.9/6/1 COMP3
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