Service Manuals, User Guides, Schematic Diagrams or docs for : HP HP Quanta AT1-AT9 Quanta AT3U
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1 2 3 4 5 6 7 8
04-- 0402 footprint
PCB STACK UP
LAYER 1 : TOP
06--
08--
0603 footprint
0805 footprint AT3U BLOCK DIAGRAM 01
12-- 1206 footprint
LAYER 2 : SGND1 F-- 1% tolerance CPU THERMAL
CPU SENSOR
LAYER 3 : IN1 Merom 14.318MHz
A A
PAG 11
LAYER 4 : IN2
478P (uPGA)/35W
LAYER 5 : VCC PAG 3,4 CLK_CPU_BCLK,CLK_CPU_BCLK#
CLK_MCH_BCLK,CLK_MCH_BCLK# CLOCK GEN
LAYER 6 : IN3 DREFCLK,DREFCLK# ICS9LPRS355AGLFT
64pinsTSSOP
LAYER 7 : SGND2 DREFSSCLK,DREFSSCLK#
PAG 2
LAYER 8 : BOT
TV_OUT
DDRII-SODIMM1 DDRII 533,667 MHz
NORTH BRIDGE CRT/S-VIDEO
CRT_OUT
TV_OUT PAG 12,13
PAG 18
Cable VGA
Crestline LVDS(2 Channel) Panel Connector
Docking RJ-45 DDRII 533,667 MHz PAG 19
DDRII-SODIMM2
CIR/Pwr btn
B B
Stereo MIC PAG 12,13 PAG
Headphone Jack 5,6,7,8,9,10,11
USB Port
VOL Cntr DMI LINK NBSRCCLK, NBSRCCLK#
PAG 31 USB2.0
5 0 3 4,6,7
SYSTEM CHARGER(MAX8724) SATA2 Bluetooth USB2.0 I/O Ports Camera Mini PCI-E Card x1
SATA - HDD1
PAG 33
PAG 24
PAG 27 X1 PAG 24 X1 PAG 24 Express Card x1
SOUTH BRIDGE Cable Docking x1PAG 31
PCI BUS / 33MHz
SYSTEM POWER MAX8778
SATA0
PAG 34 SATA - HDD2 ICH-8M PCI-E
PAG 27
VCCP +1.5V AND GMCH Azalia
PATA (66/100/133)
C C
1.05V(MAX8717)
PAG 35 PATA- CD-ROM PAG 14,15,16,17 Mini PCI-E LAN Express RICOH
PAG 24 Card Realtek Card 34 RICOH 832
PCI Express PCIE-LAN
Realtek Mini Card RTL8101 (NEW CARD)
CPU CORE MAX8771 Two-element (Wireless (10/100)
LPC ALC 268 LAN) PAG 20,21
PAG 36 microphone PAG 30 PAG 25,26 PAG 27
PAG 28 PAG 22
Keyboard
DDR II SMDDR_VTERM
1.8V/1.8VSUS(TPS51116REGR) Touch Pad PAG 28 ENE KBC Audio Jacks IEEE1394 Memory
CardReader
PAG 37 (Phone/ MIC) RJ45 CONN
CIR PAG 22
DISCHARGE/3VS/5VS/LANVCC PAG 22 KB3926QF A2 PAG 21 PAG 20
PAG 25
PAG 38
Capacitive Sense PAG 32 PCI ROUTING
SW PAG 28 AUDIO TABLE IDSEL INTERUPT DEVICE
Amplifier REQ0# / GNT0# AD25 INTE#,INTF# RICOH832
PAG 23
REQ1# / GNT1# AD22 INTC#,INTD# MINI PCI for debug
D D
FAN SPI Jack to
Speaker PROJECT : AT3U
PAG 31 PAG 32 PAG 28 Quanta Computer Inc.
Size Document Number Rev
Custom BLOCK DIAGRAM 2A
NB5/RD1/HW2
Date: Monday, April 30, 2007 Sheet 1 of 37
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+3V
+3V
L42
1 2
BLM21PG600SN1D/08
120 ohms@100Mhz
+CK_VDD_MAIN
CLK_3GPLLREQ#
NEW-CARD_CLK_REQ#
R321
R322
2
2
1 10K/04
1 10K/04
02
1
1
1
1
1
1
C400 C464 C436 C441 C446 C429
22U/10V/12 .1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04
2
2
2
2
2
2
Y1
SI-2 change SI-1 modify
A L43 CG_XIN 1 2 CG_XOUT A
( remove
1 2 VDDCPU
BLM21PG600SN1D/08 R256 --not
14.318MHZ
1
1
1 need )
1
C431 C430 internal have
C447 C445 27P/50V/04 27P/50V/04 already build-in
2
2
22U/10V/12 .1U/10V/04
33ohm damping
2
2
14.318MHz resisteor
L44 RP40 4 3 4P2R-S-0
U16 CLK_CPU_BCLK [3]
1 2 +CK_VDD_MAIN2 2 1 CLK_CPU_BCLK# [3]
BLM21PG600SN1D/08
120 ohms@100Mhz +CK_VDD_MAIN 16 54 RHCLK_CPU RP41 4 3 4P2R-S-0
VDDPLL3 CPUCLKT0 CLK_MCH_BCLK [5]
1
1
1
1
1
1
1
9 53 RHCLK_CPU# 2 1
VDD48 CPUCLKC0 CLK_MCH_BCLK# [5]
C479 C456 C473 C448 C462 C458 C452 2
22U/10V/12 .1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04 .1U/10V/04 61
VDDPCI CK505 51 RHCLK_MCH RP45 2 1 *4P2R-S-0 CLK_CPU_ITP [3]
2
2
2
2
2
2
2
VDDREF CPUCLKT1 RHCLK_MCH#
39 VDDSRC CPUCLKC1 50 4 3 CLK_CPU_ITP# [3]
VDDCPU 55 VDDCPU CPU_ITP RP64 4
CPUT2_ITP/SRCT8 47 3 4P2R-S-0 CLK_PCIE_MINI_C [29]
+CK_VDD_MAIN2 12 46 CPU_ITP# 2 1
VDD96I/O CPUT2_ITP/SRCC8 CLK_PCIE_MINI_C# [29]
20 VDDPLL3I/O
+3V 26 13 R_DOT96 RP42 2 1 4P2R-S-0
VDDSRCI/O DOTT_96/SRCT0 DREFCLK [6]
45 14 R_DOT96# 4 3
VDDSRCI/O DOTC_96/SRCC0 DREFCLK# [6]
36 VDDSRCI/O
+3V 17 R_DREFSSCLK RP43 2 1 4P2R-S-0
27MHz_Nonss/SRCCLK1/SE1 DREFSSCLK [6]
2
49 18 R_DREFSSCLK# 4 3
B VDDCPU_IO 27Mhz_ss/SRCCLC1/SE2 DREFSSCLK# [6] B
48 NC
R259 SI-2 add -- reserve not need 21 RSRC_SATA RP46 2 1 4P2R-S-0
SRCCLKT2/SATACL CLK_PCIE_SATA [14]
10K/04 22 RSRC_SATA# 4 3
SRCCLKC2/SATACL CLK_PCIE_SATA# [14]
CG_XIN 60
1
Q16 R288 R308 CG_XOUT X1 R_CLK_PCIE_VGA T289
59 X2 SRCCLKT3/CR#_C 24 DEL VGA CLK NET
2
PCLK_MINI_LPC 10K/06 10K/06 25 R_CLK_PCIE_VGA# T290
2N7002E SRCCLKC3/CR#_D
3 1 CGDAT_SMB R845 *100K/04 27 RSRC1_LAN RP50 2 1 4P2R-S-0
[16,27] PDAT_SMB SRCCLKT4 CLK_PCIE_LAN [25]
28 RSRC1_LAN# 4 3
SRCCLKC4 CLK_PCIE_LAN# [25]
R269
56 38 PM_STPPCI#
[16] CK_PWG CK_PWRGD/PD# PCI_STOP# PM_STPPCI# [16]
*4.7K/04 CLK_BSEL1 R298 4.7K/04 FSB 57 37 PM_STPCPU#
FSLB/TEST_MODE CPU_STOP# PM_STPCPU# [16]
+3V
41 RSRC_ICH RP49 4 3 4P2R-S-0
SRCCLKT6 CLK_PCIE_ICH [15]
Q17 40 RSRC_ICH# 2 1
SRCCLKC6 CLK_PCIE_ICH# [15]
2
2N7002E CGCLK_SMB 64 44 CLK_PCIE_MINI_ RP47 4 3 4P2R-S-0
[12,13,29] CGCLK_SMB SCLK SRCCLKT7/CR#_F CLK_PCIE_MINI [29]
0=overclocking 3 1 CGCLK_SMB CGDAT_SMB 63 43 CLK_PCIE_MINI_# 2 1
[16,27] PCLK_SMB [12,13,29] CGDAT_SMB SDATA SRCCLKC7/CR#_E CLK_PCIE_MINI# [29]
of CPU and 30 RSRC_MCH RP52 2 1 4P2R-S-0
SRCCLKT9 CLK_PCIE_3GPLL [6]
SRC Allowed 15 31 RSRC_MCH# 4 3
GND SRCCLKC9 CLK_PCIE_3GPLL# [6]
19 GND
1 = overclocking 11 34 CLK_PCIE_NEW RP51 2 1 4P2R-S-0
GND48 SRCCLKT10 CLK_PCIE_NEW_C [27]
52 35 CLK_PCIE_NEW# 4 3
of CPU and SRC GNDCPU SRCCLKC10 CLK_PCIE_NEW_C# [27]
8 GNDPCI
not Allowed 58 33 NEW-CARD_CLK_REQ#_R R324 475/F/03 NEW-CARD_CLK_REQ#
GNDREF SRCCLKT11/CR#_H NEW-CARD_CLK_REQ# [27]
23 32 CLK_3GPLLREQ#_R R323 475/F/03 CLK_3GPLLREQ#
GNDSRC SRCCLKC11/CR#_G CLK_3GPLLREQ# [6]
C951 *33P/50V/04 CLKUSB_48 29 GNDSRC
42 GNDSRC
+3V 1 R_PCLK_KB3920 R250 33_04
C PCICLK0/CR#_A PCLK_LPC_KB3920 [31] C
C416 *33P/50V/04 PCLK_LPC_KB3920 3 R_PCLK_5C832 R260 33_04
PCICLK1/CR#_B PCI_CLK_5C832 [21]
4 PCLK_MINI_LPC R279 33_04
PCICLK2/TME PCLK_LPC_DEBUG [29]
C421 *33P/50V/04 PCI_CLK_5C832 5 PCI_ICH T258
PCICLK3
2
6 FCTSEL1 form ICS FAE
C442 33P/50V/04 PCLK_ICH PCICLK4/27_SELECT
for S3 resume issue recommend(defaule is
R287
*10K/04 C438 *33P/50V/04 PCLK_LPC_DEBUG
Hi )
7 ITP_EN R285 33_04
PCLK_ICH [15]
1
FCTSEL1 C432 *33P/50V/04 14M_ICH PCI_F5/ITP_EN R292 33_04
CLKUSB_48 [16]
10 FSA R295 4.7K/04 CLK_BSEL0
USB_48MHZ/FSLA
2
FSC R257 4.7K/04 CLK_BSEL2
for EMI 62 R266 33_04
FSLC/TST_SL/REF 14M_ICH [16]
R296
10K/04 ICS9LPRS355AGLFT/CY28548ZXCT/RTM875T-606
1
GCLK_SEL = FCTSEL1
CPU Clock select FSC FSB FSA CPU SRC PCI
0=UMA R309 0/04 CLK_BSEL0 R310 0/04
1 0 1 100 100 33 FCTSEL1 PIN20 PIN21 PIN24 PIN25
1 = External VGA [3] CPU_BSEL0 MCH_BSEL0 [6] (PIN13)
R307 *56/04
0 0 1 133 100 33
+1.05V
0 1 1 166 100 33 0=UMA DOT96T DOT96C SRCT1/LCDT_100 SRCT1/LCDT_100
R301 1K/04
+3V
R305 0/04 CLK_BSEL1 R299 0/04
0 1 0 200 100 33
[3] CPU_BSEL1 MCH_BSEL1 [6] 1 = External
0 0 0 266 100 33 VGA SRCT0 SRCC0 27Mout-NSS 27Mout-SS
2
Enable ITP R302 *0/04
*10K/04 R303 1K/04
1 0 0 333 100 33
D
+1.05V D
R283 1 1 0 400 100 33
R277 0/04 CLK_BSEL2 R258 0/04
[3] CPU_BSEL2 MCH_BSEL2 [6]
1
ITP_EN R264 *0/04
1 1 1 RSVD 100 33
1K to NB only when
2
+1.05V R265 1K/04 XDP is implement.No
10K/04
XDP can use 0 ohm PROJECT : AT3U
R825 Quanta Computer Inc.
1
Size Document Number Rev
Custom CLOCK GENERATOR 2A
NB5/RD1/HW2
Date: Wednesday, May 02, 2007 Sheet 2 of 37
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
[5] H_A#[3..16]
H_A#[3..16]
H_A#3
H_A#4
H_A#5
H_A#6
J4
L5
L4
U31A
A[3]#
A[4]#
A[5]#
ADS#
BNR#
BPRI#
H1
E2
G5
C926*100P/50V/04
H_ADS#
H_BNR#
H_BPRI#
[5]
[5]
[5]
[5] H_D#[0..15]
H_D#[0..15]
H_D#0
H_D#1
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