Service Manuals, User Guides, Schematic Diagrams or docs for : HP HP_Pavilion_DV7-COMPAL_LA-4081P-REV_0.3
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A B C D E
1 1
2
Compal confidential 2
Schematics Document
Mobile Penryn uFCPGA with Intel
3
Cantiga_GM+ICH9-M core logic 3
2008-05-22
REV 0.3
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/02/13 Deciphered Date 2006/03/10 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom Montevina Consumer UMA 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, May 23, 2008 Sheet 1 of 44
A B C D E
A B C D E
Compal confidential Montevina Consumer UMA
CK505 72QFN
Dual-Core Thermal Sensor
Mobile Penryn Clock Generator
EMC1402 SLG8SP553V
1 1
P4 P15
uFCPGA-478 CPU
P4, 5, 6
Fan conn P4
H_A#(3..35)
FSB
H_D#(0..63) 667/800/1066 MHz 1.05V
LVDS Panel DDR2 SO-DIMM X2
DDR2 667MHz 1.8V BANK 0, 1, 2, 3 P13, 14
Interface P17
Intel Cantiga MCH Dual Channel
CRT FCBGA 1329
P16
Support V1.3 USB conn x 3
P7, 8, 9, 10, 11, 12 P29
HDMI P35
2 2
USB2.0*8
DMI X4 C-Link BT Conn Touch Screen Conn
P29
P29
USB Camera
P17
PCI-E BUS*6 & USB2.0 *3 Azalia
FPR Conn
Intel ICH9-M SATA Master-1
SATA Master-2
P30
SATA Slave
Realtek 8102E Mini-Card*3 New Card Flash Memory Card mBGA-676 Audio CKT AMP & Audio Jack
SATA Slave Codec_IDT9271B7 MIC & SPKR
WLAN & Robson &TV USB2.0*1
10/100 LAN PCIE*1 Controller P18, 19, 20, 21 P26
TPA6020 P28
USB2.0*2
PCIE*1 PCIE*3 JM385 CardReader
P23 P24, 27 P24
USB2.0 X1
PCIE*1
MDC
P27
P25
RJ45/11 CONN
3
P23 LPC BUS SATA HDD Connector 3
P22
SATA 2nd HDD Dock
ACCELEROMETER-1 Option Connector P22
USB2.0*1
P30
5 in1 Slot ENE RGB
P25
KB926 SATA ODD Connector RJ45
P22
ACCELEROMETER-2 P31 SPDIF
P30 CIR
e-SATA Combo Connector
Touch Pad CONN. Int.KBD USB2.0*1 & SATA*1 P29
MIC*1
LED RTC CKT.
P32 P31 LINE-OUT*1
P32 P19
SPI SPDIF
SPI ROM P33
Capsense switch Conn
P32
25LF080A P30
4 4
K/B backlight Conn
P32
DC/DC Interface CKT.
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/02/13 Deciphered Date 2006/03/10 Title
P34 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom Montevina Consumer Discrete 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, May 23, 2008 Sheet 2 of 44
A B C D E
A
O MEANS ON X MEANS
Voltage Rails OFF
USB assignment PCIe assignment
USB-0 Right side port PCIe-1 WLAN
USB-1 Right side port PCIe-2 Robson
power USB-2 Left side port (combo with ESATA) PCIe-3 TV-tuner
plane
USB-3 Dock PCIe-4 LAN
+B +5VALW +1.8V +5VS USB-4 USB Camera PCIe-5 Card reader
+3VS USB-5 WLAN PCIe-6 New card
+3VALW +1.5VS USB-6 Bluetooth
+0.9V USB-7 Finger Printer
State +VCCP USB-8 TV-tuner
+CPU_CORE USB-9 New card
+2.5VS USB-10 Left side port
+1.8VS USB-11 Touch screen
S0 Symbol Note :
O O O O
S1 O O O O : means Digital Ground
S3 O O O X
: means Analog Ground
S5 S4/AC O O X X
45@ : stuff when 45 level assembly.
S5 S4/ Battery only O X X X @: just reserve , no stuff.
DEBUG@ : reserve for debug only.
S5 S4/AC & Battery
don't exist X X X X
1 1
SMBUS Control Table
SERIAL Thermal
SOURCE INVERTER Battery EEPROM Sensor SODIMM CLK Gen. MINI CARD LCD Cap.board
SMB_EC_CK1
SMB_EC_DA1 KB926 X V V X X X X X V CY
SMB_EC_CK2
SMB_EC_DA2 KB926 X X X V X X X X X
ESB_CLK
ESB_DAT KB926 X X X X X X X X V ENE
DDC2_CLK
DDC2_DAT North Bridge X X X X X X X V X
ICH_SMBCLK
ICH_SMBDATA South Bridge X X X X V V V X X
I2C / SMBUS ADDRESSING
DEVICE HEX ADDRESS
DDR SO-DIMM 0 A0 10100000
DDR SO-DIMM 1 A4 10100100
CLOCK GENERATOR (EXT.) D2 11010010
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/03/10 Deciphered Date 2006/03/10 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom Montevina Consumer Discrete 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, May 23, 2008 Sheet 3 of 44
A
5 4 3 2 1
ITP-XDP Connector
0512_Remove XDP debug port. +VCCP
XDP_TDI R731 1 2 54.9_0402_1%
XDP_TMS R732 1 2 54.9_0402_1%
D D
0512_Change value to 54.9 ohm if remove XDP port.
XDP_TRST# R792 1 2 54.9_0402_1%
7 H_A#[3..16]
JCPUA
H_A#3 J4 H1 H_ADS# XDP_TCK R737 1 2 54.9_0402_1%
A[3]# ADS# H_ADS# 7
ADDR GROUP_0
H_A#4 L5 E2 H_BNR#
A[4]# BNR# H_BNR# 7
H_A#5 L4 G5 H_BPRI#
A[5]# BPRI# H_BPRI# 7
H_A#6 K5
H_A#7 A[6]# H_DEFER#
M3 A[7]# DEFER# H5 H_DEFER# 7
H_A#8 N2 F21 H_DRDY#
A[8]# DRDY# H_DRDY# 7
H_A#9 J1 E1 H_DBSY#
A[9]# DBSY# H_DBSY# 7
H_A#10 N3
H_A#11 A[10]# H_BR0#
P5 A[11]# BR0# F1 H_BR0# 7
H_A#12 P2 A[12]#
CONTROL
H_A#13 L2 D20 H_IERR# T1
H_A#14 A[13]# IERR# H_INIT#
P4 A[14]# INIT# B3 H_INIT# 19
H_A#15 P1 Place TP with a
H_A#16 A[15]# H_LOCK#
R1 A[16]# LOCK# H4 H_LOCK# 7 GND 0.1" away
H_ADSTB#0 M1
7 H_ADSTB#0 ADSTB[0]#
C1 H_RESET#
RESET# H_RESET# 7
H_REQ#0 K3 F3 H_RS#0
7 H_REQ#0 REQ[0]# RS[0]# H_RS#0 7
H_REQ#1 H2 F4 H_RS#1
7 H_REQ#1 REQ[1]# RS[1]# H_RS#1 7
H_REQ#2 K2 G3 H_RS#2
7 H_REQ#2 REQ[2]# RS[2]# H_RS#2 7
H_REQ#3 J3 G2 H_TRDY#
7 H_REQ#3 REQ[3]# TRDY# H_TRDY# 7
H_REQ#4 L1
7 H_REQ#4 REQ[4]#
G6 H_HIT#
7 H_A#[17..35] HIT# H_HIT# 7
H_A#17 Y2 E4 H_HITM#
C A[17]# HITM# H_HITM# 7 C
H_A#18 U5
H_A#19 A[18]#
R3 A[19]# BPM[0]# AD4
ADDR GROUP_1
H_A#20 W6 AD3
H_A#21 A[20]# BPM[1]#
U4 A[21]# BPM[2]# AD1
H_A#22 Y5 AC4
A[22]# BPM[3]#
XDP/ITP SIGNALS
H_A#23 U1 AC2
H_A#24 A[23]# PRDY#
R4 A[24]# PREQ# AC1
H_A#25 T5 AC5 XDP_TCK +3VS
H_A#26 A[25]# TCK XDP_TDI
T3 A[26]# TDI AA6
H_A#27 W2 AB3
H_A#28 A[27]# TDO XDP_TMS
W5 A[28]# TMS AB5
0.1U_0402_16V7K
H_A#29 Y4 AB6 XDP_TRST# 1
H_A#30 A[29]# TRST# XDP_DBRESET#
U2 A[30]# DBR# C20 XDP_DBRESET# 20
H_A#31 V4 C1
A[31]#
H_A#32
H_A#33
W3 A[32]# 0430_Chagne from 100 ohm to 0 ohm. 2
U55
AA4 A[33]# THERMAL
H_A#34 AB2 H_PROCHOT# R7 1 2 56_0402_1%
H_A#35 A[34]# +VCCP SMB_EC_CK2
AA3 A[35]# PROCHOT# D21 1 VDD SMCLK 8 SMB_EC_CK2 31
H_ADSTB#1 V1 A24 H_THERMDA_R R8 1 2 0_0402_5% H_THERMDA
7 H_ADSTB#1 ADSTB[1]# THERMDA
B25 H_THERMDC_R R9 1 2 0_0402_5% H_THERMDC H_THERMDA 2 7 SMB_EC_DA2
THERMDC DP SMDATA SMB_EC_DA2 31
H_A20M# A6 C2
19 H_A20M# A20M#
ICH
H_FERR# A5 C7 H_THERMTRIP# 1 2 H_THERMDC 3 6 2 1 +3VS
19 H_FERR# FERR# THERMTRIP# H_THERMTRIP# 7,19,31 DN ALERT#
H_IGNNE# C4 2200P_0402_50V7K R11 10K_0402_5%
19 H_IGNNE# IGNNE# THERM# 4 5
THERM# GND
19 H_STPCLK#
H_STPCLK#
H_INTR
D5 STPCLK# R10
For NS LM95245.
19 H_INTR C6 LINT0 H CLK
H_NMI B4 A22 CLK_CPU_BCLK +3VS 1 2
19 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 15
H_SMI# A3 A21 CLK_CPU_BCLK# 10K_0402_5% EMC1402-1-ACZL-TR_MSOP8
19 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 15
M4 RSVD[01] Address:100_1100
N5 RSVD[02] H_THERMDA, H_THERMDC routing together,
T2
B
V3
RSVD[03] Trace width / Spacing = 10 / 10 mil B
RSVD[04]
RESERVED
B2 RSVD[05]
D2 RSVD[06]
D22 RSVD[07]
D3 RSVD[08]
F6 RSVD[09]
PWM Fan Control circuit
+5VS
Penryn CONN@
JP2
1 1
+VCCP 2 2
1
1 1
D1 C3 C4 3
4.7U_0805_10V4Z 0.1U_0402_16V7K GND
4 GND
1
@ RB751V_SOD323
R12 2 2 ACES_88231-02001
2
56_0402_5%
+FAN
2 2
B
1
2
5
6
1
E
H_PROCHOT# 3 1 OCP# D Q1 @ D2
OCP# 20
C
G
@ Q2 3 RLZ5.1B_LL34
31 FAN_PWM S
MMBT3904_NL_SOT23-3 SI3456BDV-T1-E3_TSOP6
2
4
+VCCP
A A
1
R1
56_0402_5%
2
H_IERR#
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/02/13 Deciphered Date 2006/03/10 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Penryn(1/3)-AGTL+/ITP-XDP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom Montevina Consumer Discrete 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, May 26, 2008 Sheet 4 of 44
5 4 3 2 1
5 4 3 2 1
+VCC_CORE +VCC_CORE
7 H_D#[0..15] H_D#[32..47] 7
JCPUB JCPUC
H_D#0 E22 Y22 H_D#32 A7 AB20
H_D#1 D[0]# D[32]# H_D#33 VCC[001] VCC[068]
F24 D[1]# D[33]# AB24 A9 VCC[002] VCC[069] AB7
H_D#2 E26 V24 H_D#34 ◦ Jabse Service Manual Search 2024 ◦ Jabse Pravopis ◦ onTap.bg ◦ Other service manual resources online : Fixya ◦ eServiceinfo