Service Manuals, User Guides, Schematic Diagrams or docs for : HP compaq compaq presario cq61_v1
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1 2 3 4 5 6 7 8
PCB STACK UP
6L UMA CO-LAY DIS
Tango/Ballet BLOCK DIAGRAM 01
CPU CPU THERMAL
SENSOR
LAYER 1 : TOP Penryn 14.318MHz
A PAGE 4 A
LAYER 2 : SGND
478P (uPGA)/35W
LAYER 3 : IN1 PAGE 3,4 CLK_CPU_BCLK,CLK_CPU_BCLK#
CLK_MCH_BCLK,CLK_MCH_BCLK# CLOCK GEN
LAYER 4 : IN2 DREFCLK,DREFCLK# ALPRS355B MLF64PIN
FSB 667/800/1066
LAYER 5 : VCC DREFSSCLK,DREFSSCLK#
PAGE 2
LAYER 6 : BOT
Level Shift
PAGE 18 27MHz
NORTH BRIDGE
DDRII 667/800 MHz HDMI CON
DDRII-SODIMM1 (Option)
nVIDIA PAGE 18
PAGE 10 Cantiga PCI-Express
16X
NB10M-GE2-S CRT
DDRII-SODIMM2 DDRII 667/800 MHz
B B
64 Bit PAGE18
PAGE 10 PAGE 5~9
PAGE 12~16 Dual Link
533p LCD CONN
32.768KHz PAGE 17
DMI LINK NBSRCCLK, NBSRCCLK#
SATA - HDD
SATA0 150MB USB2.0
PAGE 26 0,8,9 5 3 6
SYSTEM CHARGER(ISL6251AHAZ-T) USB2.0 Ports BlueTooth Webcam Card Reader
SATA1 150MB SOUTH BRIDGE RTS5159
PAGE 31 SATA - CD-ROM X3 PAGE 26 (Option) (Option)
PAGE 26 PAGE 26 PAGE 17 (Option) PAGE 23
SYSTEM POWER ISL6237IRZ-T
ICH-9M
PAGE 32 PCI-E
X1 X1
C DDR II SMDDR_VTERM
E-SATA
SATA5 150MB Azalia C
1.8V/1.8VSUS(TPS51116REGR) Mini PCI-E
PAGE 36 PAGE 26
PAGE 19~22 LAN
Card Realtek
Analog PCIE-LAN
VCCP +1.5V AND GMCH (Wireless LAN) RTL8103EL
1.05V(RT8204) 32.768KHz LPC IDT92HP75B2 (10/100 LAN)
PAGE 33 MDC CONN PAGE 24
PAGE 30
PAGE 27
(Option)
CPU CORE ISL6266A PAGE 28
PAGE 34 ENE KBC 25MHz
SPI for AUDIO
Keyboard PAGE 29 Amplifier
KB3926 C0/D2 HDCP RJ45
Touch Pad PAGE 29 PAGE 20
TPA6017
PAGE 25
PAGE31 PAGE 27
om
D
microphone Audio Jacks Jack to D
(Phone/ MIC) Speaker
l.c
ai
PAGE 24 PAGE 24 PAGE 25
tm
GMT G9931P1U
SPI PROJECT : OP6/7
ho
FAN Quanta Computer Inc.
@
PAGE 26 PAGE 29
nf
ai
Size Document Number Rev
NB5
Custom
x
Block Diagram A
he
Date: Tuesday, January 20, 2009 Sheet 1 of 37
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+3V
L38
+3V_CK_MAIN
[4,6,9,10,11,12,14,15,17,18,19,20,21,22,24,25,26,27,28,29,30,33,34,37] +3V
[3,4,5,6,8,9,19,22,33,34] +1.05V
02
1 2
HCB1608KF-181T15 U21
C513
C562 C511 C509 C541 C508 +3V_CK_MAIN 23 61
VDDPLL3 CPUCLKT0 CLK_CPU_BCLK [3]
10U/6.3V_8 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 16 60
A VDD48 CPUCLKC0 CLK_CPU_BCLK# [3] A
9 SRC8 RP49 4 3 4P2R-0
4
VDDPCI
VDDREF
CK505 CPUCLKT1
58 CLK_MCH_BCLK [5]
SRC8# 2 1
CLK_CPU_ITP [3]
CLK_CPU_ITP# [3]
L42 46 57
+3V_CK_CPU +3V_CK_CPU VDDSRC CPUCLKC1 CLK_MCH_BCLK# [5]
1 2 62
VDDCPU
HCB1608KF-181T15 54 SRC8
+3V_CK_MAIN2 CPUT2_ITP/SRCT8 SRC8#
19 53
C542 C530 VDD96I/O CPUC2_ITP/SRCC8
27
10U/6.3V_8 .1U/10V_4 VDDPLL3I/O SRC0
33
VDDSRCI/O DOTT_96/SRCT0
20 int
43 21 SRC0#
VDDSRCI/O DOTC_96/SRCC0 SRC0 RP47 4
52
VDDSRCI/O 3 *4P2R-0 DREFCLK [6]
24 SRC1 SRC0# 2 1
27MHz_Nonss/SRCCLK1/SE1 DREFCLK# [6]
L43 56 25 SRC1#
+3V_CK_MAIN2 VDDCPU_IO 27Mhz_ss/SRCCLC1/SE2
1 2
HCB1608KF-181T15
55
NC discrete
28 2 1 CLK_PCIE_VGA [12]
SRCCLKT2/SATACL
29 4 3 CLK_PCIE_VGA# [12]
C554 C549 C561 C529 C566 C547 C539 CG_XIN SRCCLKC2/SATACL RP48 4P2R-0
3
10U/6.3V_8 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 CG_XOUT X1
2
X2 SRCCLKT3/CR#_C
31 int
32
SRCCLKC3/CR#_D SRC1 RP50 2 1 *4P2R-0 DREFSSCLK [6]
*100K/F_4 R317 34 SRC1# 4 3
SRCCLKT4 CLK_PCIE_3GPLL [6] DREFSSCLK# [6]
35 CLK_PCIE_3GPLL# [6]
SRCCLKC4
[21] CK_PWG 63 45 PM_STPPCI# [21] 2 1 27M_NONSS [14]
+3V CPU_BSEL1 R312 2.2K_4 FSB CK_PWRGD/PD# PCI_STOP#
64 44 PM_STPCPU# [21] 4 3 27M_SS [14]
+3V FSLB/TEST_MODE CPU_STOP# RP51 4P2R-33
SRCCLKT6
48 CLK_PCIE_ICH [20] discrete
47 CLK_PCIE_ICH# [20]
SRCCLKC6
2
[10,11,30] CGCLK_SMB 7 51 CLK_PCIE_WLAN [30]
Q15 R297 R296 SCLK SRCCLKT7/CR#_F
[10,11,30] CGDAT_SMB 6 50 CLK_PCIE_WLAN# [30]
SDATA SRCCLKC7/CR#_E
2
B R279 10K_4 10K_4 B
10K_4 2N7002 37
CGDAT_SMB SRCCLKT9 CLK_PCIE_LAN [27]
[21] PDAT_SMB 3 1 22 38
1
GND SRCCLKC9 CLK_PCIE_LAN# [27]
26
TME GND
18 41 CLK_PCIE_SATA [19]
GND48 SRCCLKT10
59 42 CLK_PCIE_SATA# [19]
GNDCPU SRCCLKC10
15
+3V GNDPCI
1 40
GNDREF SRCCLKT11/CR#_H
30 39
Q16 GNDSRC SRCCLKC11/CR#_G
36
GNDSRC
2
49
2N7002 GNDSRC
8
CGCLK_SMB PCICLK0/CR#_A R_CLK_MCH_OE# R280 475/F_4
[21] PCLK_SMB 3 1 10 CLK_MCH_OE# [6]
PCICLK1/CR#_B TME R276 33_4
11 PCLK_DEBUG [30]
PCICLK2/TME R_PCLK_KBC R288 33_4
12 PCLK_KBC [29]
PCICLK3 27M_SEL
13
PCICLK4/27_SELECT
0=overclocking ITP_EN
65 R285 33_4 PCLK_ICH [20]
of CPU and Y3 EPAD
CG_XIN 1 2 CG_XOUT 14 R308 22_4
SRC Allowed PCI_F5/ITP_EN R303 22_4
CLK_48M_USB [21]
CLK_48M_CR [23]
1 = overclocking 17 FSA R315 2.2K_4 CPU_BSEL0
14.318MHZ USB_48MHZ/FSLA
1
1
FSC R289 10K_4 CPU_BSEL2
of CPU and SRC C507 C512 5 FSLC R298 33_4 CLK_14M_ICH [21]
FSLC/TST_SL/REF
not Allowed 33P/50V_4 33P/50V_4
2
2
ICS9LPRS355BKLF MLF64
+3V
C
DB:Change from 27P to 33P(TXC suggestion) C
CK505 QFN64
2
des R293 27M_SEL Silego SLG8SP513VTR AL8SP513000 +3V
10K_4 PIN20 PIN21 PIN24 PIN25
PIN13 Realtek RTM875N-606-VD-GR AL000875000
1
27M_SEL CLK_MCH_OE# R277 2 1 10K_4
2
0=UMA DOT96T DOT96C SRCT1/LCDT_100 SRCT1/LCDT_100
int R299
*10K_4 1 = External
SRCT0 SRCC0 27Mout-NSS 27Mout-SS
1
VGA
0=UMA C501 *33P/50V_4 PCLK_KBC
1 = External VGA
FSC FSB FSA CPU SRC PCI C503 *27P/50V_4 PCLK_ICH
CPU Clock select
+3V C495 *33P/50V_4 PCLK_DEBUG
CPU_BSEL0 R321 *0_4/S
1 0 1 100 100 33
[3] CPU_BSEL0 MCH_BSEL0 [6]
0 0 1 133 100 33 C518 *10P/50V_4 CLK_48M_USB
2
0 1 1 166 100 33 C514 *10P/50V_4 CLK_48M_CR
*10K/F_4 R314 *1K/F_4
R291 0 1 0 200 100 33 C506 *33P/50V_4 CLK_14M_ICH
R_PCLK_KBC CPU_BSEL1 R316 *0_4/S
[3] CPU_BSEL1 MCH_BSEL1 [6]
1
D D
0 0 0 266 100 33 for EMI
ITP_EN
1 0 0 333 100 33
2
2
+1.05V R322 *1K/F_4
R283 1 1 0 400 100 33
10K_4 *10K/F_4 CPU_BSEL2 R278 *0_4/S
PROJECT : OP6/7
[3] CPU_BSEL2 MCH_BSEL2 [6]
R292 1 1 1 RSVD 100 33
1K to NB only when
Quanta Computer Inc.
1
1
XDP is implement.No
+1.05V R281 *1K/F_4 XDP can use 0 ohm
Enable ITP CLK
Size Document Number Rev
NB5
Custom Clock Generator SI
Date: Tuesday, January 20, 2009 Sheet 2 of 37
1 2 3 4 5 6 7 8
5 4 3 2 1
03
[2,4,5,6,8,9,19,22,33,34] +1.05V
U34A
[5] H_A#[35:3]
H_A#3 J4 H1
A[3]# ADS# H_ADS# [5] [5] H_D#[63:0] H_D#[63:0]
H_A#4 L5 E2 U34B
A[4]# BNR# H_BNR# [5]
ADDR GROUP 0
H_A#5 L4 G5 H_D#0 E22 Y22 H_D#32
A[5]# BPRI# H_BPRI# [5] D[0]# D[32]#
H_A#6 K5 H_D#1 F24 AB24 H_D#33
H_A#7 A[6]# H_D#2 D[1]# D[33]# H_D#34
M3 H5 H_DEFER# [5] E26 V24
H_A#8 A[7]# DEFER# H_D#3 D[2]# D[34]# H_D#35
N2 F21 H_DRDY# [5] G22 V26
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