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5 4 3 2 1
D D
C
Wistron Confidential C
PV1
2009/12/28 REV :PV-01
B B
A A
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title
Cover
Size Document Number Rev
A3
PATEK SA
Date: Monday, March 15, 2010 Sheet 1 of 57
5 4 3 2 1
5 4 3 2 1
SYSTEM DC/DC
Patek DIS Block Diagram INPUTS
RT8205A
OUTPUTS
+5VALW +5VL
DCBATOUT
+3VALW +3VL
Clock Generator 39
DDRIII Slot 0 AMD CPU ICS9LPRS480 20
SYSTEM DC/DC
8 DDRIII Channel A RT8209B
D
800/1066/1333 D
Champlain INPUTS OUTPUTS
DDRIII Slot 1 S1G4 package +5VALW +1.1VALW 41
8 DDRIII Channel B 4,5,6,7 VRAM VRAM
800/1066/1333
64MBx16 64MBx16
SYSTEM DC/DC
504 514
G972
HT3.0 INPUTS OUTPUTS
16X16 DDR3 DDR3 +3VS +1.8VS
38
CRT 13 SYSTEM DC/DC
RJ45
ATHEROS North Bridge ATI R.G.B 1600X1200@75
G9091/RT9205
AR8131 PCIE INPUTS OUTPUTS
CONN 29 AMD RS880M
10/100/1000 28
PCIE
M93-S3-LP LVDS
LCD +3VS +2.5VS_LDO_CPU
WXGA+ 14
Mini-Card
CPU I/F LVDS, CRT I/F / Park-S3 +1.5VS +1.05VS
37
PCIE+USB 2.0 INTEGRATED GRAHPICS
C WLAN 27 45,46,47,48,49 HDMI HDMI 22 SYSTEM DC/DC C
9,10,11,12 RT8207
INPUTS OUTPUTS
A-Link 4x1 +1.5V
+5VALW
+0.75V 40
Fringer printer GPU DC/DC
VFS451 22 APL5930/RT8209B MAXIM CHARGER
BQ24740
Express Card PCIE+USB 2.0 INPUTS OUTPUTS
34 26 South Bridge CAMERA
INPUTS OUTPUTS
14 +1.5V_PCIE +GPU_PCIE 38
USB 2.0 BT+
AMD SB820M +5VALW +VGA_CORE
DCBATOUT 18V 3.0A
5V 100mA 42
Thermal Sensor 52
GMT G781 23 BLUETOOTH
24
CPU DC/DC
SMBUS ISL6265/RT8209B
14 USB 2.0/1.1 ports
HDD26
Accelerometer USB x 3 24
INPUTS OUTPUTS
B ST HP302DL27 ETHERNET (10/100/1000Mb) B
+VCC_CORE
High Definition Audio DCBATOUT
SATAII ODD 26 +VDDNB 36
6 SATA ports
4 PCIe GPP +5VALW +NB_VDDC
MODEM 54
ACPI 1.1
SATAII+USB2.0 e-SATA 24
MDC V1.5 HD Audio LPC I/F PCB 6 LAYER
HP Vulcan 31
PCI/PCI BRIDGE
LPC Bus LPC debug 21
L1: Signal 1
INTERNAL 15,16,17,18,19 SPI L2: GND
D-MIC
L3: Signal 2
USB 2.0
USB 2.0
Pre-AMP L4: Signal 3
AUDIO CODEC
MIC IN TLV2462 L5: VCC
33 IDT 92HD80 L6: Signal 4
KBC
RealTek Mini-Card SMSC KBC1098 30
HEADPHONE
A RTS5138 25 WWAN 57
A
SPI Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
2CH SPEAKER SIM Card Flash ROM Touch Int. Title
SD/MMC 57
32 2 MB PAD KB Block Diagram
MS/MS Pro/xD
25 21 31 31 Size Document Number Rev
A3
PATEK SA
Date: Monday, March 15, 2010 Sheet 2 of 57
5 4 3 2 1
5 4 3 2 1
RS880M strapping
PCIE routing USB table
STRAP_DEBUG_BUS_GPIO_ENABLEb Page 18
Page 9
Enables the Test Debug Bus using GPIO.(PIN: RS880M--> VSYNC)
D 0 : Enable * 1 : Disable Pair Device D
LANE 0 LAN
RS880: Enables Side port memory ( RS880 use HSYNC)
0 : Enable
*1 : Disable LANE 3 NEW CARD USB-FSD1 FPR
LANE 4 WLAN USB-9 Bluetooth
SUS_STAT#
Selects Loading of STRAPS From EEPROM USB-8 WLAN
*1 : Bypass the loading of EEPROM straps and use Hardware Default Values
0 : I2C Master can load strap values from EEPROM if connected,
or use default values if not connected USB-7 WWAN
USB-6 USB Card Reader
USB-5 Right Side
SB820M strapping USB-4 USB Camera
USB-3 Right Side
Note: SB820 has 15K internal PU FOR PCI_AD[27:23]
PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 USB-2 Left Side (e-SATA combo)
C C
USE PCI Disable ILA USE FC USE DEFAULT USB-1 New Card
PULL PLL AUTORUN PLL PCIE STRAPS Disable PCI
HIGH MEM BOOT
(DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT)
USB-0 Left Side (S/W Debug port)
BYPASS Enable ILA BYPASS FC USE EEPROM Enable PCI
PULL PCI PLL AUTORUN PLL PCIE STRAPS MEM BOOT
LOW
AZ_SDOUT# PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 LPC_CLK_KBC LPC_CLK_DB SB_GPO200 , SB_GPO199
(LPCCLK0) (LPCCLK1) ROM TYPE:
PULL Allow WatchDOG USE
HIGH PCIE GEN2 (NB_PWRGD) DEBUG non_Fusion ENABLE EC CLKGEN H, H = Reserved
LOW POWER CLOCK mode ENABLED
ENABLED STRAPS
MODE DEFAULT DEFAULT DEFAULT
(Use Internal) H, L = SPI ROM
B PULL PERFORMANCE Force WatchDog IGNORE DISABLE EC CLKGEN L, H = LPC ROM B
LOW MODE PCIE GEN1 (NB_PWRGD) DEBUG Fusion DISABLED
DISABLED STRAPS CLOCK mode
(Use External) L, L = FWH ROM
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
SMBUS Control Table
THERMAL
SOURCE BATT SENSOR CLK GEN SODIMM G-SENSOR SMSC1098 SB-TSI
AB1A_DATA
AB1A_CLK SMSC1098 V X X X X X X
SB_SMB_CLK1
SB_SMB_DAT1 SB820M X X X X X X X
A A
SB_SMB_CLK0
SB_SMB_DAT0 SB820M X V V V V X X Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title
CPU_SIC_SB700
CPU_SID_SB700 CPU X X X X X X V NOTES
Size Document Number Rev
A3
PATEK SA
Date: Monday, March 15, 2010 Sheet 3 of 57
5 4 3 2 1
5 4 3 2 1
HT
+1.1VS CPU VLDT MAX 1.5A LAYOUT: PLACE CLOSE TO CPU
ALONG HT POWER SHAPE
DY
C1 C2 C3 C4 CPU1A C7 C5 C6 091215-1
SCD22U25V3KX-GP
SCD22U25V3KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
1
1
1
1
1
1 1
SC180P50V2JN-1GP
SC180P50V2JN-1GP
D 2 2 SEC 1 OF 6 D
2
2
2
2
2
LDT
D1 V_HT_A1 V_HT_B1 AE2
D2 V_HT_A2 V_HT_B2 AE3
D3 V_HT_A3 V_HT_B3 AE4
D4 V_HT_A4 V_HT_B4 AE5
091221-1
6 HDT_RST# 1 2
R3 0R0402-PAD-1-GP LDT_RST#_CPU B7 RESET* LDTREQ* C6 LDT_REQ#
LDT_PW ROK A7 PWROK
CPUCADOUT[15..0] 9
CPU_LDT_STOP# F10 LDTSTOP*
CPUCADOUTJ[15..0] 9
HT_TXD_P15 T4 CPUCADOUT15
9 NB0CADOUT[15..0] CPUCADOUT14
HT_TXD_P14 V5
NB0CADOUT15 N5 HT_RXD_P15 HT_TXD_P13 V4 CPUCADOUT13
9 NB0CADOUTJ[15..0] NB0CADOUT14 CPUCADOUT12
M3 HT_RXD_P14 HT_TXD_P12 Y5
NB0CADOUT13 L5 HT_RXD_P13 HT_TXD_P11 AB5 CPUCADOUT11
NB0CADOUT12 K3 HT_RXD_P12 HT_TXD_P10 AB4 CPUCADOUT10
NB0CADOUT11 H3 HT_RXD_P11 HT_TXD_P9 AD5 CPUCADOUT9
NB0CADOUT10 G5 HT_RXD_P10 HT_TXD_P8 AD4 CPUCADOUT8
NB0CADOUT9 F3 HT_RXD_P9 HT_TXD_P7 T1 CPUCADOUT7
NB0CADOUT8 E5 HT_RXD_P8 HT_TXD_P6 U2 CPUCADOUT6
NB0CADOUT7 N3 HT_RXD_P7 HT_TXD_P5 V1 CPUCADOUT5
NB0CADOUT6 L1 HT_RXD_P6 HT_TXD_P4 W2 CPUCADOUT4
NB0CADOUT5 L3 HT_RXD_P5 HT_TXD_P3 AA2 CPUCADOUT3
NB0CADOUT4 J1 HT_RXD_P4 HT_TXD_P2 AB1 CPUCADOUT2
NB0CADOUT3 G1 HT_RXD_P3 HT_TXD_P1 AC2 CPUCADOUT1
NB0CADOUT2 G3 HT_RXD_P2 HT_TXD_P0 AD1 CPUCADOUT0
NB0CADOUT1 E1 HT_RXD_P1
NB0CADOUT0 E3 HT_RXD_P0 HT_TXD_N15 T3 CPUCADOUTJ15
C 091222-1 HT_TXD_N14 U5 CPUCADOUTJ14 C
+1.5VS NB0CADOUTJ15 P5 HT_RXD_N15 HT_TXD_N13 V3 CPUCADOUTJ13
NB0CADOUTJ14 M4 HT_RXD_N14 HT_TXD_N12 W5 CPUCADOUTJ12
RN141 NB0CADOUTJ13 M5 HT_RXD_N13 HT_TXD_N11 AA5 CPUCADOUTJ11
LDT_PW ROK 1 4 NB0CADOUTJ12 K4 HT_RXD_N12 HT_TXD_N10 AB3 CPUCADOUTJ10
LDT_RST#_CPU 2 3 NB0CADOUTJ11 H4 HT_RXD_N11 HT_TXD_N9 AC5 CPUCADOUTJ9
NB0CADOUTJ10 H5 HT_RXD_N10 HT_TXD_N8 AD3 CPUCADOUTJ8
SRN300J-3-GP NB0CADOUTJ9 F4 HT_RXD_N9 HT_TXD_N7 R1 CPUCADOUTJ7
NB0CADOUTJ8 F5 HT_RXD_N8 HT_TXD_N6 U3 CPUCADOUTJ6
NB0CADOUTJ7 N2 HT_RXD_N7 HT_TXD_N5 U1 CPUCADOUTJ5
LDT_REQ# 2 1 R5 NB0CADOUTJ6 M1 HT_RXD_N6 HT_TXD_N4 W3 CPUCADOUTJ4
DY 300R2J-4-GP NB0CADOUTJ5
NB0CADOUTJ4
L2
K1
HT_RXD_N5
HT_RXD_N4
HT_TXD_N3
HT_TXD_N2
AA3
AA1
CPUCADOUTJ3
CPUCADOUTJ2
NB0CADOUTJ3 CPUCADOUTJ1
S1G3 & S1G4 not support LDT_REQ# NB0CADOUTJ2
H1
G2
HT_RXD_N3
HT_RXD_N2
HT_TXD_N1
HT_TXD_N0
AC3
AC1 CPUCADOUTJ0
NB0CADOUTJ1 F1 HT_RXD_N1
NB0CADOUTJ0 E2 HT_RXD_N0 HT_TXCLK_P1 Y4 CPUHTTCLKOUT1 CPUHTTCLKOUT1 9
HT_TXCLK_P0 Y1 CPUHTTCLKOUT0 CPUHTTCLKOUT0 9
NB0HTTCLKOUT1 J5 HT_RXCLK_P1
9 NB0HTTCLKOUT1 NB0HTTCLKOUT0 CPUHTTCLKOUTJ1
9 NB0HTTCLKOUT0 J3 HT_RXCLK_P0 HT_TXCLK_N1 Y3 CPUHTTCLKOUTJ1 9
091221-1 HT_TXCLK_N0 W1 CPUHTTCLKOUTJ0 CPUHTTCLKOUTJ0 9
NB0HTTCLKOUTJ1 K5 HT_RXCLK_N1
9 NB0HTTCLKOUTJ1 NB0HTTCLKOUTJ0 CPUHTTCTLOUT1
9 NB0HTTCLKOUTJ0 J2 HT_RXCLK_N0 HT_TXCTL_P1 T5 CPUHTTCTLOUT1 9
15 CPU_LDT_RST# 1 2 LDT_RST#_CPU 10 HT_TXCTL_P0 R2 CPUHTTCTLOUT0 CPUHTTCTLOUT0 9
R6 0R0402-PAD-1-GP NB0HTTCTLOUT1
1 P3 HT_RXCTL_P1
9 NB0HTTCTLOUT1 NB0HTTCTLOUT0 CPUHTTCTLOUTJ1
9 NB0HTTCTLOUT0 N1 HT_RXCTL_P0 HT_TXCTL_N1 R5 CPUHTTCTLOUTJ1 9
HT_TXCTL_N0 R3 CPUHTTCTLOUTJ0 CPUHTTCTLOUTJ0 9
15 CPU_PW RGD 1 2 LDT_PW ROK 36 NB0HTTCTLOUTJ1 P4 HT_RXCTL_N1
R7 0R0402-PAD-1-GP 9 NB0HTTCTLOUTJ1 ◦ Jabse Service Manual Search 2024 ◦ Jabse Pravopis ◦ onTap.bg ◦ Other service manual resources online : Fixya ◦ eServiceinfo