Service Manuals, User Guides, Schematic Diagrams or docs for : Intel Architecture of Pentium III
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SWAR: MMX, SSE, SSE 2
Multiplatform Programming
Relatore: dott. Matteo Roffilli
[email protected]
22 November 2002 SWAR - Programmazione 1
multipiattaforma
What's SWAR?
SWAR = SIMD Within A Register
SIMD = Single Instruction Multiple Data
MMX,SSE,SSE2,Power3DNow =
Intel\AMD implementation of SWAR
22 November 2002 SWAR - Programmazione 2
multipiattaforma
Why SWAR?
Enable parallel computing on
commercial hardware
Boost 2x your application at 0 cost
Enjoy yourself learning assembler
22 November 2002 SWAR - Programmazione 3
multipiattaforma
Why not SWAR?
Hard low-level programming
Require know out of assembler
Not portable code (yet!)
22 November 2002 SWAR - Programmazione 4
multipiattaforma
X86 Instruction Set
Pentium I
General Purpose Instruction
X87 FPU Instruction
System Instruction
22 November 2002 SWAR - Programmazione 5
multipiattaforma
General Purpose Instruction
Data transfer
Binary integer arithmetic
Decimal arithmetic
Logic operations
Shift and rotate
Bit and byte operations
Program control
String
Flag control
Segment register operations
22 November 2002 SWAR - Programmazione 6
multipiattaforma
X87 FPU Instruction
Floating-point
Integer
Binary-coded decimal (BCD) operands
22 November 2002 SWAR - Programmazione 7
multipiattaforma
SIMD Instruction
SIMD: Single Instruction Multiple Data
MMX , SSE and SSE2 instruction
provides a group of instructions that perform SIMD
operations on packed integer and/or packed floating-
point data elements contained in the 64-bit MMX, the
128-bit XMM or 128-bit MMX registers.
enables increased performance on a wide variety of
multimedia and communications applications.
22 November 2002 SWAR - Programmazione 8
multipiattaforma
What's new in Pentium II
Pentium II=Pentium I + MMX
MMX : MultiMedia Extensions
57 new instructions
Eight 64-bit wide MMX registers
Four new data types
22 November 2002 SWAR - Programmazione 9
multipiattaforma
What's new in Pentium III
Pentium III=Pentium II + SSE
SSE : Streaming SIMD Extensions
70 new instructions
three categories:
SIMD-Floating Point
New Media Instruction
Streaming Memory Instruction
22 November 2002 SWAR - Programmazione 10
multipiattaforma
The implementation of SSE
SSE has 128-bit architectural width
Double-cycling the existing 64-bit data
paths.
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