Service Manuals, User Guides, Schematic Diagrams or docs for : Intel Pentium® Processor at iCOMP® Index 567 - 66 MHz
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PENTIUM TM PROCESSOR AT iCOMP INDEX 510T60 MHz
PENTIUM TM PROCESSOR AT iCOMP INDEX 567T66 MHz
Y Binary Compatible with Large Software Y 273-Pin Grid Array Package
Base Y BiCMOS Silicon Technology
DOS OS 2 UNIX and WINDOWS
Y Increased Page Size
Y 32-Bit Microprocessor 4M for Increased TLB Hit Rate
32-Bit Addressing
64-Bit Data Bus Y Multi-Processor Support
Multiprocessor Instructions
Y Superscalar Architecture Support for Second Level Cache
Two Pipelined Integer Units
Capable of under One Clock per Y Internal Error Detection
Instruction Functional Redundancy Checking
Pipelined Floating Point Unit Built in Self Test
Parity Testing and Checking
Y Separate Code and Data Caches
8K Code 8K Write Back Data Y IEEE 1149 1 Boundary Scan
2-Way 32-Byte Line Size Compatibility
Software Transparent Y Performance Monitoring
MESI Cache Consistency Protocol Counts Occurrence of Internal
Y Advanced Design Features Events
Branch Prediction Traces Execution through Pipelines
Virtual Mode Extensions
The Pentium processor (510T60 567T66) provides the next generation of power for high-end workstations and
servers The Pentium processor (510T60 567T66) is compatible with the entire installed base of applications
for DOS Windows OS 2 and UNIX The Pentium processor's superscalar architecture can execute two
instructions per clock cycle Branch Prediction and separate caches also increase performance The pipelined
floating point unit of the Pentium processor (510T60 567T66) delivers workstation level performance Sepa-
rate code and data caches reduce cache conflicts while remaining software transparent The Pentium proces-
sor (510T60 567T66) has 3 1 million transistors and is built on Intel's 0 8 Micron BiCMOS silicon technology
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