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                                                   Number 2535


Application Note                                   Monitoring Channel Hot Carrier (CHC)
           Series                                  Degradation of MOSFET Devices using
                                                   Keithley Model 4200-SCS
Introduction                                                                                            Pre-Stress
                                                                                                      characterization
Channel Hot Carrier (CHC) induced degradation is an important
reliability concern in modern ULSI circuits. Charge carriers gain                                          Fail?
                                                                                                                         Yes
                                                                                                                                       Stop
kinetic energy as they are accelerated by the large electric field                                             No
across the channel of a MOSFET. While most carriers reach the                                           Record data
drain, hot carriers (those with very high kinetic energy) can gen-
erate electron-hole pairs near the drain due to impact ionization                                         Stress
                                                                                                                                 Yes
from atomic-level collisions. Others can be injected into the gate
                                                                                                           Fail?
channel interface, breaking Si-H bonds and increasing interface
                                                                          Increase stress time                 No
trap density. The effect of CHC is time dependant degradation of
                                                                                                        Interim test
device parameters, such as V T, IDLIN, and IDSAT.
    This channel hot carrier induced degradation (also called                                           Record data

HCI or hot carrier injection) can be seen on both NMOS and                                  No                             Yes
                                                                                                         Fail/Exit
PMOS devices and will affect device parameters in all regions,
such as V T, sub-threshold slope, Id-on, Id-off, Ig, etc. The rate of
degradation of each parameter over stress time depends on the           Figure 2. Typical CHC test procedure
device layout and process used.
                                                                             Stress bias conditions are based on worst-case degradation
                                            Vg
                                                                        bias conditions, which are different for NMOS and PMOS FETs.
                                                                        Typically, for drain voltage stress, it should be less than 90% of
                                     Poly-Si             Vd             the source drain breakdown voltage. Then, at the drain stress
                                       

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