Service Manuals, User Guides, Schematic Diagrams or docs for : Keithley Appnotes 2621 RF Wafer Testing
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A G R E AT E R M E A S U R E O F C O N F I D E N C E candidate for high frequency testing. They
are extremely complicated, yet susceptible
to end market pricing pressures. This makes
them highly sensitive to testing costs in pro-
duction, where functional tests are conducted
under low bias conditions from 1GHz up to
40GHz, depending on their design and appli-
cation. RF measurements have been limited
to functional tests of packaged parts at the
end of the line, as this testing is perceived
as high cost and problematical in terms of
repeatable, accurate results.
IC fabricators can also use RF wafer
level measurements to extract figure of merit
parameters on various high performance
RF Wafer Testing:
analog circuits at the 180nm node and be-
yond. SOCs that combine memory with RF,
analog, and high speed digital devices have
An Acute Need, and
comparable RF test requirements.
Characterizing equivalent oxide thick-
ness (EOT) on high-D gate dielectrics is crit-
Now Practical ical in high performance logic devices at the
130nm node and beyond, in the development
of new materials, and for continued scaling
of future IC generations. For example, RF
measurements can play an important role in
Carl Scharrer, Keithley instruments, inc. accurate modeling of dielectrics and their
behavior in MPU, ASIC, FPGA, and DSP
L
devices. This has been done on prior genera-
eAdiNg semiconductor producers the use of RF techniques are predicated on tions of technology using multi-frequency ca-
have recently conceded that wafer the assumption that they cannot be made ef- pacitance measurements and with advancing
level RF measurements are acutely fectively, particularly in a production envi- technology there has been a shift to high-fre-
needed to develop and produce ad- ronment, which may have been the case in quency capacitance (HFCV) measurements.
vanced ICs. To a certain degree, the past. However, new parametric test sys- However, HFCV is inadequate for ultrathin
this flies in the face of the 2003 recommen- tems now make fast, accurate, and repeat- dielectrics, one reason being that the HFCV
dations by the ITRS Technical Working able RF parameter extraction almost as easy instrument (not the DUT) introduces a series
Group for Modeling and Simulation, which as DC testing. In fact, one system can take resistance into the measurement.
states, "The parameter extraction for RF precise DC and RF measurements simulta-
compact models preferably tries to mini- neously, making it suitable for both lab and Challenges in Standard i-V and
mize RF measurements. Parameters should production use. C-V Measurements
be extracted from standard I-V and C-V RF parameters extracted from s-parame-
measurements with supporting simulations, RF Testing Apps ter data are included in compact simulation
if needed." The problem is that standard Whether you are manufacturing RFICs models used by design engineers during
I-V and C-V measurements make the direct on III-V wafers for cell phone modules or product development. However, manufac-
extraction of COX impossible for ultra-thin high performance analog on silicon-based turers have taken wafer level s-parameter
dielectrics due to high leakage currents and technology, predicting final product perfor- data only in device modeling labs, due to
non-linearities. Yet, accurate parameter ex- mance and reliability requires wafer level the complex nature of the measurements
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