Service Manuals, User Guides, Schematic Diagrams or docs for : LENOVO Laptop E46L_QD-LL6_R1A_20090715
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1 2 3 4 5 6 7 8
LL6_MV Montevina Block Diagram
PCB STACK UP
6L 01
LAYER 1 : TOP CPU THERMAL
CPU SENSOR
pg05
LAYER 2 : GND Penryn 14.318MHz
A A
LAYER 3 : IN1
478P (uPGA)/35W
LAYER 4 : IN2 pg04~05 CLK_CPU_BCLK,CLK_CPU_BCLK#
CLK_MCH_BCLK,CLK_MCH_BCLK# CLOCK GEN
LAYER 5 : VCC DREFCLK,DREFCLK#
FSB 667/800/1066
LAYER 6 : BOT DREFSSCLK,DREFSSCLK#
pg03
NORTH BRIDGE
DDRIII-SODIMM1 DDRIII 800/1066 MT/s
pg11 CRT
Cantiga pg18
POWER
DDRIII-SODIMM2 DDRIII 800/1066 MT/s
B Dual Link B
CPU CORE(ISL6266A) LCD CONN
pg12
pg36 pg17
pg06~10
VCCP +1.8V AND GMCH
32.768KHz
1.05V(RT8204) DMI LINK
pg34
USB2.0
DDR III (TPS51116REGR) SATA - HDD
SATA0 300MB
1.5VSUS/SMDDR_VTERM pg22
/SMDDR_VREF USB2.0 Ports BlueTooth Fingerprint Camera Card Reader
pg33
SOUTH BRIDGE X4 CON. pg26 CON. pg26 CON. pg17 RTS5159
SYSTEM DISCHARGE SATA - CD-ROM
SATA1 300MB pg23 pg21
pg31 pg22
ICH-9M
SYSTEM POWER(ISL6237) 12MHz
E-SATA
SATA4 300MB
pg35
C pg23 PCI-E C
SYSTEM CHARGER(MAX8731A) X2 X1 X1
pg32 Azalia
pg13~16 Mini PCI-E Express
Card X 2 Broadcom Card
10/100M/1G
Audio Codec BCM57780 (NEW CARD)
LPC IDT ( WLAN / WWAN )
32.768KHz
92HD81
pg19 pg25
pg20
EC (ITE)
RJ45 CONN
Keyboard (IT8502E) pg19
Touch Pad pg28
WLAN WWAN
(H/S) (F/S)
pg27
D pg24 pg24 D
FAN SPI Internal Micphone Head-Phone PROJECT : LL6
EEPROM Microphone Jack Jack Quanta Computer Inc.
pg29 pg27 pg20 pg20 pg20 Size Document Number Rev
Custom 1A
Block Diagram
Date: Wednesday, July 15, 2009 Sheet 1 of 36
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
POWER PLANE VOLTAGE PAGE
Power States
DESCRIPTION
CONTROL
SIGNAL
ACTIVE IN
02
A VIN 10V~+19V 18,33,34,35,36,37,38,39 MAIN POWER S0~S5 A
+3VRTC +3.0V~+3.3V 13,16,32 RTC S0~S5
3VPCU +3.3V 13,18,22,24,30,32,33,34,36,37 8051 POWER S0~S5
5VPCU +5V 30,33,34,35,36,37,38 LCD/CHARGE POWER S0~S5
+15V +15V 18,26,33,37 LARGE POWER 5VPCU S0~S5
LANVCC +3.3V 22,33 LAN POWER LAN_ON
5VSUS +5V 18,30,33,38 SLP_S5# CTRLD POWER SUSON
3VSUS +3.3V 14,15,27,28,29,32,33,38 SLP_S5# CTRLD POWER SUSON
B 1.8VSUS +1.8V 10,33,36 SUSON B
1.5VSUS +1.5V
07,09,10,11,12,33,35 SODIMM POWER CALISTOGA/ICH8 POWER SUSON
SMDDR_VREF_DIMM +0.75V 11,12 SODIMM POWER
+5V +5V 16,17,18,19,21,23,24,25,32,33,34 SLP_S3# CTRLD POWER MAINON
03,05,07,10,11,12,13,14,15,16,17,18,19
,20,21,22,23,24,25,26,27,28,29,30,31,32,
+3V +3.3V 33,34,35,36,37,38 SLP_S3# CTRLD POWER
MAINON
+1.5V +1.5V 05,10,13,14,15,16,21,27,28,29,35 CALISTOGA/ICH8 POWER MAINON
+1.05V +1.05V 03,04,05,06,07,09,10,13,16,33,36,38 CPU/CALISTOGA/ICH8 POWER MAINON
C VCC_CORE +0.7V~+1.77V 04,05,33,38 CPU CORE POWER VRON C
INT_DISP_ON
LCDVCC +3.3V 18 LCD Power
HDD Power MAINON
+5VHDD +5V 23
D/C#
MBATV +10V~+17V 32,34 MAIN BATTERY
D D
PROJECT : LL6
Quanta Computer Inc.
Size Document Number Rev
B 1A
FRON TPAGE
Date: Wednesday, July 15, 2009 Sheet 2 of 36
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
(5,7,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,34,35,36) +3V
+3V
03
(4,5,6,7,9,10,13,16,30,31,34,36) +1.05V
L10
+3V_CK_MAIN
HCB1608KF-181T15
C147
C150 C149 C148 C170 C183
10U/6.3V/X5R_8 0.1U/10V/X5R_4 0.1U/10V/X5R_4 0.1U/10V/X5R_4 0.1U/10V/X5R_4 0.1U/10V/X5R_4
U7
+3V
+3V_CK_MAIN 23 61
A VDDPLL3 CPUCLKT0 CLK_CPU_BCLK (4) A
L11 16 60
VDD48 CPUCLKC0 CLK_CPU_BCLK# (4)
+3V_CK_CPU 9
HCB1608KF-181T15 4
VDDPCI
VDDREF
CK505 CPUCLKT1 58 CLK_MCH_BCLK (6)
46 57 +3V +3V
VDDSRC CPUCLKC1 CLK_MCH_BCLK# (6)
C167 C164 +3V_CK_CPU 62
10U/6.3V/X5R_8 0.1U/10V/X5R_4 VDDCPU
CPUT2_ITP/SRCT8 54
+3V_CK_MAIN2 19 53
VDD96I/O CPUC2_ITP/SRCC8
27
VDDPLL3I/O R137 R144
33 VDDSRCI/O DOTT_96/SRCT0 20 DREFCLK (7)
43 21 10K_4 10K_4
VDDSRCI/O DOTC_96/SRCC0 DREFCLK# (7)
52 VDDSRCI/O
+1.05V 24
27MHz_Nonss/SRCCLK1/SE1 DREFSSCLK (7)
56 25 PM_STPPCI#
VDDCPU_IO 27Mhz_ss/SRCCLC1/SE2 DREFSSCLK# (7)
L16 55 PM_STPCPU#
+3V_CK_MAIN2 NC
28 CLK_PCIE_SATA (13)
HCB1608KF-181T15 SRCCLKT2/SATACL
29 CLK_PCIE_SATA# (13)
C162 C173 C184 C189 C175 C172 CG_XIN SRCCLKC2/SATACL
3 X1
C190 CG_XOUT 2 31
X2 SRCCLKT3/CR#_C CLK_PCIE_WWAN (24)
10U/6.3V/X5R_8 0.1U/10V/X5R_4 0.1U/10V/X5R_4 0.1U/10V/X5R_4 0.1U/10V/X5R_4 0.1U/10V/X5R_4 0.1U/10V/X5R_4 32
SRCCLKC3/CR#_D CLK_PCIE_WWAN# (24)
34 CLK_PCIE_LAN (19)
R122 *100K_4 SRCCLKT4
SRCCLKC4 35 CLK_PCIE_LAN# (19)
63 45 PM_STPPCI#
(15) CK_PWG CK_PWRGD/PD# PCI_STOP# PM_STPPCI# (15)
+3V CPU_BSEL1 64 44 PM_STPCPU#
FSLB/TEST_MODE CPU_STOP# PM_STPCPU# (15)
48 CLK_PCIE_ICH (14)
SRCCLKT6
47 CLK_PCIE_ICH# (14)
SRCCLKC6
R129 R127 7 51
B (11,12) CGCLK_SMB SCLK SRCCLKT7/CR#_F CLK_PCIE_MINI (24) B
Q11 10K_4 10K_4 6 50
SDATA SRCCLKC7/CR#_E CLK_PCIE_MINI# (24)
2
2N7002 (11,12) CGDAT_SMB
SRCCLKT9 37 CLK_PCIE_3GPLL (7)
3 1 CGDAT_SMB 22 38
(15) PDAT_SMB GND SRCCLKC9 CLK_PCIE_3GPLL# (7)
26 GND
18 GND48 SRCCLKT10 41 CLK_PCIE_NEW_C (25)
59 42 CLK_PCIE_NEW_C# (25)
+3V GNDCPU SRCCLKC10
15
GNDPCI R_NEW-CARD_CLK_REQ# R135 475/F_4 NEW-CARD_CLK_REQ#
1 40 NEW-CARD_CLK_REQ# (25)
Q10 GNDREF SRCCLKT11/CR#_H R_CLK_MCH_OE# R134 475/F_4 CLK_MCH_OE#
30 39 CLK_MCH_OE# (7)
GNDSRC SRCCLKC11/CR#_G
2
2N7002 36
GNDSRC
49
CGCLK_SMB GNDSRC R_PCLK_LPC_8512 R112 33_4 PCLK_LPC_8512
(15) PCLK_SMB 3 1 8 PCLK_LPC_8512 (27)
PCICLK0/CR#_A R_CLK_LAN_OE# R111 475/F_4 PCIE_LANREQ#
PCICLK1/CR#_B 10 PCIE_LANREQ# (19)
11 TME R99 33_4 PCLK_LPC_DEBUG
PCICLK2/TME PCLK_LPC_DEBUG (24)
12 R_PCLK_KBC R97 33_4 PCI_CLK_SIO
PCICLK3 PCI_CLK_SIO (28)
13 27M_SEL
PCICLK4/27_SELECT
Y1 65 ITP_EN R95 33_4 PCLK_ICH
EPAD PCLK_ICH (14)
CG_XIN 1 2 CG_XOUT
14 R121 22_4 CLK_48M_USB
PCI_F5/ITP_EN CLK_48M_USB (15)
14.318MHZ R119 22_4 CLK_48M_CARD
CLK_48M_CARD (21)
17 FSA R117 2.2K_4 CPU_BSEL0
C146 C152 USB_48MHZ/FSLA R108 10K_4 CPU_BSEL2
27P/50V/NPO_4 27P/50V/NPO_4 5 FSC R107 22_4 CLK_14M_ICH
+3V FSLC/TST_SL/REF CLK_14M_ICH (15)
R106 22_4 CLK_SIO_14M
CLK_SIO_14M (28)
SLG8SP513VTR
C R98 +3V C
10K_4
TME=High
OC of CPU and SRC are not allowed. NEW-CARD_CLK_REQ# R143 10K_4
TME R92 *10K_4 CLK_MCH_OE# R142 10K_4
27M_SEL PCIE_LANREQ# R100 10K_4
CLKREQ SRC Port
R96 CLK_MCH_OE# SRC4
10K_4
CR#_B SRC 1,4
27M_SEL= LOW UMA CR#_A SRC 0,2 CLK_LAN_OE# SRC2
CR#_G SRC 9 CLK_SATA_OE# SRC9
C143 *27P/50V/NPO_4 PCLK_LPC_8512
CR#_H SRC 10 CLK_MINI_OE# SRC10
C138 *27P/50V/NPO_4 PCLK_ICH
C140 *27P/50V/NPO_4 PCLK_LPC_DEBUG
CPU_BSEL0 R116 *short_4 C157 *27P/50V/NPO_4 CLK_48M_USB
(4) CPU_BSEL0 MCH_BSEL0 (7)
ITP_EN R_PCLK_KBC C153 *27P/50V/NPO_4 CLK_48M_CARD
C142 *27P/50V/NPO_4 CLK_14M_ICH
R113 *1K_4
C139 *27P/50V/NPO_4 PCI_CLK_SIO
R109 R110 CPU_BSEL1 R118 *short_4
D (4) CPU_BSEL1 MCH_BSEL1 (7) D
10K_4 *10K_4 C141 *27P/50V/NPO_4 CLK_SIO_14M
+1.05V R114 *1K_4
CPU_BSEL2 R93 *short_4
(4) CPU_BSEL2 MCH_BSEL2 (7)
PROJECT : LL6
+1.05V R94 *1K_4 Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Clock Generator
Date: Wednesday, July 15, 2009 Sheet 3 of 36
1 2 3 4 5 6 7 8
5 4 3 2 1
(3,5,6,7,9,10,13,16,30,31,34,36) +1.05V
(6) H_A#[35:3]
H_A#3
H_A#4
J4
L5
U21A
A[3]# ADS# H1
E2
TP37
H_ADS# (6) (6) H_D#[63:0]
U21B H_D#[63:0]
04
A[4]# BNR# H_BNR# (6)
ADDR GROUP 0
H_A#5 L4 G5 H_D#0 E22 Y22 H_D#32
D A[5]# BPRI# H_BPRI# (6) D[0]# D[32]# D
H_A#6 K5 H_D#1 F24 AB24 H_D#33
H_A#7 A[6]# H_D#2 D[1]# D[33]# H_D#34
M3 A[7]# DEFER# H5 H_DEFER# (6) E26 D[2]# D[34]# V24
H_A#8 N2 F21 H_D#3 G22 V26 H_D#35
A[8]# DRDY# H_DRDY# (6) D[3]# D[35]#
H_A#9 J1 E1 H_D#4 F23 V23 H_D#36
A[9]# DBSY# H_DBSY# (6) D[4]# D[36]#
H_A#10 N3 H_D#5 G25 T22 H_D#37
H_A#11 A[10]# H_D#6 D[5]# D[37]# H_D#38
P5 A[11]# BR0# F1 HBREQ#0 (6) E25 D[6]# D[38]# U25
DATA GRP 0
DATA GRP 0
DATA GRP 2
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