Service Manuals, User Guides, Schematic Diagrams or docs for : LENOVO Laptop LENOVO_E255
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5 4 3 2 1
8081 MB R01
Project Code : G072
Clock Generator SMB Thermal Sensor CPU
Product Code : 6785 ICS950810 H8 ADM1021A Intel Banias
D
Micro-FCPGA D
PAGE01 Block Diagram
PAGE02 Mounting Hole
PAGE03 Banais
PAGE04 Clock Generator FSB
PAGE05 Montara_GM(1) 400
PAGE06 Montara_GM(2) SO-DIMM * 1 On Board
PAGE07 SO-DIMM Cells
PAGE08 On Board DDR 256MB
RGB
PAGE09 DDR Termination CRT Connector
Montara-GM
PAGE10 ICH4-M(1) GMCH 266-MHz
PAGE11 ICH4-M(2)
PAGE12 HDD & CD_ROM
LVDS 732 pin
PAGE13 Audio Codec(CMI9738S) TFT Flat Panel Micro-FCBGA
PAGE14 OP AMP(APA2020)
PAGE15 LCD & CRT connector
PAGE16 LAN(VT6105LOM) & MDC
PAGE17 Mini PCI
PAGE18 CardBus & 1394(R5C551) IDE to USB
Hub Interface
C
PAGE19 Super IO(PC87393) C
NEC
PAGE20 Micro Controller(H8_3437) uPD720130
PCI Bus
PAGE21 USB to IDE(UPD720130) (OPTION)
PAGE22 BIOS & Inverter & LED USB * 1(OPTION)
P-IDE
PAGE23 Power On Control Logic Transformer
HDD
PAGE24 1.2V & 1.5V(SC338) & 1.8V CardBus & 1394
1394 * 1
PAGE25 1.25V (LP2996) LAN Controllor
R5C551 VT6105LOM ICH4-M
PAGE26 2.5V & 1.05V(LTC3728L) RJ-45
R5C485(OPTION) 421 pin BGA S-IDE
PAGE27 3V & 5V(LTC3728L)
PAGE28 CPU_CORE(MAXIM1907)
Power CD-ROM
Switch
G571 AC Link USB2.0*4
MDC
RJ-11 Daughtor Board
USB
PCMCIA Slot * 1 Connector
LPC Bus
Mini PCI Slot * 1
AC'97 Codec
CMI9738S
Super I/O
B
PC87393 PIO B
Audio Amp DEBUG LED
APA2020ARI
ISA Bus
Mic-in
Connector
Internal Speaker
System
BIOS PS/2
Touch Pad
+5V/+3V AC-Adapter Keyboard BIOS
Headphone Hitachi
+2.5V/+1.05V Connector H8/3437S
KEY MATRIX
Internal
D/D Power Keyboard
+1.25V
+1.2V/+1.5V BATT-Adapter
1.8V
A A
+CPU_CORE Charger
Title
Block Diagram
Size Document Rev
C 411678500006 01
Number
Date: Wednesday, June 11, 2003 Sheet 1 of 28
5 4 3 2 1
5 4 3 2 1
REV Change detail DATE ECR No.
+3V +2.5V_DDR R00 Initail release (base on PUMA) 2003/05/02
R01 1.Change PR4 ,PR29 and PR45 to 470 ohm for SUSB# signal quality.
2.LAN signal add fuse to protect LAN transformer.
1
1
1
1
1
1
1
1
EC1 EC2 EC4 EC6 EC7 EC9 EC27 EC28 +1.2V
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U +5V 0.1U 0.1U 3.Modify U533 control signal(SUSC# and 2 * 2N7002) for leakage
0603 0603 0603 0603 0603 0603 0603 0603
50V 50V 50V 50V 50V 50V 50V 50V current.
2
2
2
2
2
2
2
2
4.Remove R98 for leakage current and change pull high to +3V.
5.Change R202 and R217(M/B ID) pull high to +VDD3.
D 6.Change Q24 pin2 pull high to +EXT3V. D
VT6105LOM(LAN) 7.Change R777 and R778 to 6.8K for CD ROM audio noise.
IDSEL: AD18 +3V +VCC_CORE +VCCP +1.2V 8.Inverter input voltage add VMAIN option for future use.
PCI REQ1#
PCI GNT1# 9.Change Q517 to 2N7002 and rename Q33 for LED flash issue.
PCI INTE# 10.Change U522 power to +AVDDAD, C753 to AGND, R736 to AGND.
1
1
1
1
1
1
1
EC10 EC11 +VCC_CORE EC12 EC13 +VCCP EC14 +1.5V EC25 EC26 +1.5V 11.Change J10(MIC) pin6 to CAGND.
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
0603 0603 0603 0603 0603 0603 0603 12.Reserve band pass tuning capacitor.(Page 13)
50V 50V 50V 50V 50V 50V 50V
2
2
2
2
2
2
2
Mini PCI 13.Add a resistor on CD LED# signal to prevent signal O.D.
IDSEL: AD17 14.Delete M/B to charger BD connector USB signal reserver
PCI REQ3# resistors and connector origanl pin to GND. 2003/05/26
PCI GNT3# 15.Add a resistor(1M) and change R505 to 47K ohm and rename
PCI INTD# INTF# R507 for divided DVMAIN to tuen on LCDVCC MOS.(Reserved)
16.Reserve a regulator for audio +5V input.
17.Modify back light circuit.
R5C551 18.Re-assign M/B to Charger BD pin.
+VCCP +1.5V +2.5V_DDR
IDSEL: AD20 19.Change R766 pull high to +VA.
PCI REQ2#
PCI GNT2# 20.Add R505 between CLK_DDR3/CLK_DDR3# and R686 between
CLK_DDR4/CLK_DDR4#
PCI INTB# INTG#
1
1
1
1
1
1
1
1
1
1
EC15 EC16 EC17 EC18 EC19 EC20 EC21 EC22 EC23 EC24 +3V
0.1U 0.1U 0.1U 0.1U 0.1U +3V 0.1U 0.1U 0.1U +3V 0.1U 0.1U
0603 0603 0603 0603 0603 0603 0603 0603 0603 0603
50V 50V 50V 50V 50V 50V 50V 50V 50V 50V
2
2
2
2
2
2
2
2
2
2
C C
MTG503
AM20-45
1
GND
MTG21 MTG22
ID2.2/OD4.5 ID2.2/OD4.5 For MDC Only
CPU
MTG501 MTG502 MTG12 MTG13
ID4.5/OD9.0 ID4.5/OD9.0
1
1
AM20-30 AM20-30
B B
MTG3
ID3.0/OD7.0/SLD9.0
3
2
1
3
2
1
3
2
1
1
1
13 13 13
4 12 MTG23 MTG24 4 12 4 12
5 11 ID2.2/OD4.5 ID2.2/OD4.5 5 11 5 11
6 10 6 10 6 10
GND GND
7
8
9
1
1
7
8
9
7
8
9
MTG1 MTG2 MTG4 MTG5 MTG10
ID3.0/OD7.0/SLD9 ID3.0/OD7.0/SLD9 ID3.0/OD7.0/SLD9 ID3.0/OD7.0/SLD9 ID3.0/OD7.0/SLD9
GND GND
1
1
1
1
1
PCM_GND MTG14 MTG15
ID4.5/OD9.0 ID4.5/OD9.0
AGND CAGND GND GND GND
3
2
1
3
2
1
13 13
MTG6 MTG7 4 12 4 12
ID3.0/OD7.0/SLD9.0 ID3.0/OD7.0/SLD9.0 MTG8 MTG9 MTG11 5 11 5 11
3
2
1
3
2
1
13 13 ID3.0/OD7.0/SLD9 ID3.0/OD7.0/SLD9 ID3.0/OD7.0/SLD9 6 10 6 10
4 12 4 12
5 11 5 11 CD-ROM
7
8
9
7
8
9
6 10 6 10
1
1
1
7
8
9
7
8
9
GND GND
GND GND_45 GND
A A
GND GND
MTG17 MTG18
ID1.5/OD3 ID1.5/OD3
FD4 FD2 FD3 FD1 FD501 FD504 FD502 FD503
FIDUCIAL-MARK FIDUCIAL-MARK FIDUCIAL-MARK FIDUCIAL-MARK FIDUCIAL-MARK FIDUCIAL-MARK FIDUCIAL-MARK FIDUCIAL-MARK
1
1
1
1
1
1
1
1
1
1
GND_45 GND Title
Mounting Hole
Size Document Rev
C 41167******* 01
Number
Date: Wednesday, June 11, 2003 Sheet 2 of 28
5 4 3 2 1
5 4 3 2 1
VCC : PROCESSOR CORE POWER SUPPLY. U504C
VCCA : ISOLATE POWER FOR INTERNAL PLL. +VCC_CORE A2 J22
VSS_0 VSS_73
A5 J24
U504B VSS_1 VSS_74
VCCP : PROCESSOR I/O POWER SUPPLY. A8
VSS_2 VSS_75
K2
4 HCLK_CPU B15 D6 A11 K5
BCLK0 VCC_0 VSS_3 VSS_76
VCCQ : QUIET POWER SUPPLY FOR ON DIE COMP CKT. 4 HCLK_CPU# B14
BCLK1 VCC_1
D8 A14
VSS_4 VSS_77
K21
D18 A17 K23
HBPM#0 VCC_2 VSS_5 VSS_78
4 HBPM#0 C8 D20 A20 K26
HBPM#1 BPM0# VCC_3 VSS_6 VSS_79
4 HBPM#1 B8 D22 A23 L3
HA#[3..31] HD#[0..63] 0 0603 1 BPM1# VCC_4 VSS_7 VSS_80
5 HA#[3..31] HD#[0..63] 5 2 R574 A9 E5 A26 L6
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