Service Manuals, User Guides, Schematic Diagrams or docs for : LENOVO Laptop Lenovo ThinkPad Edge E10 (Intel) - Quanta FL6 MK2-Intel 0623 (DDR3) - Rev 1C - 2010
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5 4 3 2 1
PCB STACK UP 8L
LAYER 1 : TOP MK2/DU-1-Note Block Diagram -- Intel Calpella
LAYER 2 : SGND
LAYER 3 : IN1
Clock
LAYER 4 : IN2 Arrandale CPU DDR3 SO-DIMM 1 STD Gengerator
D
Thermal Page 17
D
LAYER 5 : SVCC
SFF ICS9LRS3197
LAYER 6 : IN3 Sensor Page 03
LAYER 7 : SGND1
Page 30 Page 4, 5, 6, 7, 8, 9, 10 DDR3 SO-DIMM 2 RVS
Page 18
LAYER 8 : BOT
25MHz
DMI X 4 FDI
LVDS PCI-e/USB WLAN
11.6" HD Mini PCIe Slot Page 26 Module
(1366x768) LCD or
Page 19
PCH PCI-e/USB WWAN
RGB
Mini PCIe Slot Page 27 Module
SIM Card
Page 27
C
CRT Page 20 C
Digital
Level Shifter Display PCI-e 10/100/1G
HDMI
Page 21
PS8101 Page 21
Ethernet RJ-45
Realtek
HD Ibex Peak-M Page 21
HP/Mic HDA CODEC Audio
RTL8111DL Page 21
Intel(R) 5 Series
Audio CX20582-11z 2.5" HDD /
Express Chipset
32.768KHz
Page 22
Jack 22
Page
SATA
SSD Module
(Option) Page 23
Internal Internal
B
MIC 22 SPK Card Reader
B
Page Page 22
USB 3 in 1 Socket
Realtek SD/MMC/MS/MS-Pro
27 mm x 25 mm FCBGA
SPI RTS5159 Page 25 Page 25
ME FW 32.768KHz
Page 11, 12, 13, 14, 15, 16
Page 12
LPC BUS USB USB PORT X 3
Page 24
SPI
ITE8502E
Flash USB
Page 32 Page 32
Camera Conn. Camera Module
Page 19
A
Accelerometer USB Bluetooth A
Int. KB T/P Battery Charger
(APS)
Page 29 Page 28 Page 28 Page 34 Page 34
(BDC-2) Page 29
PROJECT :MK2-Intel
Quanta Computer Inc.
Size Document Number Rev
Custom BLOCK DIAGRAM 1C
Date: Wednesday, June 23, 2010 Sheet 1 of 42
5 4 3 2 1
5 4 3 2 1
02
INDEX Power States
CONTROL
POWER PLANE VOLTAGE PAGE DESCRIPTION ACTIVE IN
PAGE# DESCRIPTION NOTE SIGNAL
VIN 10V~+20V 23,32,43,44,45,46,47,48,49,50 MAIN POWER S0~S5
1 BLOCK DIAGRAM
+3VRTC +3.0V~+3.3V 9,12,41 RTC S0~S5
2 SYSTEM INFORMATION
3VPCU +3.3V 9,23,27,30,32,35,39,41,43,44,47 ITE8052 POWER 3V5V_EN S0~S5
D 3 Clock Generator D
5VPCU +5V 14,43,44,45,46,47,49,50 DC/DC POWER IC SOURCE 3V5V_EN S0~S5
4 Processer 1/7(HOST&PCI)
+15V +15V 23,38,43,45,46,47 LARGE POWER 3V5V_EN S0~S5
5 Processer 2/7(DDR3)
LANVCC +3.3V 27,43 LAN POWER LAN_ON
6 Processer 3/7(POWER1)
5V_S5 +5V 12,29,30,43 PCH SUS POWER S5_ON S0~S3
7 Processer 4/7(POWER2)
3V_S5 +3.3V 8,9,10,11,12,43,52 Sys Management,PCH Resume S5_ON
8 Processer 5/7(POWER3) Well,Intel HD Audio,USB,WLAN S0~S3
WiMAX POWER
9 Processer 6/7(CFG)
5VSUS +5V 23,39,43,48 SLP_S4# CTRLD POWER SUSON S0~S3
10 Processer 7/7(GND)
3VSUS +3.3V 14,15,30,34,41,43,49 SLP_S4# CTRLD POWER SUSON S0~S3
11 PCH 1/6 (DMI&VIDEO)
1.5VSUS +1.5V 4,6,14,15,43,45,46,49,50 SODIMM POWER SUSON S0~S3
12 PCH 2/6 (SATA&HDA&JTA)
0.75VSMDDR_VTERM +0.75V 14,15,43,45 DDR3 SODIMM REFERENCE POWER MAIN_ON S0
13 PCH 3/6 (PCI)
+5V +5V 12,18,23,24,25,26,28,35,37,41,43,44 SLP_S3# CTRLD POWER MAIN_ON S0
14 PCH 4/6 (GPIO)
3,4,8,9,10,11,12,14,15,17,23,25,26,27,28,29,
30,31,32,33,34,36,37,38,39,40,41,43,44,45,46 SLP_S3# CTRLD POWER MAIN_ON
C 15 PCH 5/6 (POWER) +3V +3.3V S0 C
,47,48,50,52
16 PCH 6/6 (GND) MAIN_ON
+1.8V +1.8V 6,12,17,18,21,22,33,43,50 LVDS,NVM POWER S0
17 DDR3 (A) SO-DIMM RVS MAIN_ON
+1.5V +1.5V 12,18,19,20,31,32,34,45,46 Mini PCIe,Express Card POWER S0
18 DDR3 (B) SO-DIMM STD
+1.05V_VTT +1.05V 4,6,11,12,43,46,48,52 AuBurndale VTT POWER MAIN_ON S0
19 LCD/CAMERA
+1.05V_PCH +1.05V 3,10,12,43,46,52 PCH CORE POWER 1.05V_RUN_ON S0
20 CRT/HDMI CONN
+VCC_GFX_CORE +0.9V~+1.2V 18,21,43,49 VGA CORE POWER GFXVR_EN S0
21 LAN(RTL8103EL/8111DL)
VCC_CORE 6,43,48 CPU CORE POWER VRON S0
22 AUDIO (CX20582, SPK)
LCDVCC +3.3V 23 LCD Power ENVDD S0
23 SATA HDD
+5V_HDD +5V 28 HDD Power MAIN_ON S0
24 USB x 3
BAT-V +10V~+17V 44 MAIN BATTERY CHG_PBATT S0~S5
25 Card Reader-RTS5159
26 WLAN
B 27 WWAN B
28 KB/TP
29 BT/G-SENSOR
30 FAN/Thermal
31 SW/LED/RFID_EEPROM
PCH SM BUS KBC(EC) SM BUS
32 KBC IT8502E SB710 SMBUS SMBUS Function Define KBC SMBUS SMBUS Function Define
(+3VPCU)
33 Screw Hole/EMI MBCLK
SMBCLK0 BATTERY (+3VPCU)
DDR / DDR THER / CLOCK GEN MBDAT
34 POWER_Charger (ISL88731A) SMBDAT0
35 POWER_3V/5V (RT8206BGQW) (+3V) 2ND_MBCLK CPU THER SENSOR(+3V)
2ND_MBDATA EC EEPROM (+3VPCU)
36 POWER_CPU CORE (RT8152C) SMBCLK1
LAN IC//WI-FI
SMBDAT1
37 POWER_DDR3 (UP6163AQAG) 3ND_MBCLK
(+3V_S5) G-SENSOR(+3VS5)
3ND_MBDATA
38 POWER_1.05V&1.8V RT8204CG
SMBCLK2
A
39 POWER_Discharge SMBDAT2 not used A
(+3V_S5)
40 POWER_GFX_CORE (RT8152C)
41
42
PROJECT :MK2-Intel
Quanta Computer Inc.
Size Document Number Rev
Custom 1C
Date: Wednesday, June 23, 2010 Sheet 2 of 42
5 4 3 2 1
1 2 3 4 5 6 7 8
[4,11,12,13,14,15,17,18,19,20,21,22,23,25,26,27,29,30,31,32,33,35,36,38,39] +3V
03
[4,6,7,11,12,13,14,15,38,39,40] +1.05V_VTT
+3V U13
A L15 +CK_VDD_MAIN 1 A
HCB1608KF-181T15_6 VDD_DOT
5 23
C351 C359 C270 C275 C352
+VDDIO_CLK
17
24
VDD_27
VDD_SRC CK505 CPU-0
CPU-0# 22
CLK_BUF_BCLK_P [13]
CLK_BUF_BCLK_N [13]
0.047U/10V/X7R_4 4.7U/10V/X5R_8 4.7U/10V/X5R_8 0.1U/10V/X5R_4 0.1U/10V/X5R_4 VDD_CPU
29 20
15
VDD_REF
VDD_SRC_IO
QFN32 CPU-1
CPU-1# 19
18 VDD_CPU_IO
2 VSS_DOT DOT96 3 CLK_BUF_DREFCLK [13]
C353 C320 C357 C279 8 4
VSS_27 DOT96# CLK_BUF_DREFCLK# [13]
9 VSS_SATA
0.1U/10V/X5R_4 0.1U/10V/X5R_4 2.2U/6.3V/X5R_6 0.1U/10V/X5R_4 12 10
VSS_SRC SRC-1/SATA CLK_BUF_PCIE_3GPLL [13]
21 11 CLK_BUF_PCIE_3GPLL# [13]
VSS_CPU SRC-1#/SATA
26 VSS_REF
13 CLK_BUF_DREFSSCLK [13]
+3V SRC-2
14 CLK_BUF_DREFSSCLK# [13]
SRC-2#
R104 10K_4 16 6
CK_PWRGD_R CPU_STOP# 27M
25 7
CLK_ICH_14M R152 33_4 CPU_SEL CK_PWRGD/PD# 27M_SS
[13] CLK_ICH_14M 30 REF_0/CPU_SEL
Place the 33 ohm C330 XTAL_OUT 27
XTAL_IN XOUT
resistors close to the CK 505 28
*10P/50V/COG_4 XIN
CGDAT_SMB 31 33
CGCLK_SMB SDATA GND
32
SCLK
ICS9LRS3197
B B
+3V
R167 +1.05V_VTT +VDDIO_CLK
10K_4
2
Y3
3 1 CGDAT_SMB [17,18,31] L13 BLM21PG600SN1D
[13] ICH_SMBDATA
XTAL_IN 1 2 XTAL_OUT 0805
Q7 C274 C290 C331 C267 C315 C297
2N7002
C289 14.318MHZ C288 0.1U/10V/X5R_4 0.1U/10V/X5R_4 10U/10V/X5R_8 10U/10V/X5R_8 0.047U/10V/X7R_4 2.2U/6.3V/X5R_6
30P/50V/NPO_4 30P/50V/NPO_4
+3V R177
10K_4
Place each 0.1uF cap as close as
2
possible to each VDD IO pin. Place
the 10uF caps on the VDD_IO plane.
[13] ICH_SMBCLK 3 1 CGCLK_SMB [17,18,31]
Q8
2N7002
C C
+3V
+3V R132
1K_4
R151 0 1 CK_PWRGD_R
*10K_4
3
CPU_SEL
CPU_SEL CPU0/1=133MHz CPU0/1=100MHz
(default) R133
2 100K_4
[36] VR_PWRGD_CLKEN#
R145 C329
10K_4
*10P/50V/COG_4 Q6
2N7002
1
D D
PROJECT :MK2-Intel
Quanta Computer Inc.
Size Document Number Rev
Custom 1C
Clock Generator
Date: Wednesday, June 23, 2010 Sheet 3 of 42
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
U25A
PEG_ICOMPI
PEG_ICOMPO
B12 PEG_COMP
A13
R275 49.9/F_4
Processor Compensation Signals
[3,11,12,13,14,15,17,18,19,20,21,22,23,25,26,27,29,30,31,32,33,35,36,38,39]
[3,6,7,11,12,13,14,15,38,39,40]
[7,17,18,33,37,39]
[11,12,13,14,15,24,26,29,31,37,39]
+1.05V_VTT
1.5VSUS
3V_S5
+3V
[6,7,37] +1.5V_CPU
04
[11] DMI_TXN0 F7 D12
DMI_RX#[0] PEG_RCOMPO
[11] DMI_TXN1 J8 B11 PEG_RBIAS R274 750/F_4 Layout Note: Place
DMI_RX#[1] PEG_RBIAS
K8
[11] DMI_TXN2
J4
DMI_RX#[2]
G40
these resistors
[11] DMI_TXN3 DMI_RX#[3] PEG_RX#[0]
PEG_RX#[1]
G38 near Processor
[11] DMI_TXP0 F9 H34
DMI_RX[0] PEG_RX#[2] U25B
[11] DMI_TXP1 J6 P34
DMI_RX[1] PEG_RX#[3]
DMI
K9 G28 R306 20/F_4 H_COMP3 AD71
[11] DMI_TXP2 DMI_RX[2] PEG_RX#[4] COMP3
[11] DMI_TXP3 J2 H25 AK7 CLK_CPU_BCLK [14]
DMI_RX[3] PEG_RX#[5] BCLK
Misc
H24 R305 20/F_4 H_COMP2 AC70 AK8 CLK_CPU_BCLK# [14]
PEG_RX#[6] COMP2 BCLK#
[11] DMI_RXN0 H17 D29
A DMI_TX#[0] PEG_RX#[7] 49.9/F_4 H_COMP1
A
[11] DMI_RXN1 K15 B26 R31 AD69 K71 BCLK_ITP_P TP47
DMI_TX#[1] PEG_RX#[8] COMP1 BCLK_ITP
Clocks
[11] DMI_RXN2 J13 D26 J70 BCLK_ITP_N TP46
DMI_TX#[2] PEG_RX#[9] R32 49.9/F_4 H_COMP0 BCLK_ITP#
[11] DMI_RXN3 F10 B23 AE66
DMI_TX#[3] PEG_RX#[10] COMP0
D22 L21 CLK_PCIE_3GPLL [13]
PEG_RX#[11] PEG_CLK
[11] DMI_RXP0 G17 A20 J21 CLK_PCIE_3GPLL# [13]
DMI_TX[0] PEG_RX#[12] TP44 PEG_CLK#
[11] DMI_RXP1 M15 D19 M71
DMI_TX[1] PEG_RX#[13] PROC_DETECT
[11] DMI_RXP2 G13 A17 Y2 DREFSSCLK [13]
DMI_TX[2] PEG_RX#[14] DPLL_REF_SSCLK
[11] DMI_RXP3 J11 B14 W4 DREFSSCLK# [13]
DMI_TX[3] PEG_RX#[15] H_CATERR# DPLL_REF_SSCLK#
N61
CATERR#
F40
PEG_RX[0]
PEG_RX[1]
J38 DDR3 Compensation Signals
Thermal
[11] FDI_TXN[7:0] G34 BJ12 CPU_DRAMRST#
FDI_TXN0 PEG_RX[2] SM_DRAMRST#
L2
FDI_TX#[0] PEG_RX[3]
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