Service Manuals, User Guides, Schematic Diagrams or docs for : LENOVO Laptop X121E drawings- DM NOTE_HR_FL8_B_20110131A
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5 4 3 2 1
PCB STACK UP 8L POWER
LAYER 1 : TOP D/M Note Block Diagram -- Intel Huron River ULV DC/DC
LAYER 2 : SGND 3V_PCU, 5V_PCU, +15V Page 31
LAYER 3 : IN1 REGULATOR (DDR3)
1.5V_SUS, 0.75V_DDR_VTT
LAYER 4 : IN2 Page 32
Environment temperature
LAYER 5 : SVCC REGULATOR
DDR3 SO-DIMM 1 Thermal Sensor Page 26 1.05V&1.8V
D
LAYER 6 : IN3 Intel Huron River Page 33
D
LAYER 7 : SGND1 (STD) Page 13 REGULATOR
LAYER 8 : BOT Sandy Bridge Charger temperature VCCSA Page 34
DDR3 SO-DIMM 2 Thermal Sensor Page 26 CPU Core
Page 35
(RVS) Page 14 31mmX24mm, BGA
Charger
2 Core 18Watt DDR Page 36
Page 3, 4, 5, 6 Thermal Sensor Page 13 RUN POWER SW/Discharge
5V_SUS, 3V_S5, 5V_S5
+3V, +5V Page 37
FDI X4 DMI
USB
4 in 1 Socket
Card Reader Realtek RTS520921
Page SD/SDHC/SDXC/MMC Page 21
C
PCI-e/USB Mini PCIe Slot
C
WLAN Module
Page 22 Page 22
HD
HP/Mic HDA CODEC Audio PCI-e/USB Mini PCIe Slot WWAN
Audio Jack SIM Card
CX20671-21Z Page 23 Module Page 23
Page 23
Page 18
Page 18
Cougar Point PCI-e
Internal SPK
10/100/1G Ethernet
Internal MIC HM65 RJ-45
Page 18 Page 18 AR8151-BL1A-R++Page 17 Page 17
25mmX25mm, BGA 11.6" HD (1366x768) LCD
LVDS Page 15
PCH 3.9Watt
SATA 2.5" HDD /SSD Module
B SPI Flash (4MB) CRT B
Page 8 (Option) RGB Page 16
Page 19
Page 7, 8, 9, 10, 11, 12
32.768KHz HDMI HDMI
LPC BUS Page 16
SPI Flash (512K) IT8518 TPM
Page 28
Page 28
(for M-note) USB
Page 25
Camera Conn Camera Module
Page 15 Page 15
USB
Accelerometer
Int. KB T/P Battery Charger Bluetooth
(APS) Page 25
Page 25 Page 24 Page 24 Page 36 Page 36
A A
USB USB PORT X 3
Page 20
USB
Fingerprint (for M-note) Quanta Computer Inc.
Page 24
PROJECT D/M NOTE INTEL HURON RIVER
Size Document Number Rev
System Block Diagram 1A
Date: Monday, January 31, 2011 Sheet 1 of 43
5 4 3 2 1
1 2 3 4 5 6 7 8
Table of Contents Power States
02
CONTROL
PAGE DESCRIPTION POWER PLANE VOLTAGE PAGE DESCRIPTION ACTIVE IN
SIGNAL
01 LOCK DIAGRAM(UMA)
A A
02 FRONT PAGE VIN 10V~+20V 15,31,32,33,34,35,36,37 MAIN POWER S0~S5
03-06 Sandy Bridge
+3V_RTC +3.0V~+3.3V 7,8,11,28 RTC S0~S5
07-12 Cougar Point-PCH
13-14 DDRIII SO-DIMM 3VPCU +3.3V 8,15,16,17,20,27,28,31,33,36,37 IT8518/19 POWER 3V5V_EN S0~S5
15 LCD/CAMERA
5VPCU +5V 15,29,31,32,33,34,36,37 DC/DC POWER IC SOURCE 3V5V_EN S0~S5
16 CRT/HDMI CONN
17 LAN-RTL8111E-VB-GR +15V +15V 15,25,31,32,37 LARGE POWER 3V5V_EN S0~S5
18 AUDIO (CX20671-21Z, SPK)
LANVCC +3.3V 17,37 LAN POWER LAN_ON
19 SATA
20 USB X 3 5V_S5 +5V 11,20,37 PCH SUS POWER S5_ON S0~S3
21 Card Reader-RTS5209
Sys Management,PCH Resume Well, S0~S3
22 WLAN 3V_S5 +3.3V 3,7,8,9,10,11,22,25,27,28,37 USB,WLAN,WiMAX POWER S5_ON
23 WWAN
24 KB/TP/FP 5VSUS +5V 15,27,35,37 SLP_S4# CTRLD POWER SUSON S0~S3
B B
25 BT/G-SENSOR/TPM
3VSUS +3.3V 32,37 SLP_S4# CTRLD POWER SUSON S0~S3
26 FAN/Thermal
27 SW/LED/RFID_EEPROM +1.5VSUS +1.5V 3,11,13,14,32,37 DDR3 SODIMM POWER SUSON S0~S3
28 KBC IT8518/19
+0.75V_DDR_VTT +0.75V 13,14,32,37 DDR3 SODIMM REFERENCE POWER MAINON S0
29 Screw Hole/EMI
30 Power Block Diagram +5V +5V 7,8,11,15,16,18,19,24,26,28,29,37 SLP_S3# CTRLD POWER MAINON S0
31 POWER_3V/5V (RT8206MGQW)
3,7,8,9,10,11,13,14,15,16,17,18,19,21,22,23
32 POWER_DDR3 (TPS51116)
+3V +3.3V 24, 25,26,27,28,29 SLP_S3# CTRLD POWER MAINON S0
33 POWER_1.05V&1.8V (OZ8117)
34 POWER_+VCCSA (OZ8117)
35 POWER_+VCC_CORE(ISL95831) +VCC_GFX 5,35,37 VGA CORE POWER MAINON S0
36 POWER_Charger (ISL88731A)
+VCCSA +0.8V~+0.9V 5,34,37 Sandy Bridge Power MAINON S0
37 POWER_Discharge
C 38 Power On Sequence +1.8V +1.8V 5,8,11,33,37 LVDS,NVM POWER MAINON S0 C
39 BOM Matrix Table
+1.05V +1.05V 3,5,7,8,9,11,33,37 Sandy Bridge VTT POWER/PCH CORE POWER MAINON S0
40 Schematic Value Descript
41 EC RECORD DV +VCC_CORE 5,6,35,37 CPU CORE POWER VRON S0
42 Power EC RECORD DV
+LCDVCC +3.3V 15 LCD Power ENVDD S0
43
44 +3V_HDD +3V 19 ODD Power ODD_5V_ON S0
45
+5V_HDD +5V 19 HDD Power MAINON# S0
46
47 BAT-V +10V~+17V 36 MAIN BATTERY CHG_PBATT S0~S5
+1.5V_CPU +1.5V 3,5,32,37 DDR3 1.5V Rails PS_S3CNTRL S0
D D
Quanta Computer Inc.
PROJECT D/M NOTE INTEL HURON RIVER
Size Document Number Rev
System Block Diagram 1A
Date: Monday, January 31, 2011 Sheet 2 of 43
1 2 3 4 5 6 7 8
5 4 3 2 1
Sandy Bridge Processor (DMI,PEG,FDI)
U25A
PEG_ICOMPI G3
G1
PEG_COMP PEG_COMP connect to PIN G3&G4 W:4mils/S:15mils/L: 500mils.
Sandy Bridge Processor (CLK,MISC,JTAG)
U25B
J3 CLK_CPU_BCLKP (9)
03
PEG_ICOMPO PEG_COMP connect to PIN G1 W:12mils/S:15mils/L: 500mils. BCLK
(7) DMI_TXN0 M2 DMI_RX#[0] PEG_RCOMPO G4 BCLK# H2 CLK_CPU_BCLKN (9)
CLOCKS
MISC
MISC
(7) DMI_TXN1 P6 DMI_RX#[1] T14
(7) DMI_TXN2 P1 DMI_RX#[2] (8) PROC_SELECT# F49 PROC_SELECT#
P10 H22 AG3 CLK_DPLL_SSCLKP_R R383 1K_4
(7) DMI_TXN3 DMI_RX#[3] PEG_RX#[0] DPLL_REF_CLK
J21 AG1 CLK_DPLL_SSCLKN_R R382 1K_4
PEG_RX#[1] SKTOCC# DPLL_REF_CLK#
(7) DMI_TXP0 N3 DMI_RX[0] PEG_RX#[2] B22 SNB_IVB# N.A at SNB EDS #27637 0.7v1 TP3 C57 PROC_DETECT# +1.05V
(7) DMI_TXP1 P7 DMI_RX[1] PEG_RX#[3] D21
DMI
P3 A19 N59 BCLK_ITP T13
(7) DMI_TXP2 DMI_RX[2] PEG_RX#[4] BCLK_ITP TP55
D P11 D17 N58 BCLK_ITP# D
(7) DMI_TXP3 DMI_RX[3] PEG_RX#[5] BCLK_ITP# TP56
PEG_RX#[6] B14
K1 D13 TP_CATERR# C49
(7) DMI_RXN0 DMI_TX#[0] PEG_RX#[7] TP6 CATERR#
(7) DMI_RXN1 M8 DMI_TX#[1] PEG_RX#[8] A11
THERMAL
THERMAL
(7) DMI_RXN2 N4 DMI_TX#[2] PEG_RX#[9] B10 Placement close to EC.
(7) DMI_RXN3 R2 DMI_TX#[3] PEG_RX#[10] G8
A8 (10,28) EC_PECI R366 43_4 H_PECI A48 AT30 CPU_DRAMRST#
PEG_RX#[11] PECI SM_DRAMRST#
(7) DMI_RXP0 K3 DMI_TX[0] PEG_RX#[12] B6
(7) DMI_RXP1 M7 DMI_TX[1] PEG_RX#[13] H8
P4 E5 BF44 SM_RCOMP_0 R48 140/F_4
(7) DMI_RXP2 DMI_TX[2] PEG_RX#[14] SM_RCOMP[0]
T3 K7 (28,35) H_PROCHOT# R20 56.2/F_4 H_PROCHOT#_R C45 BE43 SM_RCOMP_1 R49 25.5/F_4
(7) DMI_RXP3
DDR3
MISC
DMI_TX[3] PEG_RX#[15] PROCHOT# SM_RCOMP[1] SM_RCOMP_2 R50 200/F_4
SM_RCOMP[2] BG43
PEG_RX[0] K22
PEG_RX[1] K19 SM_RCOMP[0] W:20mils/S:20mils/L: 500mils,
C21 (10) PM_THRMTRIP# R365 *short_4 PM_THRMTRIP#_R D45
PEG_RX[2] THERMTRIP# SM_RCOMP[1] W:20mils/S:20mils/L: 500mils,
(7) FDI_TXN0 U7 FDI0_TX#[0] PEG_RX[3] D19
W11 C19 EC-SIT-1 SM_RCOMP[2] W:15mils/S:20mils/L: 500mils,
(7) FDI_TXN1 FDI0_TX#[1] PEG_RX[4]
W1 D16 N53 XDP_PRDY# TP8
(7) FDI_TXN2 FDI0_TX#[2] PEG_RX[5] PRDY#
PCI EXPRESS -- GRAPHICS
AA6 C13 N55 XDP_PREQ# TP7 CPU XDP
(7) FDI_TXN3 FDI0_TX#[3] PEG_RX[6] PREQ#
(7) FDI_TXN4 W6 FDI1_TX#[0] PEG_RX[7] D12
V4 C11 L56 XDP_TCLK TP9
(7) FDI_TXN5 FDI1_TX#[1] PEG_RX[8] TCK
Y2 C9 L55 XDP_TMS TP1
(7) FDI_TXN6 FDI1_TX#[2] PEG_RX[9] TMS
Intel(R) FDI
PWR MANAGEMENT
PWR MANAGEMENT
AC9 F8 EC-SIT-1 J58 XDP_TRST# TP50
(7) FDI_TXN7 FDI1_TX#[3] PEG_RX[10] TRST#
JTAG & BPM
PEG_RX[11] C8
C5 (7) PM_SYNC R353 *short_4 PM_SYNC_R C48 M60 XDP_TDI TP57
PEG_RX[12] PM_SYNC TDI XDP_TDO
(7) FDI_TXP0 U6 FDI0_TX[0] PEG_RX[13] H6 TDO L59 TP54
(7) FDI_TXP1 W10 FDI0_TX[1] PEG_RX[14] F6
W3 K6 R374 *1K/F_4 +3V
(7) FDI_TXP2 FDI0_TX[2] PEG_RX[15]
AA7 (10) H_PWRGOOD R11 *short_4 H_PWRGOOD_R B46
(7) FDI_TXP3 FDI0_TX[3] UNCOREPWRGOOD
W7 G22 K58 XDP_DBRST# XDP_DBRST# (7)
(7) FDI_TXP4 FDI1_TX[0] PEG_TX#[0] DBR#
T4 C23 R19 10K/F_4
(7) FDI_TXP5 FDI1_TX[1] PEG_TX#[1]
(7) FDI_TXP6 AA3 FDI1_TX[2] PEG_TX#[2] D23
AC8 F21 PM_DRAM_PWRGD_R BE45 G58 XDP_BPM0 TP51
(7) FDI_TXP7 FDI1_TX[3] PEG_TX#[3] SM_DRAMPWROK BPM#[0]
H19 E55 XDP_BPM1 TP5
PEG_TX#[4] BPM#[1] XDP_BPM2
C (7) FDI_FSYNC0 AA11 FDI0_FSYNC PEG_TX#[5] C17 BPM#[2] E59 TP4 C
AC12 K15 +1.05V R9 75_4 G55 XDP_BPM3 TP2
(7) FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] BPM#[3]
U1 XDP_BPM4
U11
PEG_TX#[7] F17
F14
CPU RESET# 3 4 CPU_PLTRST# R12 43_4 CPU_PLTRST#_R D44
BPM#[4] G59
H60 XDP_BPM5
TP48
TP52
(7) FDI_INT FDI_INT PEG_TX#[8] GND OUT RESET# BPM#[5]
A15 J59 XDP_BPM6 TP49
PEG_TX#[9] 3V_S5 BPM#[6] XDP_BPM7
(7) FDI_LSYNC0 AA10 FDI0_LSYNC PEG_TX#[10] J14 (9,17,21,22,23,25,27) PLTRST# 2 IN C6 BPM#[7] J61 TP53
(7) FDI_LSYNC1 AG8 FDI1_LSYNC PEG_TX#[11] H13
M10 1 5 R22
PEG_TX#[12] NC VCC
PEG_TX#[13] F10
D9 74LVC1G07GW *750/F_4
PEG_TX#[14] 0.1U/10V/X7R_4
PEG_TX#[15] J4
eDP_COMP AF3 R13 *1.5K/F_4
eDP_COMPIO IC,SNB_2CBGA,1P0
AD2 eDP_ICOMPO PEG_TX[0] F22
INT_eDP_HPD_Q AG11 A23
eDP_HPD PEG_TX[1]
PEG_TX[2] D24
PEG_TX[3] E21
AG4 eDP_AUX# PEG_TX[4] G19
AF4 eDP_AUX PEG_TX[5] B18
PEG_TX[6] K17
DP
PEG_TX[7] G17
AC1 eDP_TX[0] PEG_TX[8] E14
AA4 C15
AE10
AE6
eDP_TX[1]
eDP_TX[2]
PEG_TX[9]
PEG_TX[10] K13
G13
SM_DRAMPWROK Processor Input. DDR3 DRAM RESET
eDP_TX[3] PEG_TX[11]
PEG_TX[12] K10
AC3 G10 3V_S5
eDP_TX#[0] PEG_TX[13]
AC4 eDP_TX#[1] PEG_TX[14] D8
AE11 K4 +1.5VSUS R45 1K/F_4 R44 *0_4
eDP_TX#[2] PEG_TX[15]
AE7 eDP_TX#[3] +1.5V_CPU
C142 (13,14) DDR3_DRAMRST# R47 1K/F_4 3 1 CPU_DRAMRST#
IC,SNB_2CBGA,1P0 0.1U/10V/X7R_4
Q5
2
R73 2N7002
5
B U6 200/F_4 (9) DRAMRST_CNTRL_PCH R67 *short_4 B
eDP_COMP connect to PIN AF3 W:4mils/S:15mils/L: 500mils. (7,32) SYS_PWROK 2 R60
4 PM_DRAM_PWRGD_Q R69 130/F_4 PM_DRAM_PWRGD_R C133 4.99K/F_4
eDP_COMP connect to PIN AD2 W:12mils/S:15mils/L: 500mils. R66 *short_4 0.047U/10V/X7R_4
(7) PM_DRAM_PWRGD 1
EC-SIT-1 74AHC1G09
3
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