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A B C D E
1 1
2
Compal confidential 2
Schematics Document
Mobile Dothan uFCPGA with Intel
Alviso_GM+ICH6-M core logic
3
2005-02-15 3
LA-2592
REV:0.3
4 4
Title
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.3
Custom LA-2592
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, February 21, 2005 Sheet 1 of 46
A B C D E
A B C D E
Compal confidential
File Name : LA-2592
VRAM
128MByte
1 (32MByte*4) 1
Fan Control Mobile Dothan/Yonah Thermal Sensor Clock Generator
page 15
DDR300/300
uFCPGA-478 CPU ADM1031AR ICS 954226
page 4,5,6
page 15 page 18
M/B-NV44M VGA/B
CONN FSB
H_A#(3..31) 400/533MHz H_D#(0..63)
PCI-E
LS-2597 page 16 DDR BANK0 32M*16*4
DDR1 -333
Intel Alviso GMCH DDR-SO-DIMM112,13,14
page
LVDS CONN PCBGA 1257 One Channel
page 16 page 7,8,9,10,11
M/B-S/B CONN
LS-2594
2 2
M/B-S/B CONN Camera/BlueTooth
LS-2594 USB2.0
conn page 17
PCI-E(DMI) M/B-S/B CONN
TV-OUT / CRT LS-2595
conn page 17
USB2.0 USB conn x2
page 32
USB conn x2
page 32
PCI BUS MO DEM
AGERE CPS103830
Intel ICH6-M page
Gigabit LAN IEEE1394 mBGA-609 AC-LINK Audio CKT AMP & Audio Jack
Mini PCI CardBus Controller ALC250-VC APA2121 page 31
socket RTL8110SBL/ TSB43AB21 page 29
page 19,20,21,22
8100CLpage 24 CB-714
page 28 page 27
page 25
3
IDEBUS IDE HDD IDE ODD 3
Connector
page 23
Connector
page 23
RJ45/11 CONN M/B-S/B CONN Slot 0 4in1 Slot LPC BUS LS-2592 SWDJ/B List: SubBoard CONN List:
page 24
LS-2595 page 26 page 25 SWDJ switch Button * 5 LS-2597 VGA/B conn Page 32
WL/BT on/foff Button *1 LS-2592 SWDJ/B conn Page 32
WL/BT LED *1 LS-2593 TP/B conn Page 32
1394 conn LS-2594 CRT/TV-OUT conn
page 32
LS-2594 CRT/TV-OUT List: Page 17
EC KB910L CRT conn * 1 LS-2595 USB&1394/B conn Page 32
TV-OUT conn * 1 Intel CPU debug conn Page 4
page 33
RTC CKT. USB conn * 2 EC debug conn Page 33
page 19 BlueTooth conn * 1 SW debug conn Page 33
Num LED * 1 Switch Button list:
Power On/Off CKT. M/B-S/B CONN Int.KBD CAP LED * 1 Power Botton(Sub/B) Page 34
LS-2593 page 33 Scroll LED * 1 Lid Switch Page 34
page 34 Lid Switch * 1
Flash ROM LED Function list:
4 Touch Pad CONN. LS-2595 USB&1394/B List: AC Power LED Page 32 4
DC/DC Interface CKT. page 32 SST39VF080-70 USB conn* 2 Charge LED
page 34
Page 32
page 35 1395 conn * 1 HDD LED Page 32
Compal Electronics, Inc.
Power Circuit DC/DC Title
36,37,38,39,40,41,42 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number
Block Diagram Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.3
Custom LA-2592
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Tuesday, February 15, 2005 Sheet 2 of 46
A B C D E
5 4 3 2 1
I2C / SMBUS ADDRESSING
External PCI Devices
DEVICE IDSEL # REQ/GNT # PIRQ
D
L AN AD17 0 F D
CARD BUS AD20 1 A
Cardreader B
1394 AD16 2 E
Wireless LAN(MINI PCI) AD18 3 G,H
Power Managment table
+CPU_CORE
Signal +VCCP(1.05V)
+5VS
+3VS
+2.5VS
+1.5VS
C
+1.25VS C
State +1.1VS(VGA/B)
+12VALW +3V +1.2VS(VGA/B)
+3VALW +2.5V +1.8VS(VGA/B)
+5VALW
S0 ON ON ON
S1 ON ON ON
S3 ON ON OFF
S5 S4/AC ON OFF OFF
S5 S4/AC don't exist OFF OFF OFF
B B
SMBUS Control Table
THERMAL
SOURCE INVERTER BATT SERIAL SENSOR SODIMM CLK CHIP MINI PCI LCD
EEPROM (CPU)
ADM1032
SMB_EC_CK1 KB910L
SMB_EC_DA1
SMB_EC_CK2 KB910L
SMB_EC_DA2
ICH_SMBCLK
ICH6-M
ICH_SMBDATA
LCD_DDCCLK Alviso
LCD_DDCDATA GM-GP
I2CC_SCL NV44M
A
I2CC_SDA A
Title
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number
Design Note Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.1
Custom LA-2592
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Tuesday, February 15, 2005 Sheet 3 of 46
5 4 3 2 1
5 4 3 2 1
ZZZ1
LA-25 92 REV 0.3
7 H_A#[3..31] H_D#[0..63] 7
U15A
H_A#3 P4 A19 H_D#0
H_A#4
H_A#5
U4
A3#
A4#
Dothan D0#
D1# A25 H_D#1
H_D#2
V3 A5# D2# A22
H_A#6 R3 B21 H_D#3 +VCCP
H_A#7 A6# D3# H_D#4
V2 A7# D4# A24
LA2591 Rev0.1-DA600001600(6 layer) H_A#8 H_D#5 Place near JITP 1"
LA2592 Rev0.3-DA800005000(8 layer) H_A#9
W1
T4
A8# D5# B26
A21 H_D#6 Check ITP signal for Dothan 1 2 ITP_TDO
D H_A#10 A9# D6# H_D#7 R49 54.9_0402_1% D
W2 A10# D7# B20
H_A#11 Y4 C20 H_D#8 Place near JITP 0.5" Place near JITP 0.5"
H_A#12 A11# D8# H_D#9 R38 H_RESET#
Y1 A12# D9# B24 1 2
H_A#13 U1 D24 H_D#10 ITP_DBRESET#2 1 R48 54.9_0402_1%
A13# D10# 21 ITP_DBRESET# PAD T1
H_A#14 AA3 E24 H_D#11 @ 200_0402_5% 1 2 ITP_BPM#5
H_A#15 A14# D11# H_D#12 ITP_BPM#0 R33 56_0402_5%
Y3 A15# D12# C26 PAD T6
H_A#16 AA2 B23 H_D#13
H_A#17 A16# D13# H_D#14 ITP_BPM#1
AF4 A17# D14# E23 PAD T5
H_A#18 AC4 C25 H_D#15
H_A#19 A18# D15# H_D#16 ITP_BPM#2 +VCCP 39.2
AC7 A19# D16# H23 PAD T8
H_A#20 AC3 G25 H_D#17 ITP_BPM#[0:3] < 6" Spacing 1:2 R42 39.2_0603_1%
H_A#21 A20# D17# H_D#18 ITP_BPM#3 ITP_TMS
AD3 A21# D18# L23 PAD T2 1 2
H_A#22 AE4 M26 H_D#19 Within 2" of the CPU
H_A#23 A22# D19# H_D#20 ITP_BPM#4 R179150_0402_5%
AD2 A23# D20# H24 PAD T9
H_A#24 AB4 F25 H_D#21 R46 1 2 ITP_TDI
H_A#25 A24# D21# H_D#22 @ 22.6_0402_1% ITP_BPM#5 Within 2" of the CPU
AC6 A25# ADDR GROUP DATA GROUP D22# G24 PAD T3
H_A#26 AD5 J23 H_D#23 Spacing 8 mil H_RESET# 1 2 RESETITP#
A26# D23# PAD T15
H_A#27 AE2 M23 H_D#24 R177680_0402_5%
H_A#28 A27# D24# H_D#25 ITP_TRST#
AD6 A28# D25# J25 1 2
H_A#29 AF3 L26 H_D#26 Place near JITP 0.5" R47 CLK_ITP Within 2" of the CPU
A29# D26# PAD T18
H_A#30 AE1 N24 H_D#27 @ 22.6_0402_1% CLK_ITP# R50 27.4_0402_1%
A30# D27# PAD T19
H_A#31 AF1 M25 H_D#28 ITP_TDO 1 2 ITP_TDO_R 1 2 ITP_TCK
7 H_REQ#[0..4] A31# D28# PAD T16
H26 H_D#29 Within 2" of the CPU
H_REQ#0 D29# H_D#30
R2 REQ0# D30# N25
H_REQ#1 P3 K25 H_D#31 ITP_TCK PAD T17
H_REQ#2 REQ1# D31# H_D#32 ITP_TRST#
T2 REQ2# D32# Y26 PAD T14
H_REQ#3 P1 AA24 H_D#33 ITP_TMS PAD T4
H_REQ#4 REQ3# D33# H_D#34 ITP_TDI
T1 REQ4# D34# T25 PAD T13
U23 H_D#35
H_ADSTB#0 D35# H_D#36
7 H_ADSTB#0 U3 ADSTB0# D36# V23
H_ADSTB#1 AE5 R24 H_D#37
7 H_ADSTB#1 ADSTB1# D37#
R26 H_D#38
C D38# H_D#39 C
D39# R23
CLK_ITP A16 AA23 H_D#40
18 CLK_ITP ITP_CLK0 D40#
CLK_ITP# A15 U26 H_D#41
18 CLK_ITP# ITP_CLK1 D41#
V24 H_D#42
CLK_CPU_BCLK D42# H_D#43
18 CLK_CPU_BCLK B15 BCLK0 D43# U25
CLK_CPU_BCLK# B14 HOST CLK V26 H_D#44
18 CLK_CPU_BCLK# BCLK1 D44#
Y23 H_D#45
D45# H_D#46
D46# AA26
Y25 H_D#47
H_ADS# D47# H_D#48
7 H_ADS# N2 ADS# D48# AB25
H_BNR# L1 AC23 H_D#49
7 H_BNR# BNR# D49#
H_BPRI# J3 AB24 H_D#50
7 H_BPRI# BPRI# D50#
H_BR0# N4 AC20 H_D#51
7 H_BR0# BR0# D51#
H_DEFER# L4 AC22 H_D#52
7 H_DEFER# DEFER# D52#
H_DRD Y# H2 AC25 H_D#53
7 H_DRDY# DRDY# D53# +3VS
H_HIT# K3 AD23 H_D#54
7 H_HIT# HIT# D54#
R37 H_HITM# K4 CONTROL GROUP AE22 H_D#55
7 H_HITM# HITM# D55# +VCCP
1 2 H_IERR# A4 AF23 H_D#56
+VCCP IERR# D56#
1
56_0402_5% H_LOCK# J2 AD24 H_D#57
7 H_LOCK# LOCK# D57#
H_RESET# B11 AF20 H_D#58 R258
7 H_RESET# RESET# D58#
1" ~ 6.5" AE21 H_D#59 1K_0402_5%
D59# H_D#60
7 H_RS#[0..2] D60# AD21
H_RS#0 H1 AF25 H_D#61
2
RS0# D61#
1
H_RS#1 K1 AF22 H_D#62
H_RS#2 RS1# D62# H_D#63 R266
L2 RS2# D63# AF26
H_TRDY# M3 56_0402_5%
7 H_TRDY# TRDY#
PROCHOT# 33
D25 H_DINV#0 7
2
DINV0#
1
1
J26 R253 C
DINV1# H_DINV#1 7
ITP_BPM#0 C8 T24 56_0402_5% 2 Q29
BPM0# DINV2# H_DINV#2 7
ITP_BPM#1 B8 AD20 B 2SC2411K_SC59
BPM1# DINV3# H_DINV#3 7 E
ITP_BPM#2 A9
3
B ITP_BPM#3 BPM2# B
C9 H_DSTBN#[0..3] 7
2
BPM3# H_DSTBN#0
DSTBN0# C23
ITP_DBRESET# A7 K24 H_DSTBN#1
H_DBSY# DBR# DSTBN1# H_DSTBN#2 H_PROCHOT#
H_DPRSLP will change to 7 H_DBSY# M2 DBSY# DSTBN2# W25
H_DPSLP# B7 AE24 H_DSTBN#3
H_DPRSTP in future 20 H_DPSLP#
H_DPRSLP# G1
DPSLP# DSTBN3#
C22 H_DSTBP#0
H_DSTBP#[0..3] 7
20 H_DPRSLP# DPRSTP# DSTBP0#
collateral version. 7 H_DPWR# C19 DPWR# DSTBP1# L24 H_DSTBP#1
ITP_BPM#4 A10 MISC W24 H_DSTBP#2
ITP_BPM#5 PRDY# DSTBP2# H_DSTBP#3
B10 PREQ# DSTBP3# AE25
H_PROCHOT# B17 PROCHOT#
20 H_PWRGOOD E4 PWRGOOD
H_CPUSLP# A6
7,20 H_CPUSLP# SLP#
ITP_TCK A13
ITP_TDI TCK H_A20M#
C12 TDI A20M# C2 H_A20M# 20
ITP_TDO A12 D3 H_FERR#
TDO FERR# H_FERR# 20
TEST1 C5 A3 H_IGNNE#
TEST1 IGNNE# H_IGNNE# 20
TEST2 F23 B5 H_INIT#
TEST2 INIT# H_INIT# 20
ITP_TMS C11 D1 H_INTR
TMS LINT0 H_INTR 20
ITP_TRST# B13 D4 H_NMI
TRST# LINT1 H_NMI 20
LEGACY CPU
THERMAL R32 Add pullups for PWRGOOD and THERMTRIP per INTEL
H_THERMDA B18 C6 H_STPCLK# 200_0402_5%
15 H_THERMDA
H_THERMDC THERMDA DIODE STPCLK# H_SMI#
H_STPCLK# 20
15 H_THERMDC A18 THERMDC SMI# B4 H_SMI# 20 +VCCP 1 2 H_PW RGOOD
7,20 H_THERMTRIP# C17 THERMTRIP#
TYCO_1612365-1_Dothan
R251
A TEST2 A
1 2
@ 1K_0402_5%
R35
TEST1 1 2
@ 1K_0402_5%
Title
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number
Dothan Processor(1/2) Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D ◦ Jabse Service Manual Search 2024 ◦ Jabse Pravopis ◦ onTap.bg ◦ Other service manual resources online : Fixya ◦ eServiceinfo