Service Manuals, User Guides, Schematic Diagrams or docs for : Quanta QUANTA_RJ9
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1 2 3 4 5
http://hobi-elektronika.net
CPU
Yonah/Merom
RJ9 Block Diagram 1
478 PIN (micro FC-PGA) P3,4 14.318MHz
A FSB 667 MHz(166X4) A
LVDS LCD LVDS CLOCK GEN
P7
UNBUFFERED
DDRII ICS954310
DDRII 400/533/667
DVI Calistoga SODIMM P2
P12
M56 945GM/PM
R/G/B CRT R/G/B
P11 1466 PIN (micro FCBGA) UNBUFFERED
DDRII 400/533/667 DDRII
37.5mm x 37.5mm
SODIMM P12
PCIE 16Lanes P5-10
P36-40
DMI(2X, 4X)
RJ45
LAN PCIE Azalia Link
(Giga) MARVELL
B B
88E8053 P27
ICH7-M
ALC260 MDC Module
P22 P19
PCI-e Mini 652 BGA
PCIE 31mm x 31mm
Intel 3945
P20
TI-TPA6011A4 P23 RJ11
PCI BUS P13-16
MIC. Jack Audio Jack INT.SPKR.
SATA0
USB 1.1/2.0
USB 1.1/2.0
SATA2
3.3V LPC,33MHZ
TPM Sinosun SSX35ACB
USB SATA HDD HDD P25
VT6212
TI_7411 Sil 3512 P24 P24
C C
P35 P17-18 P34
USB*3 BAY P24
P26
Docking*3
P25
PCU
Docking P25 NS PC97551
Felica P24
Finger P21
PCMCIA 1394 Memory Stick Pro(DUO) Print P26
P20 P17 BAY P24
Blue Tooth
P24
SD/MMC
Camera P26 P18
TOUCH PAD INT.K/B BIOS Card Reader
P26 P21
ADI
HDD LED ADXL322JCP
P24
T/P SWITCH Track Point
Wireless SW
Wireless LED
D D
Bluetooth SW
Bluetooth LED QUANTA
LED COMPUTER
Power/Sleep/Bat/HDD
Size Document Number Rev
1.Level 1 Environment-related Substances Should NEVER be Used. RJ9 Main Board 1A
2.Purchase ink, paint, wire rods and molding resins only from the business partners that Sony approves as Green Partners.
Date: Friday, May 19, 2006 Sheet 1 of 41
1 2 3 4 5
1 2 3 4 5 6 7 8
CLK_VDDA L1
http://hobi-elektronika.net
MNI-160808-0300P-N2
VCC3 2
C2 C1
0.1U 10U/6.3V/X5R
C4
CLK_XIN
Add for EMI 3/30
2
45
46
33P Y1 R704 4.7K_4 CPU_BSEL1
U1
14.318MHZ 58 60 R2 33 14M_ICH
VDDA
GNDA
C6 X1 REF0 14M_ICH (15)
14M_ICH C5 10P_4
1
A CLK_XOUT 57 52 R_HCLK_MCH RP30 1 2 10X2 HCLK_MCH A
X2 CPUCLKT0 HCLK_MCH (5)
51 R_HCLK_MCH# 3 4 HCLK_MCH#
CPUCLKC0 HCLK_MCH# (5)
HCLK_MCH RP47 1 2 *49.9/FX2_4
33P R_HCLK_CPU RP31 1 HCLK_CPU HCLK_MCH#
(28) CLKEN# 10 Vtt_PerGd#/PD CPUCLKT1 49 2 10X2 HCLK_CPU (3) 3 4
62 48 R_HCLK_CPU# 3 4 HCLK_CPU# HCLK_CPU RP48 1 2 *49.9/FX2_4
(15) PM_STPCPU# CPU_STOP# CPUCLKC1 HCLK_CPU# (3)
63 HCLK_CPU# 3 4
(15) PM_STPPCI# PCI/PCIEX_STOP#
44 R_CLK_PCIE_M56 RP32 1 2 E@22X2 CLK_PCIE_M56
CPUCLKT2_ITP/PCIEXT8 CLK_PCIE_M56 (36)
54 43 R_CLK_PCIE_M56# 3 4 CLK_PCIE_M56# CLK_PCIE_M56 RP49 1 2 *[email protected]/FX2_4
(12,15,20) PCLK_SMB SCLK CPUCLKC2_ITP/PCIEXC8 CLK_PCIE_M56# (36)
55 CLK_PCIE_M56# 3 4
(12,15,20) PDAT_SMB SDATA
CLK48_7411 R17 12.1_4 41
(17) CLK48_7411 PREQ1#PCIEXT7
CLK48_USB R20 12.1_4 40 CLK_PCIE_DOCK RP50 1 2 *49.9/FX2_4
(15) CLKUSB_48 PEREQ2#PCIEXCT7
VCCP R583 4.7K_4 12 CLK_PCIE_DOCK# 3 4
CPU_BSEL1 R700 *0_4 FSLA/USB_48MHz R_CLK_PCIE_DOCK RP33 1
16 FSLB/TEST_MODE PCIEXT6 39 2 22X2 CLK_PCIE_DOCK
CLK_PCIE_DOCK (25)
CPU_BSEL2 61 38 R_CLK_PCIE_DOCK# 3 4 CLK_PCIE_DOCK# CLK_PCIE_SATA RP51 3 4 *49.9/FX2_4
REF1/FSLC/TEST_SEL PCIEXC6 CLK_PCIE_DOCK# (25)
CLK_PCIE_SATA# 1 2
36 R_CLK_PCIE_MCH RP40 1 2 22X2 CLK_PCIE_MCH
PCIEXT5 CLK_PCIE_MCH (5)
L2 MNI-160808-0300P-N2 VCC3_CLK 56 35 R_CLK_PCIE_MCH# 3 4 CLK_PCIE_MCH#
VCC3 VDDREF PCIEXC5 CLK_PCIE_MCH# (5)
50 VDDCPU
C7 C15 C11 C8 C10 C9
ICS954310 PCIEXT4 30
1 VDDPCI PCIEXC4 31
0.1U 0.1U 0.1U 0.1U 0.1U 7
R705 0_4 VDDPCI R_CLK_PCIE_SATA RP34 3 CLK_PCIE_SATA
SATACLKT 26 4 22X2 CLK_PCIE_SATA (13)
10U/6.3V/X5R 21 27 R_CLK_PCIE_SATA# 1 2 CLK_PCIE_SATA# CLK_PCIE_ICH RP54 3 4 *49.9/FX2_4
VDDPCIEX SATACLKC CLK_PCIE_SATA# (13)
VCC3_CLK R706 *0_4 28 CLK_PCIE_ICH# 1 2
VDDPCIEX R_CLK_PCIE_ICH RP35 3 CLK_PCIE_ICH
42 VDDPCIEX PCIEXT3 24 4 22X2 CLK_PCIE_ICH (14)
25 R_CLK_PCIE_ICH# 1 2 CLK_PCIE_ICH# CLK_PCIE_MCH RP55 1 2 *49.9/FX2_4
PCIEXC3 CLK_PCIE_ICH# (14)
C12 C13 C14 C41 C19 CLK_PCIE_MCH# 3 4
0.1U 0.1U 0.1U 0.1U 22 R_CLK_PCIE_LAN RP41 3 4 22X2 CLK_PCIE_LAN
PCIEXT2 CLK_PCIE_LAN (27)
11 23 R_CLK_PCIE_LAN# 1 2 CLK_PCIE_LAN# CLK_PCIE_LAN RP56 3 4 *49.9/FX2_4
VDD48 PCIEXC2 CLK_PCIE_LAN# (27)
10U/6.3V/X5R CLK_PCIE_LAN# 1 2
(20) CLKREQ2# 32 *PEREQ3#
33 19 R_CLK_PCIE_MINI RP57 3 4 22X2 CLK_PCIE_MINI CLK_PCIE_MINI RP58 3 4 *49.9/FX2_4
*PEREQ4# PCIEXT1 CLK_PCIE_MINI (20)
20 R_CLK_PCIE_MINI# 1 2 CLK_PCIE_MINI# CLK_PCIE_MINI# 1 2
B PCIEXC1 CLK_PCIE_MINI# (20) B
R40 4.3K IREF 47
Zo=50 IREF
27FIX/LCD_SSCGT/PCIEX0T 17
(1.2v) 18 PCLK_MP C16 15P
M56_27MHZ R702 E@100/F_4 27SS/LCD_SSCGC/PCIEX0C
(36) M56_27MHZ 14 DOTT_96MHz
M56_27MHZ# R703 E@33/F_6 15 PCLK_6212 C17 15P
(36) M56_27MHZ# DOTC_96MHz
5 R_PCLK_MP R38 33 PCLK_MP PCLK_3512 C18 15P
*SELPCIEX0_LCD#/PCICLK5 PCLK_MP (20)
4 R_PCLK_6212 R39 33 PCLK_6212
PCICLK4 PCLK_6212 (35)
R578 R474 12.1_4 PCLK_9630 PCLK_7411 C21 15P
PCLK_9630 (25)
[email protected] 3 R_PCLK_3512 R41 12.1_4 PCLK_3512
PCICLK3 PCLK_3512 (34)
64 R_PCLK_7411 R42 33 PCLK_7411 CLK48_USB C22 15P
**PCICLK2/REQ_SEL PCLK_7411 (17)
9 R_PCLK_ICH R43 33 PCLK_ICH
*SELLCD_27#/PCICLK_F1 PCLK_ICH (14)
34 8 R_PCLK_551 R452 33 PCLK_551 CLK48_7411 C23 15P
*PWRSAVE# ITPEN/PCICLK_F0 PCLK_551 (21)
R15 10K
GND
GND
GND
GND
GND
GND
GND PCLK_551 C667 15P
Add for EMI 3/30 PCLK_ICH C25 15P
53
13
59
2
6
29
37
* Internal pull up to VDD
**Internal pull down to PCLK_9630 C671 15P
GND
SATA Spread and Frequency Selection Table
R_PCLK_6212 R44 *10K (SEL_SATA) :
R_PCLK_MP R4 *10K VCO 27,26 Spread
R_PCLK_ICH R6 E@10K SEL_SATA SS3 SS2 MHZ MHZ %
1 0 0 tbd 100 -0.2 Down
1 0 1 tbd 100 -0.3 Down
C SEL_SRC0(Pin 17,18)(R4) REQ_SEL(Pin 40,41)(R44) 1 1 0 tbd 100 -0.4 Down C
LCDCLK Spread and Frequency Selection Table (SEL_LCD) :
0: LCDCLK Pair 0: PCIEXT7/PCIEXC7 1 1 1 tbd 100 -0.5 Down
1: SRCCLK0 pair 1: PREQ# Spread Spread
SEL_LCD SEL_LCD
SS3 SS2 SS1 SS0 17,18 MHZ % SS3 SS2 SS1 SS0 17,18 MHZ % Signal 945GM 945PM
SEL_LCD(Pin 17,18)(R6) IREF (Pin 39) : 1 0 0 0 0 96 +/-1.5 0 0 0 0 0 27 +/-0.25
R578 NI 71.5
0: 27MHZSS/27MHZSS# pair (M56) 475_1% : Sets the IREF current to 1 0 0 0 1 96 +/-1.25 0 0 0 0 1 27 +/-0.5
1: LCDCLK pair (945GM) 2.32mA CLK_PCIE_M56 RP32 NI 33X2
1 0 0 1 0 96 +/-1.0 0 0 0 1 0 27 +/-0.75
RP49 NI 49.9
Center
Center
1 0 0 1 1 96 +/-0.8 0 0 0 1 1 27 +/-1
R3 10K_4 CPU_BSEL2 DREFSSCLK RP36 33X2 NI
1 0 1 0 0 96 +/-0.6 0 0 1 0 0 27 +/-1.25
R589 1K/F_4 RP52 49.9X2 NI
VCCP
1 0 1 0 1 96 +/-0.5 0 0 1 0 1 27 +/-1.5
CPU_BSEL1 R591 1K/F_4 R528 NI 121
(3) CPUBSEL1 MCH_BSEL1 (5)
1 0 1 1 0 96 +/-0.4 0 0 1 1 0 27 +/-1.75
R529 NI 33
FSC FSB FSA Spread 1 0 1 1 1 96 +/-0.3 0 0 1 1 1 27 +/-2
BSEL2 BSEL1 BSEL0 CPU SRC PCI REF USB DOT % DREFCLK RP37 33X2 NI
1 1 0 0 0 96 3 0 1 0 0 0 27 -0.5
RP53 49.9X2 NI
0 0 0 266.66 100 33.33 14.318 48 96 0.5 Down 1 1 0 0 1 96 2.5 0 1 0 0 1 27 -1
R_PCLK_ICH R6 NI 10K
0 0 1 133.33 100 33.33 14.318 48 96 0.5 Down 1 1 0 1 0 96 2 0 1 0 1 0 27 -1.25
Down
Down
0 1 0 200.00 100 33.33 14.318 48 96 0.5 Down 1 1 0 1 1 96 1.75 0 1 0 1 1 27 -1.5
* 0 1 1 166.66 100 33.33 14.318 48 96 0.5 Down 1 1 1 0 0 96 1.5 0 1 1 0 0 27 -1.75
D
1 0 0 333.33 100 33.33 14.318 48 96 0.5 Down 1 1 1 0 1 96 1.25 0 1 1 0 1 27 -2 D
1 0 1 100.00 100 33.33 14.318 48 96 0.5 Down 1 1 1 1 0 96 1 0 1 1 1 0 27 -2.5
1 1 0 400.00 100 33.33 14.318 48 96 0.5 Down 1 1 1 1 1 96 0.8 0 1 1 1 1 27 -3
1 1 1 200.00 100 33.33 14.318 48 96 0.5 Down QUANTA
Title
COMPUTER
CLOCK GENERATOR
Size Document Number Rev
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