Service Manuals, User Guides, Schematic Diagrams or docs for : Quanta Quanta_BD5
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BD5 Block Diagram 01
se
USB-11
A LCD/CCD Con. P29 A
EXT_LVDS
U
PCI-E
VGA NVIDIA N14P-GV2 EXT_CRT
DDRIII-SODIMM1 Ivy Bridge(UMA+VGA) PCI-E x8 CRT Con. P29
VGA NVIDIA N14M-GL
DDRIII-SODIMM2 35W/45W
P14,15
e
DDR SYSTEM MEMORY
P16, 17, 18, 19, 20, 21, 22 EXT_HDMI
HDMI Level Shift
Dual Channel DDR III HDMI Con.
s
P28 P28
rPGA 989
VRAM DDR3-64M*16
u
VRAM DDR3-128M*16
P3, 4, 5, 6
SATA - HDD
o
P33
FDI DMI
DMI(x4)
B SATA - ODD
P33
SATA 0
SATA 4 SATA
FDI DMI
LCD
t H USB-11
LCD/CCD Con. P29
B
u
VIDEO CRT
USB-3 CRT Con. P29
Touch Panel
o
P38
HDMI HDMI Level Shift
HDMI Con.
y
USB-8 P28 P28
Card Reader
P36 PantherPoint
Daughter Board
USB 2.0 L1 Con.
USB 2.0 L2 Con. P31
USB-2
USB-9
USB2
PCH
L
P8, 9, 10, 11, 12, 13
a PCI-E
PCIE-3
PCIE-4
USB-10 WLAN
Giga/10/100 Lan
P30
n
P35
RTC
u
USB3
USB-0
USB 3.0 R1
BATTERY P31
C Port1 C
Y
P7
SPI
SPI Flash
Azalia IHDA
USB 3.0 R2
g
LPC P9 USB-1
Port2 P31
n
LPC
Xia Audio Codec
P34
FAN K/B Con.
EC
HALL Sensor Touch Pad /B Power /B
P33
POWER SYSTEM
ISL88732HRTZ-T
RT8223P
(Charge)
(System 5V/3V)
P40
P41
r
MIC JACK HP SPK Con. Con. Con. TPS51216RUKR (DDR 1.5V) P42
P34 P34 P34 P3 P38 P29 P38 P38 RT8240BZQW (+VCCIO) P43
o
TPS51462RGER (+VCCSA) P44
D ISL95836HRZ-T (+VCC_CORE) P45 D
G9661-25ADJF12U (+1.8V) P46
F
RT8812A (NV_GPU_CORE) P47
(other GPU) P48
Quanta Computer Inc.
PROJECT : BD5
Size Document Number Rev
1A
Block Diagram
Date: Wednesday, January 16, 2013 Sheet 1 of 50
1 2 3 4 5 6 7 8
5 4 3 2 1
02
se
Table of Contents
PAGE DESCRIPTION BOI-FUNCTIONS Power States
D CONTROL D
POWER PLANE VOLTAGE SIGNAL ACTIVE IN
1 Schematic Block Diagram
U
2 Front Page
+VIN 10V~+19V S0~S5
3-6 Processor CPU
8 - 13 PCH CLG +3V_RTC +3.0V~+3.3V S0~S5
e
14 - 15 DDRIII SO-DIMM DDR
+3V +3.3V MAIN_ON S0
16 - 22 N14P-GV2/N14M-GL VGA
s
23 - 24 VRAM - DDR3 VGA +3V_S5 +3.3V S5_ON S0~S5
28 HDMI comm part HDM
+3VPCU +3.3V AC/DC Insert enable S0~S5
u
29 VGA Connector VGA
LCD Panel LDS +5V +5V MAIN_ON S0
CRT & CRT BUS SWITCH CRT
o
+5V_S5 +5V S5_ON S0~S5
CCD CCD
HALL SENSOR&BACK LIGHT SWITCH HSR +5VPCU +5V AC/DC Insert enable S0~S5
30 MINI Card (Wi-Fi & WIMAX) MNW
H
31 USB Connector USB +1.5VSUS +1.5V S5_ON S0~S3
USB Sleep Charger SLC
+1.5V +1.5V MAIN_ON S0
t
33 HDD HDD
ODD ODD +VCCIO +1.05V MAIN_ON S0
C C
u
34 Audio Codec ADO
+VCCSA ~ HWPG_VCCIO S0
35 Atheros LAN LAN
36 Card reader MMC +VCORE+VGFX ~ MPWROK S0
37
38
EC
KeyBoard
TP&FP board
Power SW
KBC
KBC
TPD,FPD
PSW
+3V_GPU
+VGPU_CORE
+3.3V
~
DGPU_PWR_EN_R
y
DGPU_PWR_EN_RC
o S0
S0
a
39 LED LED
+1.5V_GPU +1.5V GPU_PWR_GD S0
40 Charger PWM
L
41 System 5V/3V PWM +1.05V_GPU +1.05V GPU_PWR_GD S0
42 DDR 1.5V PWM
43 +VCCIO PWM
44 +VCCSA PWM
n
45 +VCORE+VGFX PWM
46 +1.8V / Discharge PWM
u
47 GPU_CORE PWM
48 other GPU PWM
Y
B B
n g
GND PLANE
GND_SIGNAL
PAGE
32
ia
8769GND
37
GND
ALL
ADOGND
34
r X
A
Fo Quanta Computer Inc.
A
PROJECT : Chief River
Size Document Number Rev
1A
POWER STAGE & BOI-FUNCTION
Date: Wednesday, January 16, 2013 Sheet 2 of 50
5 4 3 2 1
5 4 3 2 1
Ivy Bridge Processor (DMI,PEG,FDI) Ivy Bridge Processor (CLK,MISC,JTAG)
{8} DMI_TXN0
{8} DMI_TXN1
B27
B25
A25
U18A
DMI_RX#[0]
DMI_RX#[1]
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
J22
J21
H22
PEG_COMP
U18B
03
{8} DMI_TXN2 DMI_RX#[2] PEG_RXN[0..7] {16}
B24 K33 PEG_RXN0
{8} DMI_TXN3 DMI_RX#[3] PEG_RX#[0] M35 PEG_RXN1
B28 PEG_RX#[1] L34 PEG_RXN2 A28 CLK_CPU_BCLKP_R RP28 3 4 0X2
{8} DMI_TXP0 DMI_RX[0] PEG_RX#[2] BCLK CLK_CPU_BCLKP {10}
MISC
CLOCKS
B26 J35 PEG_RXN3 {9} H_SNB_IVB# C26 A27 CLK_CPU_BCLKN_R 1 2 CLK_CPU_BCLKN {10}
{8} DMI_TXP1 DMI_RX[1] PEG_RX#[3] PROC_SELECT# BCLK#
DMI
A24 J32 PEG_RXN4
se
{8} DMI_TXP2 DMI_RX[2] PEG_RX#[4]
B23 H34 PEG_RXN5 R522 LDS@1K_4
{8} DMI_TXP3 DMI_RX[3] PEG_RX#[5] H31 PEG_RXN6 SKTOCC# AN34
PEG_RX#[6] TP54 SKTOCC#
G21 G33 PEG_RXN7 A16 CLK_DPLL_SSCLKP_R RP9 1 2 PIVEDP@0X2 CLK_CPU_DPP {10}
{8} DMI_RXN0 DMI_TX#[0] PEG_RX#[7] DPLL_REF_CLK
E22 G30 A15 CLK_DPLL_SSCLKN_R 3 4 CLK_CPU_DPN {10}
{8} DMI_RXN1 DMI_TX#[1] PEG_RX#[8] DPLL_REF_CLK#
F21 F35
D {8} DMI_RXN2 DMI_TX#[2] PEG_RX#[9] D
D21 E34 C90
{8} DMI_RXN3 DMI_TX#[3] PEG_RX#[10] E32 *10P/50V_4C TP_CATERR# AL33 R521 LDS@1K_4 +VTT
PEG_RX#[11] TP4 CATERR#
G22 D33
{8} DMI_RXP0 DMI_TX[0] PEG_RX#[12]
D22 D31
{8} DMI_RXP1 DMI_TX[1] PEG_RX#[13]
THERMAL
F20 B33
PCI EXPRESS* - GRAPHICS
{8} DMI_RXP2 DMI_TX[2] PEG_RX#[14]
C21 C32 {37} EC_PECI AN33 R8 CPU_DRAMRST# {27}
{8} DMI_RXP3 DMI_TX[3] PEG_RX#[15] PECI SM_DRAMRST#
PEG_RXP[0..7] {16}
U
DDR3
MISC
J33 PEG_RXP0
PEG_RX[0] L35 PEG_RXP1
PEG_RX[1] K34 PEG_RXP2 H_PROCHOT# R93 56_4 H_PROCHOT#_R AL32 AK1 SM_RCOMP_0 R92 140/F_4
PEG_RX[2] {45} H_PROCHOT# PROCHOT# SM_RCOMP[0]
A21 H35 PEG_RXP3 A5 SM_RCOMP_1 R525 25.5/F_4
{8} FDI_TXN0 FDI0_TX#[0] PEG_RX[3] SM_RCOMP[1]
H19 H32 PEG_RXP4 A4 SM_RCOMP_2 R518 200/F_4
{8} FDI_TXN1 FDI0_TX#[1] PEG_RX[4] SM_RCOMP[2]
E19 G34 PEG_RXP5
{8} FDI_TXN2 FDI0_TX#[2] PEG_RX[5]
F18 G31 PEG_RXP6 PM_THRMTRIP#_R AN32
Intel(R) FDI
{8} FDI_TXN3 FDI0_TX#[3] PEG_RX[6] THERMTRIP#
B21 F33 PEG_RXP7
e
{8} FDI_TXN4 FDI1_TX#[0] PEG_RX[7]
C20 F30
{8} FDI_TXN5 FDI1_TX#[1] PEG_RX[8]
D18 E35
{8} FDI_TXN6 FDI1_TX#[2] PEG_RX[9]
E17 E33
{8} FDI_TXN7 FDI1_TX#[3] PEG_RX[10] F32 AP29 XDP_PRDY#_R TP47
s
PEG_RX[11] D34 PRDY# AP27 XDP_PREQ# C539 *[email protected]/25V_4X
A22 PEG_RX[12] E31 PREQ#
{8} FDI_TXP0 FDI0_TX[0] PEG_RX[13]
G19 C33 AR26 XDP_TCLK
{8} FDI_TXP1 FDI0_TX[1] PEG_RX[14] TCK
PWR MANAGEMENT
E20 B32 AR27 XDP_TMS
JTAG & BPM
{8} FDI_TXP2 FDI0_TX[2] PEG_RX[15] TMS
G18 PEG_TXN[0..7] {16} {8} PM_SYNC AM34 AP30 XDP_TRST#
{8} FDI_TXP3 FDI0_TX[3] PM_SYNC TRST#
u
B20 M29 PEG_TXN0_C C605 [email protected]/10V_4X PEG_TXN0
{8} FDI_TXP4 FDI1_TX[0] PEG_TX#[0]
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