Service Manuals, User Guides, Schematic Diagrams or docs for : Quanta Quanta_BDBD
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1 2 3 4 5 6 7 8
(17.3") Intel Shark Bay Platform Block Diagram 01
A A
Realtek RTD2136R
ILVDS LVDS Interface
DP to LVDS Converter LCD Conn
DDR3L SODIMM1 (STN 8H) CHA0 PAGE 24 PAGE 27 PCB 8L STACK UP
Maximam 4GBs
BOT Side PAGE 13 DDR3L CHA 1600MT/s LAYER 1 : TOP
eDP (5.4Gb/s) IEDP eDP Interface eDP Conn
LAYER 2 : SGND
DDR3L SODIMM2 (STN 4H) CHA1
Intel Proccesor N4K2K PAGE 27 LAYER 3 : IN1(High)
Maximam 4GBs LAYER 4 : SVCC
HDMI (5.4Gb/s)
TOP Side PAGE 14 LAYER 5 : IN2
Haswell PIHM PS8401A 4K2K
HDMI Repeater
Port B
HDMI Conn LAYER 6 : IN3(High)
Processor : Daul / Quad Core PAGE 26 PAGE 26 LAYER 7 : SGND1
DDR3L SODIMM3 (STN 4H) CHB0
Power : 35 / 45 (Watt) LAYER 8: BOT
Maximam 4GBs
Package : rPGA947
BOT Side PAGE 15 DDR3L CHB 1600MT/s BPM Interface
Size : 37.5 x 37.5 (mm) CPU XDP TP
Power Source
PAGE 3-6 PAGE3
DDR3L SODIMM4 (RUV 4H) CHB1
Intersil ISL88732C
Maximam 4GBs
DP SSC PLL CLK 135MHz
OEHM System Charger Power
TOP Side dLVDS
DMI CLK 100MHz
DMI x 4 (2.5Gb/s)
FDI x 2 (2.7Gb/s)
PAGE 16
DP PLL CLK 135MHz
PAGE 37
B B
PEG GEN3 8-LANE N14P-GV2
TPS51123A
dEDP
System 5V/3V Power
DIS VGA PAGE38
PAGE 17-22
TPS51211DSCR
DIS VGA +1.05V PCH Power
PCH VGA PAGE 40
CRT Conn Intel PCH USB3.0 (6Gb/s)
PAGE 27
TPS51216
Port1 Port2 Port3 Port4
+1.35V DDR3L Power
mSATA Conn.
Gen3 as HM87. PCH XDP TP
JTAG Interface Lynx Point USB3.0/2.0 Conn. USB3.0/2.0 Conn. USB3.0/2.0 Conn. USB3.0/2.0 Conn.
PAGE 39
PAGE 28 PAGE 8 HM86/*HM87 PAGE 29 PAGE 29 PAGE 30 PAGE 30
Intersil ISL95812HRZ-T
*Port1 SATA Gen3 (6Gb/s) USB2.0 (480Mb/s) Port0 Port1 Port2 Port3
Platform Controller Hub +VCCIN CPU Power
Port0 Port4 Port3 Power : 3.5 Watt Port10 Port11 Port 9 Port 8 PAGE 41
32.768MHz
25MHz
Package : FCBGA695
WLAN Conn.
ODD Conn.(Gen1) 2nd HDD Conn. 1st HDD Conn. Size : 20 x 20 (mm) mPCIe/TV CCD Camera 3D IR module TV TUNER RT8812A
PAGE 30 PAGE 31 PAGE 31 PAGE 7-12 PAGE 28 PAGE 27 PAGE 27 PAGE 28 VGA_CORE
C C
PAGE 43
Port 12 Port 13
AZALIA
TPS51363RVER
PCIE Gen2 (2.5Gb/s) Port3 Touch Screen
8MB SPI ROM CS0# SPI Interface +1.5V_GFX
PCH(ME+EC+BIOS) Realtek RTS5229
Port4 PAGE 27 PAGE 44
PAGE 8 LPC Interface Card Reader
Atheros 10/100 Power :
Giga LAN PWR SW
Package : QFN24
+3.3V_GFX /+1.05V_GFX
Nuvoton Conexant LAN Controller Size : 4 x 4 (mm)
NPCE985LA0DX CX20755-11Z PAGE 44
Power : PAGE 33
Embedded Controller Audio Codec Package : QFN40
Power : Power :2 Watt Size : 5 x 5 (mm)
NCT5605Y 3ND_SMBus
Extenal GPIO Package : LQFP128 Package : 40-QFN PAGE 26
PAGE 34 Size : 14 x 14 (mm) Size : 5 x 5 (mm)
PAGE 34 PAGE 32 25MHz
APE8872M
CIR AMP(DFN-12)
Touch Pad Conn. Keyboard Conn. FAN Controller ALC105-VE
PAGE 35 PAGE 35 PAGE 3 PAGE 35 PAGE 32
D D
Quanta Computer Inc.
PROJECT : BDBD
Size Document Number Rev
2A
Block Diagram
Date: Monday, December 17, 2012 Sheet 1 of 45
1 2 3 4 5 6 7 8
5 4 3 2 1
02
+5V_S5
AC/DC Insert enable
D AC (Peak 12.85A ,AVG 9A) OCP 15A D
System SYSTEM POWER
Charger RT8223
ISL88731C PWM
DC
PWM +3V_S5
AC/DC Insert enable
(Peak 13.47A ,AVG 9.43A)
+SMDDR_VTERM
SUSON enable
TPS51216 +SMDDR_VTERM
C PWM SUSON enable C
+1.5VSUS
SUSON enable CONTROL Power States
(Peak 17.81A ,AVG 12.46A) POWER PLANE VOLTAGE SIGNAL ACTIVE IN
VIN 10V~+19V S0~S5
+VCCRTC +3.0V~+3.3V S0~S5
TPS51211DSCR +3V +3.3V MAIN_ON S0
+VTT +1.05V
PWM MAINON enable +3V_S5 +3.3V S5_ON S0~S5
(Peak 18.05A ,AVG 12.63A) OCP 20A
+3V_HDP +3.3V MAIN_ON S0
+3VPCU +3.3V AC/DC Insert enable S0
+VCC_CORE +5V +5V MAIN_ON S0
B B
VRON enable +5V_S5 +5V S5_ON S0~S5
ISL958812 (Peak 53A ,AVG 53A)
PWM +5VPCU +5V AC/DC Insert enable S0~S5
+VAXG
VRON enable WIMAX_P +3.3V WMAX_P for WLAN
(Peak 33A ,AVG 23.1A)
+1.8V +1.8V MAIN_ON S0
+1.5V +1.5V MAIN_ON S0
+1.5V_SUS +1.5V SUSON S0~S3
RT8812 +VGPU_CORE
GFX_MAINON +VCC_CORE VRON S0
PWM
(Peak 30A ,AVG 20.5A) +VTT +1.05V MAIN_ON S0
+1.05V +1.05V MAIN_ON S0
+VAXG MPWROK S0
A A
Quanta Computer Inc.
PROJECT : BDBD
Size Document Number Rev
2A
POWER TREE TABLE
Date: Monday, December 17, 2012 Sheet 2 of 45
5 4 3 2 1
5 4 3 2 1
+1.05V VCCST
Haswell Processor (CLK,MISC,JTAG)
Haswell Processor (DMI,PEG,FDI)
03
R573 *0_4
Haswell rPGA EDS C518 Haswell rPGA EDS
U25A *0.1U/10V_4 U25B
E23 PEG_RCOMP TP18 SKTOCC# AP32 MISC AP3 SM_RCOMP_0 R46 100/F_4
PEG_RCOMP PEG_RXN[0..7] 17 SKTOCC SM_RCOMP_0
M29 PEG_RXN0 AR3 SM_RCOMP_1 R45 75/F_4
DDR3
PEG_RXN_0 SM_RCOMP_1
THERMAL
D21 K28 PEG_RXN1 TP19 CATERR# AN32 AP2 SM_RCOMP_2 R48 100/F_4
7 DMI_TXN0 DMI_RXN_0 PEG_RXN_1 CATERR SM_RCOMP_2
C21 M31 PEG_RXN2 10,34 EC_PECI EC_PECI AR27 AN3 CPU_DRAMRST# CPU_DRAMRST# 25
7 DMI_TXN1 DMI_RXN_1 PEG_RXN_2 PECI SM_DRAMRST
B21 L30 PEG_RXN3 TP69 AK31
7 DMI_TXN2 DMI_RXN_2 PEG_RXN_3 FC_AK31
A21 M33 PEG_RXN4 H_PROCHOT# R590 56_4 H_PROCHOT#_R AM30 AR29 XDP_PRDY#
7 DMI_TXN3 DMI_RXN_3 PEG_RXN_4 37,41 H_PROCHOT# PROCHOT PRDY TP5
L32 PEG_RXN5 PM_THRMTRIP# AM35 AT29 XDP_PREQ#
PEG_RXN_5 THERMTRIP PREQ TP64
D20 M35 PEG_RXN6 AM34 XDP_TCLK
PEG
7 DMI_TXP0 DMI_RXP_0 PEG_RXN_6 TCK
C20 L34 PEG_RXN7 AN33 XDP_TMS
JTAG
7 DMI_TXP1 DMI_RXP_1 PEG_RXN_7 TMS
D
B20 E29 AM33 XDP_TRST# D
7 DMI_TXP2 DMI_RXP_2 PEG_RXN_8 TRST
A20 D28 7 PM_SYNC R44 0_4 PM_SYNC_R AT28 AM31 XDP_TDI
7 DMI_TXP3
DMI
PWR
DMI_RXP_3 PEG_RXN_9 E31 R58 0_4 H_PWRGOOD_R AL34 PM_SYNC TDI AL33 XDP_TDO
PEG_RXN_10 10 H_PWRGOOD PWRGOOD TDO TP68
D18 D30 25 PM_DRAM_PWRGD_R PM_DRAM_PWRGD_R AC10 AP33 XDP_DBRST# XDP_DBRST# 7
7 DMI_RXN0 DMI_TXN_0 PEG_RXN_11 SM_DRAMPWROK DBR
C17 E35 10 CPU_PLTRST# R39 0_4 CPU_RST#_R AT26
7 DMI_RXN1 DMI_TXN_1 PEG_RXN_12 PLTRSTIN
B17 D34 AR30 XDP_BPM#0
7 DMI_RXN2 DMI_TXN_2 PEG_RXN_13 BPM_N_0 TP8
A17 E33 AN31 XDP_BPM#1
7 DMI_RXN3 DMI_TXN_3 PEG_RXN_14 BPM_N_1 TP16
E32 3 4 CLK_DPLL_NSCLKN_R G28 AN29 XDP_BPM#2
PEG_RXP[0..7] 17 9 CLK_DPLL_NSCLKN TP15
CLOCK
D17 PEG_RXN_15 L29 PEG_RXP0 1 2 CLK_DPLL_NSCLKP_R H28 DPLL_REF_CLKN BPM_N_2 AP31 XDP_BPM#3
7 DMI_RXP0 DMI_TXP_0 PEG_RXP_0 9 CLK_DPLL_NSCLKP DPLL_REF_CLKP BPM_N_3 TP14
C18 L28 PEG_RXP1 RP27 3 4 0_4P2R CLK_DPLL_SSCLKN_R F27 AP30 XDP_BPM#4
7 DMI_RXP1 DMI_TXP_1 PEG_RXP_1 9 CLK_DPLL_SSCLKN SSC_DPLL_REF_CLKN BPM_N_4 TP6
B18 L31 PEG_RXP2 1 2 CLK_DPLL_SSCLKP_R E27 AN28 XDP_BPM#5
7 DMI_RXP2 DMI_TXP_2 PEG_RXP_2 9 CLK_DPLL_SSCLKP SSC_DPLL_REF_CLKP BPM_N_5 TP3
A18 K30 PEG_RXP3 RP28 3 4 0_4P2R CLK_CPU_BCLKN_R D26 AP29 XDP_BPM#6
7 DMI_RXP3 DMI_TXP_3 PEG_RXP_3 9 CLK_CPU_BCLKN BCLKN BPM_N_6 TP7
L33 PEG_RXP4 1 2 CLK_CPU_BCLKP_R E26 AP28 XDP_BPM#7
PEG_RXP_4 9 CLK_CPU_BCLKP BCLKP TP4
K32 PEG_RXP5 RP29 0_4P2R 2 OF 9 BPM_N_7
PEG_RXP_5 L35 PEG_RXP6
PEG_RXP_6 K34 PEG_RXP7 HSW_RPGA_EDS_PGA
PEG_RXP_7 F29
R585 0_4 FDI_CSYNC_R H29 PEG_RXP_8 E28
7 FDI_CSYNC
FDI
J29 FDI_CSYNC PEG_RXP_9 F31
7 FDI_INT DISP_INT PEG_RXP_10 E30
PEG_RXP_11 F35
PEG_RXP_12 E34
PEG_RXP_13 F33
PEG_RXP_14 D32
PEG_RXP_15
PEG_TXN_0
H35
H34
C_PEG_TXN0_C
C_PEG_TXN1_C
C643
C660
[email protected]/10V_4X
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