Service Manuals, User Guides, Schematic Diagrams or docs for : Quanta Quanta_PB2_PB2A
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5 4 3 2 1
PCB STACK UP
LAYER 1 : TOP
PB2/PB2A BLOCK DIAGRAM 01
LAYER 2 : SGND1 PCI DEVICES IRQ ROUTING
LAYER 3 : IN1 CPU CPU THERMAL
PCI DEVICE IDSEL# REQ# / GNT# Interrupts
LAYER 4 : SVCC SENSOR
LAYER 5 : IN2 R5C832 AD17 REQ0# / GNT0# INT A/B#
Merom 14.318MHz
D
PAG 30 D
LAYER 6 : IN3 478P (uPGA)/35W
LAYER 7 : SGND2 PAG 3,4 CLK_CPU_BCLK,CLK_CPU_BCLK#
LAYER 8 : BOT CLK_MCH_BCLK,CLK_MCH_BCLK# CLOCK GEN
DREFCLK,DREFCLK# ICS9LPR363DGLF
DREFSSCLK,DREFSSCLK# 64pinsTSSOP
PAG 2
CPU CORE MAX8736
PAG 40
NVDIA NB8X
PCI-Express 16X NB8P-SE-256M
SYSTEM POWER MAX8734 HDMI CON
PAG 41 NB8M-SE-128M
DDRII-SODIMM1 DDRII 533,667 MHz PAG 25
NORTH BRIDGE P 15,16,17,18,19,20
DDR II SMDDR_VTERM PAG 12,13
1.8V/1.8VSUS(TPS51116) Crestline
PAG 42
DDRII-SODIMM2 DDRII 533,667 MHz CRT PORT DVI-I PORT
PAG 24 PAG 24 LVDS(1 Channel)
C VCCP +1.5V AND GMCH PAG 12,13 PAG C
1.05V(TPS51124) 5,6,7,8,9,10,11 LCD CNN
PAG 43
PAG 25
DMI LINK NBSRCCLK, NBSRCCLK#
SATA - HDD SATA0 150MB
VGACORE(1.025V)MAX1993
PAG 33
PAG 44 PCI BUS / 33MHz PAG 32 RICOH IEEE1394
PATA (66/100/133)
PATA- CD-ROM RICOH 832 PAG 27
SYSTEM CHARGER(MAX8672) PAG 33 PAG 26~28
PAG 45,46 Memory
0,1,2,3
USB2.0 CardReader
USB2.0 I/O PortsX4 SOUTH BRIDGE PAG 28
4
Bluetooth TV Tune
Voltage Rails 6 ICH-8M PCI-E
WebCam
ON S0~S2 ON S3 ON S4 ON S5 Ctl Signal
Voltage Rails 7 Azalia
Mini_PCI_E
VCC_CORE X VR_ON
8
PAG 20,21,22,23 Mini PCI-E LAN Express E_SATA
VCCP X MAINON TV Tune Card Marvell Card
JMB360
WLAN
B B
SMDDR_VTERM X MAINON 9 M8039 PAG 28
Express Card CONEXANT PAG 33
INT-MIC PAG 31 PAG 32
VGACORE MAINON CX20549
X
PAG 35 PAG 34
VGA1.2 X MAINON LPC E_SATA
RJ45
CIR PAG 32
PAG 33
RVCC3 X X X RVCCD
Flash ITE8512
VCC1.25 MAINON SPI
X MB PCB: DA0PB2MB8D0
PAG 38 USB:32PB2UB0000
VCC1.5 X MAINON MAX9789A SW/B PCB: DA0PB2PI8D0
TP:33PB2TB0000
VCC1.8 X MAIND Keyboard PAGE 38 AUDIO USB/B PCB: DA0PB2TB8D0
Amplifier
SW:34PB2SB0000
VCC2.5 X MAINON Touch Pad PAG 29 MDC DAA TP/B PCB: DA0PB2TR8D0
VCC3 X MAIND PAG 35 CX20548 256M
VCC5 X MAIND PAG 37 MB:31PB2MB0010 /K0 PB2A/NB8P-SE Infineon
MB:31PB2MB0020 /I0 PB2A/NB8P-SE Hynix
1.8VSUS SUSON FAN HP Jack/
X X 128M
Speaker
3VSUS X X SUSD PAG 30
PAG 35 MODEM RJ 11 MB:31PB2MB0000 /L0 PB2/NB8M-SE Infineon
A A
5VSUS X X SUSD MB:31PB2MB0040 /J0 PB2/NB8M-SE Hynix
PAG 37
3VPCU X X X X 8734LDO5
5VPCU X X X X 8734LDO5
15VPCU X X X X 5VPCU Quanta Computer Inc.
PROJECT : PB2
Size Document Number Rev
A
BLOCK DIAGRAM
Date: Friday, March 23, 2007 Sheet 1 of 46
5 4 3 2 1
1 2 3 4 5 6 7 8
VCC3
L23
1 2 CLK_3.3V
CLK_3.3V
14.318MHz
BG614318Q33
XTL-5_3X3_2-3_8-1_2H
02
BLM21PG600SN1D(60,3A)
1
1
1
1
1
1
1
1
1
C425
C423 C452 C435 C462 C449 C454 C441 C438 C475 30P CLK_XIN
10U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
2
2
2
2
2
2
2
2
2
2
FCE P/N:BG614318F84
Y2
14.318MHZ/20P P/N:BG614318Q33
A A
1
CLK_XOUT
C474 30P
3/13 Modify 0==>33 ohm
VCC3
U10
VCC3 VDDCPU CLK_XIN 58
L25 X1 RHCLK_CPU RP47
CPUT_L0 52 4 3 4P2R-S-33 CLK_CPU_BCLK (3)
1 2 VDDCPU 51 RHCLK_CPU# 2 1
R243 R235 ICS9PR363DGLF CPUC_L0 CLK_CPU_BCLK# (3)
BLM21PG600SN1D(60,3A) 49 RHCLK_MCH RP44 4 3 4P2R-S-33
CPUT_L1F CLK_MCH_BCLK (5)
1
1
C450 *10K *10K CLK_XOUT 57 48 RHCLK_MCH# 2 1
X2 CPUC_L1F CLK_MCH_BCLK# (5)
0.1U
10U C445 62 44 RSRC_TV RP42 4 3 4P2R-S-33
(22) PM_STPCPU# CLK_PCIE_MINI_TV (31)
2
2 CPU_STOP# CPUITPT_L2/PCIET_L8
63 43 RSRC_TV# 2 1
(22) PM_STPPCI# PCI/PCIEX_STOP# CPUITPC_L2/PCIEC_L8 CLK_PCIE_MINI_TV# (31)
CGCLK_SMB 54 R218 33
(13) CGCLK_SMB SCLK VGA_27M_IN (14)
VCC3 VDDA CGDAT_SMB 55
L24 (13) CGDAT_SMB SDATA R_DREFSSCLK RP45
27FIX/LCD_SSCGT/PCIET_L0 17 2 1 *4P2R-S-33 DREFSSCLK (6)
1 2 VDDA 18 R_DREFSSCLK# 4 3
27SS/LCD_SSCGC/PCIEC_L0 DREFSSCLK# (6)
BLM21PG600SN1D(60,3A) CLKUSB_48 R241 33 R215 33
(22) CLKUSB_48 VGA_27M_SSIN (14)
1
1
C434 CLK_BSEL0 R236 2.2K 12
C442 R223 10K CLK_BSEL1 FSA/USB_48MHZ RSRC_SATA RP37
VCC3 16 FSB/TEST_MODE SATACLKT_L 26 2 1 4P2R-S-33 CLK_PCIE_SATA (20)
10U 0.1U R229 10K CLK_BSEL2 61 27 RSRC_SATA# 4 3 CLK_PCIE_SATA# (20)
2
2
FSC/REF1/TEST_SEL SATACLKC_L
14M_ICH R224 33 60 19 R_CLK_PCIE_VGARP43 2 1 4P2R-S-33
(22) 14M_ICH REF0 PCIET_L1 CLK_PCIE_VGA (19)
20 R_CLK_PCIE_VGA# 4 3
PCIEC_L1 CLK_PCIE_VGA# (19)
VCC3 22 CLK_PCIE_NEW RP41 2 1 4P2R-S-33
B PCIET_L2 CLK_PCIE_NEW_C (28) B
CLK_3.3V 1 23 CLK_PCIE_NEW# 4 3
VDDPCI PCIEC_L2 CLK_PCIE_NEW_C# (28)
7 VDDPC1
11 24 RSRC_ICH RP39 2 1 4P2R-S-33
VDD48 PCIET_L3 CLK_PCIE_ICH (21)
25 RSRC_ICH# 4 3
PCIEC_L3 CLK_PCIE_ICH# (21)
Q14 R220 R216 56 30 CLK_PCIE_MINI_ RP35 2 1 4P2R-S-33
VDDREF PCIET_L4 CLK_PCIE_MINI_WLAN (31)
2
10K 10K 21 31 CLK_PCIE_MINI_# 4 3
VDDPCIEX PCIEC_L4 CLK_PCIE_MINI_WLAN# (31)
2N7002E 28
CGDAT_SMB VDDPCIEX RSRC_MCH RP36
(22,28,31) PDAT_SMB 3 1 42 VDDPCIEX PCIET_L5 36 4 3 4P2R-S-33 CLK_PCIE_3GPLL (6)
VDDCPU 50 35 RSRC_MCH# 2 1
VDDCPU PCIEC_L5 CLK_PCIE_3GPLL# (6)
VCC3 R203 1K/F 47 39 RSRC1_LAN RP38 4 3 4P2R-S-33
VREF PCIET_L6 CLK_PCIE_LAN (32)
VDDA 45 38 RSRC1_LAN# 2 1
VDDA PCIEC_L6 CLK_PCIE_LAN# (32)
VCC3 R204 220/F
P/N:CS12202FB14 41 PCIE_JMB360 RP40 4 3 4P2R-S-33
PEREQ1#/PCIET_L7 CLK_PCIE_JMB360 (33)
Q15 P/N:CS12202FB06 40 PCIE_JMB360# 2 1
PEREQ2#/PCIEC_L7 CLK_PCIE_JMB360# (33)
2
(22) CK_PWG 10 VTTPWR_GD/PD# *PEREQ3# 32
2N7002E 33 R_PCIE_REQ3# R193 475/F
*PEREQ4# PCIE_REQ3# (28)
3 1 CGCLK_SMB RP46 1 2 *4P2R-S-0 R_DREFCLK 14 R_PCIE_REQ4# R194 475/F
(22,28,31) PCLK_SMB (6) DREFCLK PCIET_L9/DOTT_96MHZ PCIE_REQ4# (6)
3 4 R_DREFCLK# 15
(6) DREFCLK# PCIEC_L9/DOTC_96MHZL
PWRSAVE# 34 64 R_PCLK_DEBUG R247 22 PCLK_DEBUG
*PWRSAVE# **REQ_SEL/PCICLK0 PCLK_DEBUG (31)
(96MHz)
37 3 R_PCLK_R5C832 R234 33 PCLK_R5C832
GND PCICLK1 PCLK_R5C832 (26)
2 GND PCICLK2 4
6 GND 3/16 Modify 33==>22 ohm
13 5 SELPCIEX0_LCD#
* Internal pull up to VDD GND *SELPCIEX0_LCD#/PCICLK3
R_PCLK_DEBUG 29 GND
**Internal pull down to 53 8 R_PCLK_ICH R232 22 PCLK_ICH
CPU Clock select GND H:PEREQ 59
GND ITP_EN/PCICLK_F4
9 R_PCI_CLK_8512 R221 22 PCI_CLK_8512
PCLK_ICH (21)
GND *SELLCD_27#/PCICLK_F5 PCI_CLK_8512 (38)
46 GNDA
CPU_BSEL0 R214 0 CLK_BSEL0 R222 0 L:PCI_E
(3) CPU_BSEL0 MCH_BSEL0 (6)
C R217 *56 ALLPR363K00 C
VCCP P/N:ALLPR363K00 VER:D 3/16 Modify 15p==>10p
R246 *10K VCC3
R225 1K/F VCC3 14M_ICH C458 15P
R237 *10K VCC3
R_PCI_CLK_8512 PCIE_REQ3# R191 10K PCLK_DEBUG C466 10P
R_PCLK_DEBUG R242 10K
L:27M PWRSAVE# R197 *10K CLKUSB_48 C465 15P
R_PCI_CLK_8512 R219 10K
H:PCI_E SELPCIEX0_LCD# R227 *10K PCI_CLK_8512 C457 10P
R_PCLK_ICH R233 10K
FSC FSB FSA Spread 96/100M R239 10K PCLK_ICH C470 10P
BSEL2 BSEL1 BSEL0 CPU SRC PCI REF USB DOT %
0 0 0 266.66 100 33.33 14.318 48 96 0.5 Down PCIE_REQ4# R195 10K VCC3
0 0 1 133.33 100 33.33 14.318 48 96 0.5 Down 10/24 modify
ITP_EN(PIN8)
* 0 1 0 200.00 100 33.33 14.318 48 96 0.5 Down
LOW : PIN43/44 SRC
0 1 1 166.66 100 33.33 14.318 48 96 0.5 Down PIN 5 PIN 9 Pin14/15 Pin17/187
HIGH : PIN43,44 CPUITP
1 0 0 333.33 100 33.33 14.318 48 96 0.5 Down
PCIE_REQ1# PCIE_L0 PCIE_L6 LO (10K) PCIEX9 27M
1 0 1 100.00 100 33.33 14.318 48 96 0.5 Down LO (10K)
PCIE_REQ2# PCIE_L1 PCIE_L8 HI (NC) DOT96 LCD
1 1 0 400.00 100 33.33 14.318 48 96 0.5 Down
PCIE_REQ3# PCIE_L2 PCIE_L4 LO (10K) PCIEX9 PCIEX0
1 1 1 200.00 100 33.33 14.318 48 96 0.5 Down HI (NC)
PCIE_REQ4# PCIE_L3 PCIE_L5 PCIE_L7 HI (NC) DOT96 PCIEX0
D D
1.Level 1 Environment-related Substances Should NEVER be Used.
2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.
Quanta Computer Inc.
PROJECT : PB2
Size Document Number Rev
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