Service Manuals, User Guides, Schematic Diagrams or docs for : Quanta Quanta_ZRJ
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5 4 3 2 1
C743 ZRJ BLOCK DIAGRAM 01 GPU CORE PWR
RT8204 P45
CHARGER
ISL88731 P53
GPU IO PWR 3/5V SYS PWR
UP6111AQDD P46 RT8206 P52
D D
intel Discharger/+3V_M
P54
CPU CORE PWR
ISL95831 P43~P44
X'TAL
27.0MHz
Channel A +1.8V CPU +1.05V_VTT
VRAM GDDR3 UP61111AQDD P51 UP61111AQDD P47
DDR SYSTEM MEMORY
SandyBridge nVIDIA GPU Channel B 64(or 128)Mb x16 x8 pcs
PCIE X16
QC /DC 35W PCI-E N12GS & N12GV Fermi P14, 15 CPU iGPU_CORE PCH +1.05V
X16 P45 P49
EXT_HDMI RT8204 UP61111AQDD
Package GB2-128
rPGA 37.5mm)
988 Optimus (Muxless)
EXT_CRT
DDR III - SODIMM 0 Dual Channel DDR III (37.5mm X +0.85V DDR3 PWR
1066/1333 MHz P16~P22 EXT_LVDS ISL62871 P48 RT8207A P50
DDR III - SODIMM 1
P14, 15 FDI CLK DMI
P4~P7 5GT/s CRT P24
C C
FDI interface X4 DMI interface
2.7GT/s 5GT/s
SATA0 USB-8 LVDS
HDD (SATA) FDI CLK DMI
INT_CRT P24
P25
intel
iGFX Interfaces
SATA Gen3 INT_LVDS
SATA5
ODD (SATA) SATA Gen2
P25
INT_HDMI HDMI
USB 2.0 P24
USB 2.0 * 3
CougarPoint 0.7 PCI-E
USB0,1,2 P27 USB
Bluetooth
HDA
USB9 P27 PCI-Express Gen2
B
mBGA 25mm)
(25mm X
989 B
5GT/s
PCIE6 PCIE1 PCIE2
CCD Azalia Note:
USB6 P24 HM65 not support USB 6 & 7 Giga LAN Mini Card Mini Card CardReader
RTC HM65 not support SATA 2 & 3
P8~P13 X'TAL X'TAL Arthohorus AR8151
X'TAL P9
25MHz 25MHz WiFi +BT (Half) 3G Realtek RTS5209
32.768KHz
SPI LPC P26 USB3 P28 USB4 P28 USB5 P23
USB3 USB4
Audio CODEC Transformer SIM Card Conn
WPCE791/FLASH P26
CONEXANT CX20584-21Z Dual SPI ROM DB P28
4MB x1 (Basic ME+Braidwood) NPCE971
P30 P9 P31
RJ45
P26
A A
HP Jack MIC Jack SPK DMIC SPI ROM Touch Pad Keyboard Light Sensor Button on Fan Driver Quanta Computer Inc.
(PWM Type)P42
P30 P30 P30 P24 P31 P29 P29 P33 mechanical key P31 PROJECT : ZRJ
Size Document Number Rev
1A
Block Diagram
Date: Thursday, December 23, 2010 Sheet 1 of 41
5 4 3 2 1
1 2 3 4 5 6 7 8
02
N12P-GE Power Up Sequence MS15-UMA Power-ON Sequence
ACIN
MAINON +3VPCU/+5VPCU
A NBSWON# A
DGPU_VRON
S5_ON
T1
RSMRST#
+3V_GPU(VDD3) T2
EC_PWRBTN#
+1.05V_GPU(PEX_VDD)
SLP_S5#,SLP_S4#,SLP_S3#
tNVVDD
SUSON
+VGPU_CORE(NVVDD)
tNV-IFPAB_IOVDD MAINON T3
T5
MAINON2
+1.8V_GPU(IFPAB_IOVDD)
+1.5VSUS/+3VSUS/+5VSUS
tNV-FBVDDQ
+1.5V/+1.8V/+3V/+5V
B B
+1.5V_GPU(FBVDDQ)
+1.05V_PCH/+1.05V_VTT/+0.75V_DDR_VTT
N12P-GE Power up Sequence
tNVVDD>0 HWPG
tNV-IFPAB_IOVDD>0
VRON
tNV-FBVDDQ>0 T10
CPU SVID BUS
+VCC_CORE
+VCC_GFX
T9
Deep S4/S5 off-on Sequence IMVP_PWRGD
+3V_DSW T4
EC_PWROK
DWPROK
SYS_PWROK T8
SUSWARN#
C C
SUS_ACK# DRAMPWROK T6
UNCOREPWRGOOD
SLP_SUS#
SUS_STAT# T7
PLTRST#
RSMRST#
T1
System Power Sequence
S5_ON T1: S5_ON TO RSMRST# = 30ms (spec:mini 10ms)
T2: RSMRST# TO EC_PWRBTN# = 110ms (spec:mini 100ms)
+3V_S5/+5V_S5 T3: MAINON2 TO VRON = 110ms (spec:mini 99ms)
T4: VRON TO EC_PWROK = 10ms (HWPG NEED TO BE HIGH at that time)
T5: MAINON to MAINON2 =500us
Deep S4/S5 Sequence
T6: EC_PWROK to UNCOREPWRGOOD =2ms(Min)
T1: S5_ON TO RSMRST# = 30ms (spec:mini 10ms)
T7: SUS_STAT# to PLTRST# =60us(Min)
T8: SYS_PWROK to SUS_STAT# =1ms(Min)
T9: +VCC_CORE to IMVP_PWRGD =5ms(Max)
T10: VRON to accept SVID command. =5ms(Max)
D D
Quanta Computer Inc.
PROJECT : ZRJ
Size Document Number Rev
1A
Frontpage
Date: Monday, December 13, 2010 Sheet 2 of 41
1 2 3 4 5 6 7 8
5 4 3 2 1
03
D D
+3V_S5 +3V_S5
+3V_GPU +3V_GPU
+3V_GPU
2.2K 2.2K
N12P-GE
2.2K 2.2K
SMB_ME0_CLK
G
D S I2CS_SCL
NMOS
SMB_ME0_DAT
G
D S I2CS_SDA
NMOS
+3V_S5 +3V_S5 +3VPCU +3VPCU
+3V_S5
C C
intel 2.2K 2.2K 6.8K 6.8K
G
SMB_ME1_CLK S NMOS
D MBCLK EC
G
ITE 8518
SMB_ME1_DAT S D MBDATA
CougarPoint 0.7 NMOS
mBGA 989
+3V_S5 +3V_S5 +3V +3V
(25mm X
25mm) +3V_S5
Slave ADDRESS :A0H Slave ADDRESS :A4H
DDR3 DIMM-0-STD VREF DQ0 DDR3 DIMM-1-STD VREF DQ1
B (5.2H) M2 Solution (9.2H) M2 Solution B
2.2K 2.2K 4.7K 4.7K
G
SMB_PCH_CLK D S SMB_RUN_CLK
NMOS
G
SMB_PCH_DAT D S SMB_RUN_DAT
NMOS
A A
Quanta Computer Inc.
PROJECT : ZRJ
Size Document Number Rev
1A
SMBus Address
Date: Monday, December 13, 2010 Sheet 3 of 41
5 4 3 2 1
5 4 3 2 1
Sandy Bridge Processor (DMI,PEG,FDI)
[8]
[8]
DMI_TXN0
DMI_TXN1
B27
B25
U26A
DMI_RX#[0]
DMI_RX#[1]
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
J22
J21
H22
PEG_COMP
PEG_RXN[0..15] [16]
Sandy Bridge Processor (CLK,MISC,JTAG)
U26B 04
[8] DMI_TXN2 A25 DMI_RX#[2]
B24 K33 PEG_RXN0 SNB_IVB# N.A at SNB EDS #27637 0.7v1 A28 CLK_CPU_BCLKP [10]
[8] DMI_TXN3
MISC
CLOCKS
DMI_RX#[3] PEG_RX#[0] PEG_RXN1 BCLK
PEG_RX#[1] M35 [9] H_SNB_IVB# C26 PROC_SELECT# BCLK# A27 CLK_CPU_BCLKN [10]
B28 L34 PEG_RXN2
[8] DMI_TXP0 DMI_RX[0] PEG_RX#[2]
D B26 J35 PEG_RXN3 D
[8] DMI_TXP1 DMI_RX[1] PEG_RX#[3]
DMI
A24 J32 PEG_RXN4 SKTOCC# AN34
[8] DMI_TXP2 DMI_RX[2] PEG_RX#[4] TP3 SKTOCC#
B23 H34 PEG_RXN5 A16 CLK_DPLL_SSCLKP [10]
[8] DMI_TXP3 DMI_RX[3] PEG_RX#[5] DPLL_REF_CLK
H31 PEG_RXN6 A15 CLK_DPLL_SSCLKN [10]
PEG_RX#[6] PEG_RXN7 DPLL_REF_CLK#
[8] DMI_RXN0 G21 DMI_TX#[0] PEG_RX#[7] G33
E22 G30 PEG_RXN8
[8] DMI_RXN1 DMI_TX#[1] PEG_RX#[8]
F21 F35 PEG_RXN9 TP_CATERR# AL33
[8] DMI_RXN2 DMI_TX#[2] PEG_RX#[9] TP1 CATERR#
D21 E34 PEG_RXN10
[8] DMI_RXN3 DMI_TX#[3] PEG_RX#[10]
E32 PEG_RXN11
PEG_RX#[11]
THERMAL
G22 D33 PEG_RXN12
[8] DMI_RXP0 DMI_TX[0] PEG_RX#[12]
D22 D31 PEG_RXN13 [11,32] EC_PECI AN33 R8 CPU_DRAMRST# [5]
[8] DMI_RXP1 DMI_TX[1] PEG_RX#[13] PECI SM_DRAMRST#
F20 B33 PEG_RXN14
PCI EXPRESS* - GRAPHICS
[8] DMI_RXP2
DDR3
MISC
DMI_TX[2] PEG_RX#[14] PEG_RXN15
[8] DMI_RXP3 C21 C32 PEG_RXP[0..15] [16]
DMI_TX[3] PEG_RX#[15]
J33 PEG_RXP0 [32,35] H_PROCHOT# R185 56_4 H_PROCHOT#_R AL32 AK1 SM_RCOMP_0 R179 140/F_4
PEG_RX[0] PEG_RXP1 PROCHOT# SM_RCOMP[0] SM_RCOMP_1 R139 25.5/F_4
PEG_RX[1] L35 SM_RCOMP[1] A5
K34 PEG_RXP2 A4 SM_RCOMP_2 R142 200/F_4
PEG_RX[2] PEG_RXP3 SM_RCOMP[2]
[8] FDI_TXN0 A21 FDI0_TX#[0] PEG_RX[3] H35
H19 H32 PEG_RXP4 [11] PM_THRMTRIP# AN32
[8] FDI_TXN1 FDI0_TX#[1] PEG_RX[4] THERMTRIP#
E19 G34 PEG_RXP5
[8] FDI_TXN2 FDI0_TX#[2] PEG_RX[5] PEG_RXP6
Intel(R) FDI
[8] FDI_TXN3 F18 G31
FDI0_TX#[3] PEG_RX[6] PEG_RXP7
[8] FDI_TXN4 B21 FDI1_TX#[0] PEG_RX[7] F33
C20 F30 PEG_RXP8
[8] FDI_TXN5 FDI1_TX#[1] PEG_RX[8]
D18 E35 PEG_RXP9 AP29 XDP_PRDY# TP22
[8] FDI_TXN6 FDI1_TX#[2] PEG_RX[9] PRDY#
E17 E33 PEG_RXP10 AP27 XDP_PREQ#
[8] FDI_TXN7 FDI1_TX#[3] PEG_RX[10] PREQ#
F32 PEG_RXP11
PEG_RX[11] PEG_RXP12 XDP_TCLK
D34 AR26
PEG_RX[12] TCK
PWR MANAGEMENT
PEG_RXP13 XDP_TMS
JTAG & BPM
[8] FDI_TXP0 A22 E31 AR27
FDI0_TX[0] PEG_RX[13] PEG_RXP14 TMS XDP_TRST#
[8] FDI_TXP1 G19 C33 PEG_TXN[0..15] [16] [8] PM_SYNC AM34 AP30
FDI0_TX[1] PEG_RX[14] PEG_RXP15 PM_SYNC TRST#
[8] FDI_TXP2 E20 B32
FDI0_TX[2] PEG_RX[15] XDP_TDI
C [8] FDI_TXP3 G18 FDI0_TX[3] TDI AR28 C
B20 M29 PEG_TXN0_C C598 [email protected]/6.3V_4PEG_TXN0 AP26 XDP_TDO
[8] FDI_TXP4 FDI1_TX[0] PEG_TX#[0] TDO
C19 M32 PEG_TXN1_C C623 [email protected]/6.3V_4PEG_TXN1 [11,32] H_PW RGOOD AP33
[8] FDI_TXP5 FDI1_TX[1] PEG_TX#[1] UNCOREPWRGOOD
D19 M31 PEG_TXN2_C C600 [email protected]/6.3V_4PEG_TXN2 R202 10K_4
[8] FDI_TXP6 FDI1_TX[2] PEG_TX#[2]
F17 L32 PEG_TXN3_C C625 [email protected]/6.3V_4PEG_TXN3 C372 0.1U/10V_4
[8] FDI_TXP7 FDI1_TX[3] PEG_TX#[3]
L29 PEG_TXN4_C C602 [email protected]/6.3V_4PEG_TXN4 AL35 XDP_DBRST# XDP_DBRST# [8]
PEG_TX#[4] PEG_TXN5_C C627 [email protected]/6.3V_4PEG_TXN5 PM_DRAM_PW RGD_R DBR#
[8] FDI_FSYNC0 J18 K31 V8
FDI0_FSYNC PEG_TX#[5] PEG_TXN6_C C604 [email protected]/6.3V_4PEG_TXN6 SM_DRAMPWROK
[8] FDI_FSYNC1 J17 FDI1_FSYNC PEG_TX#[6] K28
J30 PEG_TXN7_C C629 [email protected]/6.3V_4PEG_TXN7 AT28
PEG_TX#[7] PEG_TXN8_C C606 [email protected]/6.3V_4PEG_TXN8 R205 75_4 BPM#[0]
[8] FDI_INT H20 J28 +1.05V_VTT AR29
FDI_INT PEG_TX#[8] PEG_TXN9_C C631 [email protected]/6.3V_4PEG_TXN9 BPM#[1]
PEG_TX#[9] H29 BPM#[2] AR30
J19 G27 PEG_TXN10_C C608 [email protected]/6.3V_4PEG_TXN10 CPU_PLTRST# R204 43_4 CPU_PLTRST#_R AR33 AT30
[8] FDI_LSYNC0 FDI0_LSYNC PEG_TX#[10] RESET# BPM#[3]
H17 E29 PEG_TXN11_C C633 [email protected]/6.3V_4PEG_TXN11 AP32
[8] FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11] BPM#[4]
F27 PEG_TXN12_C C610 [email protected]/6.3V_4PEG_TXN12 AR31
PEG_TX#[12] PEG_TXN13_C C635 [email protected]/6.3V_4PEG_TXN13 BPM#[5]
D28 AT31
PEG_TX#[13] PEG_TXN14_C C612 [email protected]/6.3V_4PEG_TXN14 BPM#[6]
PEG_TX#[14] F26 BPM#[7] AR32
E25 PEG_TXN15_C C637 [email protected]/6.3V_4PEG_TXN15 PEG_TXP[0..15] [16]
PEG_TX#[15]
A18
eDP_COMP eDP_COMPIO PEG_TXP0_C C599 [email protected]/6.3V_4PEG_TXP0
A17 M28
INT_eDP_HPD_Q eDP_ICOMPO PEG_TX[0] PEG_TXP1_C C624 [email protected]/6.3V_4PEG_TXP1
B16 eDP_HPD PEG_TX[1] M33
M30 PEG_TXP2_C C601 [email protected]/6.3V_4PEG_TXP2 CPU-989P-rPGA
PEG_TX[2] PEG_TXP3_C C626 [email protected]/6.3V_4PEG_TXP3
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