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Samsung Spinpoint V40


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Product Manual
                 3.5" Hard Disk Drives




  SPINPOINT V40




                  JULY 7, 2001 (Rev 1.0)
ii   SpinPoint V40 Product Manual
                                               TABLE OF CONTENTS
CHAPTER 1             SCOPE .................................................................................................................................. 1
 1.1       USER DEFINITION ............................................................................................................................... 1
 1.2       MANUAL ORGANIZATION ................................................................................................................... 1
 1.3       TERMINOLOGY AND CONVENTIONS .................................................................................................... 2
 1.4       REFERENCE......................................................................................................................................... 3
CHAPTER 2             DESCRIPTION.................................................................................................................... 4
 2.1       INTRODUCTION ................................................................................................................................... 4
 2.2       KEY FEATURES ................................................................................................................................... 4
 2.3       STANDARDS AND REGULATIONS......................................................................................................... 5
 2.4       HARDWARE REQUIREMENTS .............................................................................................................. 5
CHAPTER 3             SPECIFICATIONS.............................................................................................................. 6
 3.1       SPECIFICATION SUMMARY .................................................................................................................. 6
 3.2       PHYSICAL SPECIFICATIONS ................................................................................................................. 7
 3.3       LOGICAL CONFIGURATIONS ................................................................................................................ 7
 3.4       PERFORMANCE SPECIFICATIONS ......................................................................................................... 8
 3.5       POWER REQUIREMENTS ...................................................................................................................... 9
 3.6       ENVIRONMENTAL SPECIFICATIONS ................................................................................................... 10
 3.7       RELIABILITY SPECIFICATIONS .......................................................................................................... 11
CHAPTER 4             INSTALLATION ............................................................................................................... 12
 4.1     SPACE REQUIREMENTS ..................................................................................................................... 12
 4.2     UNPACKING INSTRUCTIONS .............................................................................................................. 13
 4.3     MOUNTING ....................................................................................................................................... 13
    4.3.1    Orientation ............................................................................................................................... 13
    4.3.2    Clearance ................................................................................................................................. 15
    4.3.3    Ventilation ............................................................................................................................... 16
 4.4     CABLE CONNECTORS ........................................................................................................................ 16
    4.4.1    DC Power Connector ............................................................................................................... 16
    4.4.2    AT-Bus Interface Connector .................................................................................................... 16
 4.5     JUMPER BLOCK CONFIGURATIONS.................................................................................................... 18
 4.6     DRIVE INSTALLATION ....................................................................................................................... 20
 4.7     SYSTEM STARTUP PROCEDURE ......................................................................................................... 21
    4.7.1    Drive Installation to Access the Full Capacity Using 32GB Clip ............................................ 22
CHAPTER 5             DISK DRIVE OPERATION............................................................................................. 23
 5.1     HEAD / DISK ASSEMBLY (HDA)....................................................................................................... 23
    5.1.1    Base Casting Assembly............................................................................................................ 23
    5.1.2    DC Spindle Motor Assembly................................................................................................... 23
    5.1.3    Disk Stack Assembly ............................................................................................................... 25
    5.1.4    Head Stack Assembly .............................................................................................................. 25
    5.1.5    Voice Coil Motor and Actuator Latch Assemblies .................................................................. 25
    5.1.6    Air Filtration System................................................................................................................ 25
 5.2     DRIVE ELECTRONICS ........................................................................................................................ 26
    5.2.1    Digital Signal Process and Interface Controller ....................................................................... 26
    5.2.2    AT Disk Controller .................................................................................................................. 26
        5.2.2.1       The Host Interface Control Block ........................................................................................................28
        5.2.2.2       The Buffer Control Block ....................................................................................................................29
        5.2.2.3       The Disk Control Block .......................................................................................................................29
        5.2.2.4       The Disk ECC Control Block...............................................................................................................31
        5.2.2.5       Frequency Synthesizer .........................................................................................................................31
        5.2.2.6       Power Management..............................................................................................................................31
    5.2.3          Read/Write IC .......................................................................................................................... 31

SpinPoint V40 Product Manual                                                                                                                                       iii
        5.2.3.1       Time Base Generator ........................................................................................................................... 32
        5.2.3.2       Automatic Gain Control ...................................................................................................................... 32
        5.2.3.3       Asymmetry Correction Circuitry (ASC).............................................................................................. 32
        5.2.3.4       Analog Anti-Aliasing Low Pass Filter................................................................................................. 32
        5.2.3.5       Analog to Digital Converter (ADC) and FIR ...................................................................................... 32
 5.3     SERVO SYSTEM ................................................................................................................................. 34
 5.4     READ AND WRITE OPERATIONS ........................................................................................................ 34
    5.4.1    The Read Channel .................................................................................................................... 34
    5.4.2    The Write Channel ................................................................................................................... 35
 5.5     FIRMWARE FEATURES ....................................................................................................................... 35
    5.5.1    Read Caching ........................................................................................................................... 35
    5.5.2    Write Caching .......................................................................................................................... 36
    5.5.3    Defect Management ................................................................................................................. 37
    5.5.4    Automatic Defect Allocation ................................................................................................... 37
    5.5.5    Multi-burst ECC Correction..................................................................................................... 37
    5.5.6    SMART .................................................................................................................................... 37
    5.5.7    AAM........................................................................................................37
CHAPTER 6             AT INTERFACE AND ATA COMMANDS.................................................................... 39
 6.1     INTRODUCTION ................................................................................................................................. 39
 6.2     PHYSICAL INTERFACE ....................................................................................................................... 39
    6.2.1    Signal Conventions .................................................................................................................. 39
    6.2.2    Signal Summary ....................................................................................................................... 39
    6.2.3    Signal Descriptions .................................................................................................................. 40
        6.2.3.1       CS1FX- (Drive Chip Select 0)............................................................................................................. 40
        6.2.3.2       CS3FX- (Drive Chip Select 1)............................................................................................................. 40
        6.2.3.3       DA0-2 (Drive Address Bus) ................................................................................................................ 40
        6.2.3.4       DASP- (Drive Active/Slave Present)................................................................................................... 40
        6.2.3.5       DD0-DD15 (Drive Data Bus).............................................................................................................. 40
        6.2.3.6       DIOR- (Drive I/O Read)...................................................................................................................... 40
        6.2.3.7       DIOW- (Drive I/O Write).................................................................................................................... 40
        6.2.3.8       DMACK- (DMA Acknowledge) ......................................................................................................... 41
        6.2.3.9       DMARQ (DMA Request) ................................................................................................................... 41
        6.2.3.10        INTRQ (Drive Interrupt)................................................................................................................. 41
        6.2.3.11        IOCS16- (Drive 16-bit I/O)............................................................................................................. 41
        6.2.3.12        IORDY (I/O Channel Ready).......................................................................................................... 42
        6.2.3.13        PDIAG- (Passed Diagnostics)......................................................................................................... 42
        6.2.3.14        RESET- (Drive Reset)..................................................................................................................... 42
 6.3     LOGICAL INTERFACE......................................................................................................................... 46
    6.3.1    General ..................................................................................................................................... 46
        6.3.1.1       Bit Conventions................................................................................................................................... 46
        6.3.1.2       Environment ........................................................................................................................................ 46
      6.3.2        I/O Register - Address.............................................................................................................. 48
      6.3.3        Control Block Register Descriptions........................................................................................ 49
        6.3.3.1       Alternate Status Register (3F6h) ......................................................................................................... 49
        6.3.3.2       Drive Address Register (3F7h)............................................................................................................ 49
        6.3.3.3       Device Control Register (3F6h)........................................................................................................... 49
      6.3.4        Command Block Register Descriptions ................................................................................... 50
        6.3.4.1       Data Register (1F0h) ........................................................................................................................... 50
        6.3.4.2       Features Register (1F1h) ..................................................................................................................... 50
        6.3.4.3       Sector Number Register (1F3h)........................................................................................................... 50
        6.3.4.4       Error Register (1F1h) .......................................................................................................................... 50
        6.3.4.5       Sector Count Register (1F2h) .............................................................................................................. 51
        6.3.4.6       Cylinder High Register (1F5h) ............................................................................................................ 51
        6.3.4.7       Cylinder Low Register (1F4h)............................................................................................................. 51
        6.3.4.8       Command Register (1F7h) .................................................................................................................. 51
        6.3.4.9       Drive/Head Register (1F6h) ................................................................................................................ 51
        6.3.4.10        Status Register (1F7h)..................................................................................................................... 52
 6.4     AT COMMAND REGISTER DESCRIPTIONS .......................................................................................... 53
    6.4.1    Check Power Mode (98h, E5h) ................................................................................................ 56
    6.4.2    Download Micro Code (92h) ................................................................................................... 56
    6.4.3    Execute Device Diagnostics (90h) ........................................................................................... 56
 iv                                                                                                     SpinPoint V40 Product Manual
       6.4.4         Flush Cache (E7h).................................................................................................................... 57
       6.4.5         Format Track (50h) .................................................................................................................. 57
       6.4.6         Identify Device (ECh).............................................................................................................. 57
       6.4.7         Idle (97h,E3h) .......................................................................................................................... 62
       6.4.8         Idle Immediate (95h,E1h) ........................................................................................................ 62
       6.4.9         Initialize Device Parameters (91h)........................................................................................... 62
       6.4.10        Read Buffer (E4h).................................................................................................................... 63
       6.4.11        Read DMA (C8h:with retry, C9h:without retry)..................................................................... 63
       6.4.12        Read Long (22h:with retry, 23h: without retry) ...................................................................... 63
       6.4.13        Read Multiple Command (C4h)............................................................................................... 64
       6.4.14        Read Native Max Address (F8h).............................................................................................. 65
       6.4.15        Read Sector(s) (20h:with retry, 21h:without retry) ................................................................. 65
       6.4.16        Read Verify Sector(s) (40h:with retry, 41h:without retry)...................................................... 66
       6.4.17        Recalibrate (1xh)...................................................................................................................... 66
       6.4.18        Seek (7xh) ................................................................................................................................ 66
       6.4.19        Set Features (EFh).................................................................................................................... 67
       6.4.20        Set Max Address (F9h) ............................................................................................................ 69
       6.4.21        Set Multiple Mode (C6h) ......................................................................................................... 70
       6.4.22        Sleep (99h, E6h)....................................................................................................................... 70
       6.4.23        Standby (96h,E2h) ................................................................................................................... 71
       6.4.24        SMART (B0h) ......................................................................................................................... 71
          6.4.24.1           Smart disable operation (D9h).........................................................................................................71
          6.4.24.2           Smart enable/disable attribute autosave (D2h) ................................................................................72
          6.4.24.3           Smart enable operations (D8h) ........................................................................................................72
          6.4.24.4           Smart execute off-line immediate (D4h) .........................................................................................72
          6.4.24.5           Smart read data (D0h)......................................................................................................................73
          6.4.24.6           SMART read log sector (D5h).........................................................................................................75
          6.4.24.7           SMART return status (DAh)............................................................................................................75
          6.4.24.8           SMART save attribution value (D3h)..............................................................................................75
          6.4.24.9           SMART write log sector (D6h) .......................................................................................................75
      6.4.25 Standby (96h, E2h) .................................................................................................................. 76
      6.4.26 Standby Immediate (94h, E0h) ................................................................................................ 76
      6.4.27 Write Buffer (E8h) ................................................................................................................... 76
      6.4.28 Write Long (32h:with retry, 33h:without retry) ...................................................................... 76
      6.4.29 Write DMA (CAh) ................................................................................................................... 76
      6.4.30 Write Multiple Command (C5h).............................................................................................. 77
      6.4.31 Write Sector(s) (30h:with retry, 31h:without retry) ................................................................. 77
   6.5     PROGRAMMING REQUIREMENTS ....................................................................................................... 79
      6.5.1    Reset Response ........................................................................................................................ 79
      6.5.2    Error Posting ............................................................................................................................ 79
      6.5.3    Power Conditions..................................................................................................................... 81
          6.5.3.1        Sleep mode...........................................................................................................................................81
          6.5.3.2        Standby mode.......................................................................................................................................81
          6.5.3.3        Idle mode .............................................................................................................................................81
          6.5.3.4        Normal mode .......................................................................................................................................82
   6.6     PROTOCOL OVERVIEW ...................................................................................................................... 83
      6.6.1    PIO Data in Commands ........................................................................................................... 83
          6.6.1.1        PIO Read Command ............................................................................................................................84
          6.6.1.2        PIO Read Aborted Command ..............................................................................................................84
       6.6.2         PIO Data Out Commands ........................................................................................................ 84
          6.6.2.1        PIO Write Command ...........................................................................................................................85
          6.6.2.2        PIO Write Aborted Command..............................................................................................................85
       6.6.3         Non-Data Commands............................................................................................................... 86
       6.6.4         DMA Data Transfer Commands .............................................................................................. 87
          6.6.4.1        Normal DMA transfer ..........................................................................................................................88
          6.6.4.2        Aborted DMA transfer .........................................................................................................................88
          6.6.4.3        Aborted DMA Command.....................................................................................................................88
  6.7     TIMING ............................................................................................................................................. 89
     6.7.1    Register transfers ..................................................................................................................... 89
     6.7.2    PIO data transfers..................................................................................................................... 91
     6.7.3    Multiword DMA data transfer ................................................................................................. 94
SpinPoint V40 Product Manual                                                                                                                                    v
      6.7.4         Ultra DMA data transfer .......................................................................................................... 96
         6.7.4.1       Initiating an Ultra DMA data in burst.................................................................................................. 96
         6.7.4.2       Ultra DMA data burst timing requirements ......................................................................................... 97
         6.7.4.3       Sustained Ultra DMA data in burst...................................................................................................... 98
         6.7.4.4       Host pausing an Ultra DMA data in burst ........................................................................................... 99
         6.7.4.5       Device terminating an Ultra DMA data in burst................................................................................ 100
         6.7.4.6       Host terminating an Ultra DMA data in burst.................................................................................... 101
         6.7.4.7       Initiating an Ultra DMA data out burst.............................................................................................. 102
         6.7.4.8       Sustained Ultra DMA data out burst.................................................................................................. 103
         6.7.4.9       Device pausing an Ultra DMA data out burst.................................................................................... 104
         6.7.4.10         Host terminating an Ultra DMA data out burst ............................................................................. 105
         6.7.4.11         Device terminating an Ultra DMA data out burst ......................................................................... 106
CHAPTER 7              MAINTENANCE ............................................................................................................. 107
 7.1        GENERAL INFORMATION ................................................................................................................. 107
 7.2        MAINTENANCE PRECAUTIONS ........................................................................................................ 107
 7.3        SERVICE AND REPAIR ..................................................................................................................... 107



                                                   TABLE OF TABLES
      Table 3-1 Specifications ............................................................................................................................ 6
      Table 3-2 Physical Specifications.............................................................................................................. 7
      Table 3-3 Logical Configurations.............................................................................................................. 7
      Table 3-4 Performance Specifications....................................................................................................... 8
      Table 3-5 Power Requirements ................................................................................................................. 9
      Table 3-6 Environmental Specifications.................................................................................................. 10
      Table 3-6 Environmental Specifications (continued) .............................................................................. 11
      Table 3-7 Reliability Specifications ........................................................................................................ 11
      Table 4-1 Power Connector Pin Assignment........................................................................................... 16
      Table 4-2 Logical Drive Parameters........................................................................................................ 21
      Table 6-1 AT-Bus Interface Signals ........................................................................................................ 43
      Table 6-2 Interface Signals Description .................................................................................................. 45
      Table 6-3 I/O Port Function/Selection Address....................................................................................... 48
      Table 6-4 Command Codes and Parameters............................................................................................ 54
      Table 6-5 Diagnostic Codes .................................................................................................................... 57
      Table 6-6 IDENTIFY DEVICE information ........................................................................................... 58
      Table 6-7 Automatic Standby Timer Periods .......................................................................................... 62
      Table 6-8 Set Feature Register Definitions.............................................................................................. 67
      Table 6-9 Transfer mode values .............................................................................................................. 67
      Table 6-10 SMART Feature register values ............................................................................................ 71
      Table 6-11 Device SMART data structure .............................................................................................. 73
      Table 6-12 Off-line data collection status values .................................................................................... 74
      Table 6-13 Command Errors ................................................................................................................... 80
      Table 6-14 Power Saving Mode .............................................................................................................. 81
      Table 6-15 Power Conditions .................................................................................................................. 82
      Table 6-16 Register transfer to/from device ............................................................................................ 91
      Table 6-17 PIO data transfer to/from device ........................................................................................... 93
      Table 6-18 Multiword DMA data transfer............................................................................................... 95
      Table 6-19 Ultra DMA data burst timing requirements........................................................................... 97




 vi                                                                                               SpinPoint V40 Product Manual
                                            TABLE OF FIGURES

   Figure 4-1 Mechanical Dimension .......................................................................................................... 12
   Figure 4-2 Mounting Dimensions (in Millimeters) ................................................................................. 14
   Figure 4-3 Mounting-Screw Clearance ................................................................................................... 15
   Figure 4-4 DC Power Connector, Configuration Jumper Block & AT-Bus Interface Connector (JHST)...... 17
   Figure 4-5 Jumper Pin Locations on the Drive PCBA ............................................................................ 19
   Figure 4-6 Options for Jumper Block Configuration .............................................................................. 19
   Figure 4-7 DC Power Connector and AT-Bus Interface Cable Connections .......................................... 20
   Figure 5-1 Exploded Mechanical View................................................................................................... 24
   Figure 5-2 SID2001 AT Controller Block Diagram................................................................................ 27
   Figure 5-3 Read/Write 88C5200 ............................................................................................................. 33
   Figure 6-1 Register transfer to/from device ............................................................................................ 90
   Figure 6-2 PIO data transfer to/from device............................................................................................ 92
   Figure 6-3 Multiword DMA data transfer ............................................................................................... 94
   Figure 6-4 Initiating an Ultra DMA data in burst.................................................................................... 96
   Figure 6-5 Sustained Ultra DMA data in burst........................................................................................ 98
   Figure 6-6 Host pausing an Ultra DMA data in burst ............................................................................. 99
   Figure 6-7 Device terminating an Ultra DMA data in burst.................................................................. 100
   Figure 6-8 Host terminating an Ultra DMA data in burst ..................................................................... 101
   Figure 6-9 Initiating an Ultra DMA data out burst................................................................................ 102
   Figure 6-10 Sustained Ultra DMA data out burst.................................................................................. 103
   Figure 6-11 Device pausing an Ultra DMA data out burst.................................................................... 104
   Figure 6-12 Host terminating an Ultra DMA data out burst.................................................................. 105
   Figure 6-13 Device terminating an Ultra DMA data out burst.................................................106




SpinPoint V40 Product Manual                                                                                                                 vii
                                                                                                       SCOPE




      CHAPTER 1                 SCOPE

Welcome to the SpinPoint V40 series of Samsung hard disk drives. This series of drives consists of the
following models: SV2001H, SV3012H,SV4002H, SV6003H,SV6014H and SV8004H. This chapter
provides an overview of the contents of this manual, including the intended user, manual organization,
terminology and conventions. In addition, it provides a list of references that might be helpful to the reader.


1.1       User Definition
The SpinPoint V40 product manual is intended for the following readers:




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