Service Manuals, User Guides, Schematic Diagrams or docs for : TOSHIBA Laptop Toshiba L750 Quanta BLBD Schematic Diagram
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>> Download Toshiba L750 Quanta BLBD Schematic Diagram documenatation <<
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1 2 3 4 5 6 7 8
PCB STACK UP
LAYER 1 : TOP BLBD Block Diagram 01
LAYER 2 : GND
LAYER 3 : IN1
LAYER 4 : GND
A LAYER 5 : VCC USB-0 A
EXT_LVDS
LAYER 6 : IN2 LCD/CCD Con. P22
LAYER 7 : GND intel VGA
LAYER 8 : BOT
N12X EXT_CRT CRT Con.
DDRIII-SODIMM1 P22
DDRIII-SODIMM2 29X29
DDR SYSTEM MEMORY
P12,13 PCI-E PCI-E x16
Sandy Bridge X16
Dual Channel DDR III P14~20 EXT_HDMI HDMI Con.
1066/1333 MHZ P21
rPGA 989
(37.5mm X 37.5mm)
FDI DMI
P2~P5
SATA - HDD
P25 DMI(x4)
PCIE-3
B B
FDI DMI 3G
SATA - ODD USB-10
CK505
P25
SATA 0 SATA Gen3 intel P23
P2
SATA 4 SATA Gen2
SATA Gen2
POWER SYSTEM
USB-4 USB 2.0 (Port0~13) ISL88731 P.33
SIM Card USB PCIE-5
CougarPoint 0.7 WLAN RT8206MGQW P.34
P23
PCI-Express USB-5 RT8207LGQW P.35
PCI-E P23
RTC RT8240BGQW P.36
USB-8 ISL95870AHRUZ-T P.37
USB 3.0 Con. ISL95835HRTZ-T P.38
P24 BATTERY mBGA 989 G9661-25ADJF12U P.39
(25mm X 25mm)
P7 ISL95870AHRUZ-T P.40
Azalia HDA PCIE-6
USB-9 P6~P11 Giga/10/100 Lan
USB 2.0 Con. P26
P30 SPI LPC +VCC_CORE
C C
Cardreader USB-3 +1.5V
+1.5VSUS
P28 SPI ROM
4MB x1 (Basic ME+BIOS)
P7
+VTT
+1.05V
Cardreader Con.
3 IN 1 P28 LPC +1.8V
+1.5V_S5
Audio Codec EC +3VPCU
+3V_S5
P27 P29 +3V
+5VPCU
Port-B
Port-A
+5V_S5
FAN K/B Con. HALL Sensor SPI Flash Touch Pad /B Power /B +5V
D
MIC JACK HP SPK Con. Con. Con. +SMDDR_VTERM D
MDC Con.
P27 P27 P27 P27 P2 P30 P22 P29 P30 P30 +SMDDR_VREF
+VGPU_CORE
+VAXG
Quanta Computer Inc.
PROJECT : BLBD
Size Document Number Rev
1A
Block Diagram
Date: Monday, November 22, 2010 Sheet 1 of 42
1 2 3 4 5 6 7 8
5 4 3 2 1
[6] DMI_TXN0
Sandy Bridge Processor (DMI,PEG,FDI)
B27
U13A
DMI_RX#[0]
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
J22
J21
H22
PEG_COMP
Sandy Bridge Processor (CLK,MISC,JTAG)
02
[6] DMI_TXN1 B25
DMI_RX#[1] SNB_IVB# N.A at SNB EDS #27637 0.7v1
[6] DMI_TXN2 A25 PEG_RXN[0..15] [14]
DMI_RX#[2] PEG_RXN0 U13B
[6] DMI_TXN3 B24 K33
DMI_RX#[3] PEG_RX#[0] PEG_RXN1
M35 B1A 1013
PEG_RX#[1] PEG_RXN2
[6] DMI_TXP0 B28 L34
DMI_RX[0] PEG_RX#[2] PEG_RXN3
[6] DMI_TXP1 B26 J35
DMI_RX[1] PEG_RX#[3]
DMI
A24 J32 PEG_RXN4 A28 CLK_CPU_BCLKP_R 3 4
DEL R19 0R CLK_CPU_BCLKP [8]
MISC
CLOCKS
[6] DMI_TXP2 DMI_RX[2] PEG_RX#[4] PEG_RXN5 BCLK CLK_CPU_BCLKN_R
[6] DMI_TXP3 B23 H34 [7] H_SNB_IVB# C26 A27 1 2 CLK_CPU_BCLKN [8]
DMI_RX[3] PEG_RX#[5] PEG_RXN6 PROC_SELECT# BCLK# R358 0X2
H31
PEG_RX#[6] PEG_RXN7
[6] DMI_RXN0 G21 G33
DMI_TX#[0] PEG_RX#[7] PEG_RXN8 SKTOCC#
[6] DMI_RXN1 E22 G30 TP3 AN34
D DMI_TX#[1] PEG_RX#[8] PEG_RXN9 SKTOCC# CLK_DPLL_SSCLKP_R R362 1K_4
D
[6] DMI_RXN2 F21 F35 A16
DMI_TX#[2] PEG_RX#[9] PEG_RXN10 DPLL_REF_CLK CLK_DPLL_SSCLKN_R
[6] DMI_RXN3 D21 E34 A15 +VTT
DMI_TX#[3] PEG_RX#[10] PEG_RXN11 DPLL_REF_CLK# R361 1K_4
E32
PEG_RX#[11] PEG_RXN12
[6] DMI_RXP0 G22 D33
DMI_TX[0] PEG_RX#[12] PEG_RXN13 TP_CATERR#
[6] DMI_RXP1 D22 D31 TP2 AL33
DMI_TX[1] PEG_RX#[13] CATERR#
PCI EXPRESS* - GRAPHICS
F20 B33 PEG_RXN14
[6] DMI_RXP2 DMI_TX[2] PEG_RX#[14] PEG_RXN15
C21 C32 PEG_RXP[0..15] [14]
THERMAL
[6] DMI_RXP3 DMI_TX[3] PEG_RX#[15]
J33 PEG_RXP0 AN33 R8 CPU_DRAMRST#
PEG_RX[0] [29] EC_PECI PECI SM_DRAMRST#
L35 PEG_RXP1
DDR3
MISC
PEG_RX[1] PEG_RXP2
K34
PEG_RX[2] PEG_RXP3
A21 H35
FDI0_TX#[0] PEG_RX[3] PEG_RXP4 R51 56_4 H_PROCHOT#_R SM_RCOMP_0 R371 140/F_4
H19 H32 [29,38] H_PROCHOT# AL32 AK1
FDI0_TX#[1] PEG_RX[4] PEG_RXP5 PROCHOT# SM_RCOMP[0] SM_RCOMP_1 R360 25.5/F_4
E19 G34 A5
FDI0_TX#[2] PEG_RX[5] SM_RCOMP[1]
Intel(R) FDI
F18 G31 PEG_RXP6 A4 SM_RCOMP_2 R359 200/F_4
FDI0_TX#[3] PEG_RX[6] PEG_RXP7 SM_RCOMP[2]
B21 F33
FDI1_TX#[0] PEG_RX[7] PEG_RXP8 PM_THRMTRIP#_R AN32
C20
D18
FDI1_TX#[1] PEG_RX[8]
F30
E35 PEG_RXP9
130 degree work THERMTRIP#
FDI1_TX#[2] PEG_RX[9] PEG_RXP10
E17 E33
FDI1_TX#[3] PEG_RX[10] PEG_RXP11
F32
PEG_RX[11] PEG_RXP12
D34
PEG_RX[12] PEG_RXP13
A22 E31 AP29 XDP_PRDY#_R
FDI0_TX[0] PEG_RX[13] PEG_RXP14 PM_SYNC_R PRDY#
G19 C33 [6] PM_SYNC R46 0_4 AP27 XDP_PREQ#_R TP6
FDI0_TX[1] PEG_RX[14] PEG_RXP15 PREQ# TP5
E20 B32
FDI0_TX[2] PEG_RX[15] PEG_TXN[0..15] [14]
G18 AR26 XDP_TCLK_R
PWR MANAGEMENT
FDI0_TX[3] TCK
JTAG & BPM
B20 M29 PEG_TXN0_C C583 0.1U/10V_4X PEG_TXN0 AR27 XDP_TMS_R
FDI1_TX[0] PEG_TX#[0] PEG_TXN1_C PEG_TXN1 TMS
C19 M32 C564 0.1U/10V_4X AM34 AP30 XDP_TRST#_R
FDI1_TX[1] PEG_TX#[1] PEG_TXN2_C C585 0.1U/10V_4X PEG_TXN2 PM_SYNC TRST#
D19 M31
FDI1_TX[2] PEG_TX#[2] PEG_TXN3_C PEG_TXN3
F17 L32 C566 0.1U/10V_4X When XDP connect be use AR28 XDP_TDI_R
FDI1_TX[3] PEG_TX#[3] PEG_TXN4_C PEG_TXN4 TDI
L29 C595 0.1U/10V_4X AP26 XDP_TDO_R B1A Add 1013
FDI_FSYNC0 J18
PEG_TX#[4]
K31 PEG_TXN5_C C574 0.1U/10V_4X PEG_TXN5 must change to 1K AP33
TDO
FDI_FSYNC1 FDI0_FSYNC PEG_TX#[5] PEG_TXN6_C C591 0.1U/10V_4X PEG_TXN6 UNCOREPWRGOOD
J17 K28
FDI1_FSYNC PEG_TX#[6] PEG_TXN7_C C570 0.1U/10V_4X PEG_TXN7 R55 0_4 H_PWRGOOD_R
J30 [9] H_PWRGOOD
FDI_INT PEG_TX#[7] PEG_TXN8_C C587 0.1U/10V_4X PEG_TXN8 XDP_DBR#_R R599 0_4
H20 J28 AL35 XDP_DBRST# [6]
FDI_INT PEG_TX#[8] PEG_TXN9_C C568 0.1U/10V_4X PEG_TXN9 DBR#
H29 V8
FDI_LSYNC0 PEG_TX#[9] PEG_TXN10_C C593 0.1U/10V_4X PEG_TXN10 R53 10K_4 SM_DRAMPWROK
J19 G27
FDI_LSYNC1 FDI0_LSYNC PEG_TX#[10] PEG_TXN11_C C576 0.1U/10V_4X PEG_TXN11
H17 E29 AT28
FDI1_LSYNC PEG_TX#[11] PEG_TXN12_C C597 0.1U/10V_4X PEG_TXN12 BPM#[0] TP81
F27 AR29
PEG_TX#[12] PEG_TXN13_C C578 0.1U/10V_4X PEG_TXN13 PM_DRAM_PWRGD_R BPM#[1] TP82
C
PEG_TX#[13]
D28
F26 PEG_TXN14_C C589 0.1U/10V_4X PEG_TXN14
C3A 1109 AR33
BPM#[2]
AR30
AT30 TP83 C
+VTT PEG_TX#[14] PEG_TXN15_C C572 0.1U/10V_4X PEG_TXN15 RESET# BPM#[3] TP84
E25 AP32
PEG_TX#[15] PEG_TXP[0..15] [14] CPU_PLTRST# R59 *43_4 CPU_PLTRST#_R BPM#[4] TP85
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